JPH01115652A - Thermal printer device - Google Patents

Thermal printer device

Info

Publication number
JPH01115652A
JPH01115652A JP62273099A JP27309987A JPH01115652A JP H01115652 A JPH01115652 A JP H01115652A JP 62273099 A JP62273099 A JP 62273099A JP 27309987 A JP27309987 A JP 27309987A JP H01115652 A JPH01115652 A JP H01115652A
Authority
JP
Japan
Prior art keywords
thermal printer
printer device
latch circuit
printing
heating resistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62273099A
Other languages
Japanese (ja)
Inventor
Hiroshi Mitsuda
満田 浩
Fumio Kozai
香西 文男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62273099A priority Critical patent/JPH01115652A/en
Publication of JPH01115652A publication Critical patent/JPH01115652A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a thermal printer device eliminating the fluctuation of printing density, by synchronously electrically conducting heating resistors disposed dispersedly every predetermined number of pieces every time when each of a plurality of control signals is applied. CONSTITUTION:Printing data sent from a host side is inputted to a shift register 3 in synchronism with a clock and temporarily accumulated therein. The printing data is outputted to a latch circuit 4 while shifting also in synchronism with a clock and latched therein. An output signal from the latch circuit 4 is electrically conducted to heating resistors which are connected to an output of a NAND circuit 5 connected to each strobe signal every time when a strobe pulse per block is applied, and a printing is performed. The heating resistors to be synchronously electrically conducted are disposed dispersedly every n- pieces, whereby a change in printing density is improved to a great extent.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、サーマルプリンタ装置、特に印画濃度を一
定にしたサーマルプリンタ装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a thermal printer device, and particularly to a thermal printer device with constant printing density.

[従来の技術] 第2図は従来のサーマルプリンタ装置の構成を示す図で
ある。図において、(3)は印画データを一時的に蓄積
するシフトレジスタ、(4)はシフl−レジスタ(3)
と接続されるラッチ回路、(r、、)〜(r、、)は第
1ブロツクの発熱抵抗体、 (r21)〜(r2.)は
第2ブロツクの発熱抵抗体、 (r3.)〜(r、)は
第3ブロツクの発熱抵抗体、・・・・(rn、)〜(r
□)は第nブロックの発熱抵抗体である。(STI)、
(Sr1)、(Sr1)・・−−(STn)は各ブロッ
ク毎のストローブ信号線である。
[Prior Art] FIG. 2 is a diagram showing the configuration of a conventional thermal printer device. In the figure, (3) is a shift register that temporarily stores print data, and (4) is a shift register (3).
The latch circuit is connected to the latch circuit, (r,,) to (r,,) are the heat generating resistors of the first block, (r21) to (r2.) are the heat generating resistors of the second block, (r3.) to ( r,) is the heating resistor of the third block, ...(rn,) ~ (r
□) is the heating resistor of the n-th block. (STI),
(Sr1), (Sr1), . . . (STn) are strobe signal lines for each block.

(5)は発熱抵抗体の個数だけ設けられたナンド回路で
あって、その一方がラッチ回路(4)の各出力と、その
他方が各ストローブ信号線と接続されている。
(5) is a NAND circuit provided in the number of heating resistors, one of which is connected to each output of the latch circuit (4), and the other connected to each strobe signal line.

第3図は第1図のストローブ信号線(S T 1 )。FIG. 3 shows the strobe signal line (ST1) in FIG. 1.

(Sr1)、(Sr1)・・・・(STn)に印加され
るパルス波形を示す図である。
It is a diagram showing pulse waveforms applied to (Sr1), (Sr1), . . . (STn).

第4図は従来のサーマルプリンタ装置の印画濃度変動の
原因を説明するための図である。図において、(1)は
電源であって、電池(E)と内部抵抗(Rs )を含ん
でいる。(2)は配線抵抗(R1)を通して電源(1)
と接続されるサーマルヘッドである。
FIG. 4 is a diagram for explaining the causes of print density fluctuations in a conventional thermal printer device. In the figure, (1) is a power source, which includes a battery (E) and an internal resistance (Rs). (2) is the power supply (1) through the wiring resistance (R1)
This is a thermal head connected to the

第5図は、従来のサーマルプリンタ装置で印画した場合
の印画濃度のむらを示す図である。
FIG. 5 is a diagram showing unevenness in print density when printing with a conventional thermal printer device.

従来のサーマルプリンタ装置は上記のように構成され、
ホスト側(図示せず)から送られてきた印画データはク
ロックと同期してシフトレジスタ(3)に入力され、−
時的に蓄積される。この印画データは、またクロックと
同期してシフトしながらラッチ回路(4)に出力され、
ラッチされる。次にラッチ回路(4)からの出力信号は
、各ブロック毎のストローブパルスが順次印加される毎
に各ストローブ信号線と接続されるナンド回路(5〉の
出力と接続される各ブロックの発熱抵抗体(rl、〜r
+m)+(+”2r〜r2j+(raI〜r:++a)
 H+ ・・’ (rn+〜roW、)に順次通電され
、印画される。
A conventional thermal printer device is configured as described above.
Print data sent from the host side (not shown) is input to the shift register (3) in synchronization with the clock, and -
Accumulated over time. This print data is also output to the latch circuit (4) while being shifted in synchronization with the clock.
Latched. Next, the output signal from the latch circuit (4) is applied to the heating resistor of each block, which is connected to the output of the NAND circuit (5>), which is connected to each strobe signal line each time the strobe pulse for each block is sequentially applied. body (rl, ~r
+m)+(+”2r~r2j+(raI~r:++a)
H+...' (rn+ to roW,) are sequentially energized to print.

[発明が解決しようとする問題点] 上記のような従来のサーマルプリンタ装置では。[Problem that the invention attempts to solve] In traditional thermal printer equipment like the one mentioned above.

第4図に示されるような電源(1)の内部抵抗(R5)
、配線抵抗(11)およびサーマルヘッド(2)内の配
線パターン抵抗(図示せず)などにより第5図に示され
るように斜線部(B )、(C)、(D )の部分で記
録濃度に差ができ、また、従来の通電では隣接ドツトの
熱の影響が2発熱抵抗体(r 、、)と(r2.)、発
熱抵抗体(r2.)と(r 3.)・・・・等で不連続
になるため第5図に示す各ブロック間の継ぎ目(T I
 、 T 2 、・・・・T、)で縦線妨害、すなわち
薄い縦線がでるなどの問題点があった。
Internal resistance (R5) of power supply (1) as shown in Figure 4
, the wiring resistance (11) and the wiring pattern resistance (not shown) in the thermal head (2), etc., as shown in FIG. In addition, in conventional energization, the influence of heat from adjacent dots is caused by two heating resistors (r2.) and (r2.), heating resistors (r2.) and (r3.), etc. etc., the seams between each block (T I
, T 2 , . . . T,), there were problems such as vertical line interference, that is, thin vertical lines appeared.

この発明は、かかる問題点を解決するためになされたも
ので、印画濃度の変動を除去するサーマルプリンタ装置
を得ることを目的とする。
The present invention was made to solve this problem, and an object of the present invention is to provide a thermal printer device that eliminates fluctuations in print density.

[問題点を解決するための手段] この発明に係るサーマルプリンタ装置は、同時に通電す
る発熱抵抗体をn個置きに分散して配置するようにした
ものである。
[Means for Solving the Problems] In the thermal printer device according to the present invention, heating resistors that are energized at the same time are distributed and arranged every nth heat generating resistor.

[作用] この発明においては、同時に通電される発熱抵抗体がn
個ごとに分散して配置することによって。
[Function] In this invention, the heating resistor that is energized at the same time is
By distributing and arranging each piece.

印画濃度変化を大幅に改善する。Significantly improves print density changes.

[実施例] 第1図はこの発明の一実施例によるサーマルプリンク装
置の構成を示す図である。図において。
[Embodiment] FIG. 1 is a diagram showing the configuration of a thermal link device according to an embodiment of the present invention. In fig.

同時に通電される発熱抵抗体をn個置きに分散して配置
している以外は第2図のものと同様なものである。
It is the same as the one shown in FIG. 2 except that the heating resistors that are energized at the same time are distributed and arranged every n pieces.

上記のように構成されたサーマルプリンタ装置において
、印画動作を行う場合、各ストローブパルスはn個置き
に配置された発熱抵抗体を同時に印加する動作以外は従
来と同様である。
In the thermal printer device configured as described above, when performing a printing operation, the operation is the same as the conventional one except that each strobe pulse is simultaneously applied to every n heating resistors.

[発明の効果] この発明は以上説明したとおり、印画データを一時的に
蓄積するシフトレジスタと、前記シフトレジスタからの
前記印画データをラッチするラッチ回路と、前記ラッチ
回路からの各出力信号と各制御信号との論理積をとる複
数の論理積回路と。
[Effects of the Invention] As described above, the present invention includes a shift register that temporarily stores print data, a latch circuit that latches the print data from the shift register, and each output signal from the latch circuit. and a plurality of AND circuits that perform AND with the control signal.

各前記論理積回路の出力信号によって通電される複数の
発熱抵抗体とを備え、同時に通電する発熱抵抗体の位置
を分散したので、印画濃度変化を大幅に改善できる効果
がある。
A plurality of heat generating resistors are provided which are energized by the output signals of the AND circuits, and the positions of the heat generating resistors which are energized at the same time are distributed, which has the effect of greatly improving print density changes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるサーマルプリンク装
置の構成図、第2図は従来のサーマルプリンタ装置の構
成図、第3図は上記従来例の動作波形図、第4図は上記
従来例における印画濃度変動の原因を説明するための図
、第5図は従来のサーマルプリンタ装置で印画した場合
の印画濃度むらを示す図である。 図において、(3)・・・シフトレジスタ、(4)・・
・ラッチ回路、(5)・・・ナンド回路、(r、、)〜
(r 、、)・・・発熱抵抗体である。
Fig. 1 is a block diagram of a thermal link device according to an embodiment of the present invention, Fig. 2 is a block diagram of a conventional thermal printer device, Fig. 3 is an operation waveform diagram of the above conventional example, and Fig. 4 is a block diagram of the above conventional example. FIG. 5 is a diagram illustrating the causes of print density fluctuations in print density unevenness when printing with a conventional thermal printer device. In the figure, (3)... shift register, (4)...
・Latch circuit, (5)...NAND circuit, (r,,)~
(r , , )...A heating resistor.

Claims (1)

【特許請求の範囲】[Claims] 印画データを一時的に蓄積するシフトレジスタと、前記
シフトレジスタからの前記印画データをラッチするラッ
チ回路と、前記ラッチ回路からの各出力信号と各制御信
号との論理積をとる複数の論理積回路と、各前記論理積
回路の出力信号によって通電される複数の発熱抵抗体と
を備え、複数の制御信号の内の各制御信号が印加される
毎に所定数置きに分散配置された発熱抵抗体を同時に通
電することを特徴とするサーマルプリンタ装置。
A shift register that temporarily stores print data, a latch circuit that latches the print data from the shift register, and a plurality of AND circuits that take the AND of each output signal from the latch circuit and each control signal. and a plurality of heat generating resistors energized by the output signal of each of the AND circuits, the heat generating resistors being distributed at predetermined intervals every time each control signal among the plurality of control signals is applied. A thermal printer device characterized by simultaneously energizing.
JP62273099A 1987-10-30 1987-10-30 Thermal printer device Pending JPH01115652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62273099A JPH01115652A (en) 1987-10-30 1987-10-30 Thermal printer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62273099A JPH01115652A (en) 1987-10-30 1987-10-30 Thermal printer device

Publications (1)

Publication Number Publication Date
JPH01115652A true JPH01115652A (en) 1989-05-08

Family

ID=17523124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62273099A Pending JPH01115652A (en) 1987-10-30 1987-10-30 Thermal printer device

Country Status (1)

Country Link
JP (1) JPH01115652A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111693808A (en) * 2020-06-10 2020-09-22 珠海佳博网络有限公司 Electrical characteristic testing method of thermal printing head

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111693808A (en) * 2020-06-10 2020-09-22 珠海佳博网络有限公司 Electrical characteristic testing method of thermal printing head
CN111693808B (en) * 2020-06-10 2023-03-07 珠海柏印自动化设备有限公司 Electrical characteristic testing method of thermal printing head

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