JPH01124268A - Resonance tunneling barrier structure device - Google Patents

Abstract

PURPOSE:To obtain a peak/valley current ratio of 10 or more at room temperature by a method wherein a lattice constant of a barrier layer is made larger than a lattice constant of a well layer and a high-concentration doped layer. CONSTITUTION:A strain-layer resonance tunneling barrier structure which is composed of In1-xAlxSb (where 0<=x<=1) barrier layers 2, 3 not lattice-matched to InP, an In0.53Ga0.47As or InP well layer 4 lattice-matched to the InP and In0.53Ga0.47As or InP high-concentration doped layers 5, 6 sandwiching the barrier layers 2, 3 from the outside by making use of the well layer 4 in the center is formed on an InP substrate 1. A lattice constant of the In1-xAlxSb (where 0<=x<=1) layers 2, 3 is larger than a lattice constant of the In0.53Ga0.47As layers 4, 5, 6 lattice-matched to the InP and the InP substrate; due to this lattice mismatching, a lattice mismatching value of about 5% enhances a potential barrier of an AlSb conduction band in the case of an AlSb layer and the In0.53 Ga0.47As layer; a barrier height is increased to about 1.4eV.

Description

[Detailed Description of the Invention] [Summary] Regarding a compound semiconductor device, more specifically, a device having a resonant tunneling barrier (RTB) structure, the conventional 81As/InGaAs/A1As
(InP substrate) strained layer resonance tunneling that can achieve or exceed the favorable characteristics (especially high peak/valley current ratio at room temperature) of the strained layer resonance tunneling barrier structure using other compound semiconductors as the barrier layer. For the purpose of providing a tunneling barrier structure, at least two InI-x Aβ-x Alx Sb barrier layers (0≦X≦1), an InP or InGaAs well layer interposed between these barrier layers, and said barrier layer and two InP or InGaA layers sandwiching the entire well layer.
The semiconductor device has a resonant tunneling barrier structure consisting of a heavily doped layer and a lattice constant of the barrier layer is larger than the lattice constant of the well layer and the heavily doped layer.

[Industrial application field]

The present invention relates to a compound semiconductor device, and more specifically, to a device having a resonant tunneling barrier (RTB) structure.

[Conventional technology]

The differential negative resistance caused by the resonant tunneling barrier structure is a phenomenon that can be expected to be applied to ultra-high frequency detectors, oscillators, and ultra-high-speed new functional transistors (for example, T
, INATA et al: ExcellentNeg
ative Differential Re5i
stance of InAAAs/InGaA
s Re5onant Tunneling Barr
ier StructuresGrown by MB
E, Jpn, J, Appl, Phys, Vol, 25
．． No. 12 (1986), pp. 983-985,
reference).

When applied to devices (diodes, transistors), high peak current density (Jf), 10' A/c
d order) and high peak/valley current ratio (Jp/Jv,
10 or more), but in conventional resonant tunneling barrier structures, as long as lattice matching with the substrate is maintained,
Good properties were not obtained at room temperature. What we have actually obtained so far is as follows.

A I As/GaAs/ A I on GaAs substrate
In the case of As structure (A I As is the barrier layer and GaAs is the well layer): Jp = 4 XIO' A/+a
J, Ino on Jp/Jv=3.5rnP substrate,
%z A Il (1,411AS/ In0.5sG
ao, aqAs/ Ino, 5g A It 0.
For 411AS structure: Jp= 4.8 XIO'
A/cnl, Jp/Jv = 5.5 Although the peak/valley current ratio is small in these cases, the AlAs/I strain layer resonant tunneling barrier structure outside the lattice matching condition
nGaAs/ //! In the case of As (InP substrate),
A high peak/valley current ratio of 14 is obtained at room temperature. This strained layer structure belongs to a so-called strained superlattice structure. The reason for such a high peak/valley current ratio is thought to be that the conduction band edges of AIAs and TnGaAs have a wide jump (about 1.2 eV or more), and therefore a high potential barrier is formed. However, in this strained layer resonant tunneling barrier structure, A
Due to the glabellar lattice misalignment (strain) in which the lattice constant of the IAs layer is approximately % smaller than the lattice constant of the InGaAs layer,
The electrical characteristics of the A E As layer (barrier N) change, lowering the potential barrier in the conduction band and keeping the potential barrier height at about 1.2 eV. Also, In
Even when the GaAs layer (well layer and electrode layer outside the barrier layer) is replaced with an InP layer, the potential barrier is similarly lowered and the barrier height remains at about 0.95 eV.

[Problem that the invention seeks to solve]

The purpose of the present invention is to improve the conventional ^IAs/InGaAs
/^ Strained layer of AAs (InP substrate) Resonant tunneling A strained layer using other compound semiconductors as a barrier layer that can achieve or exceed the good characteristics (especially high peak/valley current ratio at room temperature) in the barrier structure. The object of the present invention is to provide a resonant tunneling barrier structure.

[Means for solving problems]

If the above purpose is to provide at least two In+□Aj2. Sb
A barrier Ji (0≦X≦1), an InP or InGaAs well layer sandwiched between these barrier layers, and two InP or InGaAs well layers that cover the entire barrier layer and well layer.
This is achieved by a resonant tunneling barrier structure device having a resonant tunneling barrier structure consisting of a heavily doped layer of As, and characterized in that the lattice constant of the barrier layer is larger than the lattice constants of the well layer and the heavily doped layer.

[For production]

The barrier layer of the resonant tunneling barrier structure according to the present invention is In, ^1-xAlxSb, and is
It lies on the thick solid line A in the composition diagram of group compound semiconductors.

When x=1, the barrier layer is A I Sb and InA
The upper end of the I Sb line A, while the barrier layer is InSb and the lower end of the InA I Sb line A when X=O.

As can be seen from Fig. 5, InI-x Al-xAlx
The lattice constant of Sb (0≦X≦1) is InP and InP
Ino lattice matched to the substrate, s+Gao, 4? A.S.
is larger than the lattice constant of

In this respect, the lattice constant of the conventional barrier layer (AIAs) is smaller than that of InP (Ino, 5sGao, 4?AS), which is the opposite.

In the present invention, due to the above-mentioned lattice mismatch, in the case of the Helsb layer and the Ino, 5sGao, and atAs layers, the
% lattice mismatch increases the potential barrier of the conduction band of A I Sb, resulting in a barrier height as large as about 1.4 eV. In addition, in the case of an InP layer, the barrier height is similarly thick (approximately 1.15 eV).
Since it is an indirect transition type semiconductor, it has the problem that indirect valleys contribute to the tunnel current, but to avoid this problem, direct transition type In+-3AJ, S
b (x < 0.72) may be used. In this case,
Although lattice misalignment tends to make InA I Sb more of an indirect transition type, even if this is taken into consideration, it becomes a direct transition type when x = 0.3 (calculated value). The barrier layer is In.
.

If A l, , Sb, the barrier height (calculated value) is I
n,,, 5zGao, 4? The barrier height (calculated value) for the AS layer (InP layer) is approximately 1.OeV (0.75
eV).

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described by way of example embodiments with reference to the accompanying drawings.

FIG. 1 shows a schematic cross-sectional view of a diode having a resonant tunneling barrier structure according to the present invention.

In this diode, In1-, Al, and Sb (0≦X≦1
) Barrier layers 2 and 3 and Ino lattice-matched to InP, 5
3 Gao, , As or InP well layer 4 and In6 with the well layer 4 inside and barrier layers 2 and 3 from the outside.
．． 5sGa6. At8 or InP heavily doped layer 5
．． A strained layer resonant tunneling barrier structure consisting of 6 is formed. Further, in order to prevent impurity diffusion from the highly doped layers 5 and 6 to the barrier layer 2.3, non-doped Ina, 5xGao, 4gA3 or InP spacer layers 5a and 6a are provided, and the electrode metal 7.8 A contact layer 9.10 of highly doped Ino, s+Gao, 47AS or InP is further provided for ohmic contact with the substrate. A contact layer 9, a highly doped layer 5, and a non-F-7 layer are formed on the InP substrate 1 by epitaxial growth (for example, by MBE method).
``Spacer layer 5a, barrier layer 2, well layer 4, barrier layer 3, non-doped spacer layer 6a% heavily doped layer 6
, a contact layer 10 is formed.

As shown in FIG. 1, the contact layer 9 is exposed by selective etching, and the exposed surface is a protective film 11 such as 5i02.
covered with. Then, an electrode connected to the contact layer 9.10 is formed so as to fill the contact hole formed in the protective film 11 with the electrode metal 7.8.

In the resonant tunneling barrier structure diode shown in FIG.
．． The band conceptual diagram when no voltage is applied between
As shown in the figure. The quantum well of the well layer 4 is covered with barrier layers 2 on both sides.
It is sandwiched between two double barriers.

Apply a voltage between electrodes 8 and 9 and increase its value (
Then, a current-voltage characteristic (differential negative resistance characteristic) as shown in FIG. 3 is obtained. In FIG. 3, point E is the peak current value, the peak current density at this time is Jp, and the applied voltage is the peak voltage Vp. Further, point F is the valley current value, the valley current density at this time is Jv, and the applied voltage is the valley voltage. Figure 4(a) shows a band conceptual diagram under bias conditions at peak current, and Figure 4(b) shows a band conceptual diagram under bias conditions at valley current.
).

A resonant tunneling barrier structure diode having the structure shown in Figure 1 was constructed under the following conditions.

InP substrate (1) - n" type, (100) plane, approximately 500 mm thick contact layer (9) = ・n" Ino, 53 Gao,
4tAs, 0.3cm thickness Si doped, 2×1010l9 heavily doped layer (5)-n” Ino, 53Ga
o, 4? AS%0.2-thickness Si-doped, '×10"ell-" spacer layer (
5a)...Non-doped Inn, 5sGao, 4?
AS%15 thickness barrier layer (2)...Non-doped Aj! Sb, 23-thick well layer (4)...Non-doped Ino, 5sGa
o, a, Asz 44-layer thick barrier layer (3)...non-doped AI Sb, 23-layer thick spacer layer (6a)'', non-doped Ir++, 5
sGao, 4? AS, 15 thick heavily doped layer (6) = n” Ino, 5iG
ao, aqAs, 0, I IM thickness Si doped, 1 × 101110-3 contact layer (
10) -n” Inn, 53Gao, 4Js.

0.1-thickness Si doped, 2X10190 bowden Pi(7,8)-Au, 0.4. n thickness protective film (11) - 5 in 2.0.3 tns thickness In this example 1, the well layer 4, the heavily doped layer 5.6 and the contact layer 9.10 are Ino, 53 Gao which are lattice matched with InP.
, at8, and the barrier layers 2 and 3 are In+-X A
Among I x Sb (0≦X≦1), AlSb was selected as having the highest barrier height.

The peak/valley current ratio Jp/Jv of this strained layer resonant tunneling barrier structure diode at room temperature was 10 or more.

(1) A resonant tunneling barrier structure diode having the structure shown in FIG. 1 was constructed under the same conditions as in Example 1 below. In addition, example 2
differs from Example 1 in that the well layer, heavily doped layer, and contact layer are Ino, 5zGao, and 4? It's AS (InP).

InP substrate (1)...n" type, (100) plane, approximately 50
0-thickness contact layer (9) ・-・n” InP % 0.3
ttm thickness Si doped, 2 × 1QI9cIl high-temperature doped layer (5)...non-doped InP, 0.2-
Thickness: Si-doped, IXIO"elm-' spacer layer (5
a) - Non-doped InP, 15-layer thick barrier layer (2)...Non-doped AJSb, 23-layer thick well layer (4)...Non-doped InP, 44-layer thick barrier layer (3)...Non-doped A j2 Sb, 23
Thickness spacer layer (6a)...non-doped InP,
15 thick highly doped layer (6)...n'' InP, 0.1
- Thickness Si doped, I
Doped, 2X1019cm-3 electrodes (7, 8) -A
u, 0.4-thickness protective film (11)...SiO□, 0
．． The peak/valley current ratio Jp/Jv at room temperature of this strained layer resonant tunneling barrier structure diode with three thicknesses was 10 or more.

By employing InP instead of InGaAs in Example 1, the diode of Example 2 does not contain As, and has the advantage of being free from the risk of handling harmful As and As compounds during the manufacturing process.

〔Effect of the invention〕

According to the present invention, a peak/valley current ratio of 10 or more can be obtained at room temperature with the strained layer resonant tunneling barrier structure formed on an InP substrate as in Examples 1 and 2, which is higher than that of the conventional lattice matching type. With a large value twice that of
It is equivalent to or better than the conventional strained layer resonant tunneling barrier structure. This resonant tunneling barrier structure with good differential negative resistance characteristics can be applied between the emitter and base of a hot electron transistor in addition to a diode to form a resonant tunneling hot electron transistor (RHET).

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view of a diode with a (strained layer) resonant tunneling barrier structure according to the present invention, and FIG. 2 is a band diagram of the (strained layer) resonant tunneling barrier structure shown in FIG. These are conceptual diagrams. Figure 3 is a current/voltage characteristic diagram of the diode in Figure 1, Figure 4 (a) is a conceptual diagram of the band at peak current, and Figure 4 (b) is the diagram at valley current. FIG. 5 is a composition diagram of an m-v group compound semiconductor. 1=inP substrate, 2, 3...barrier layer (In
A j2 Sb), 4... Well layer (InGaAs or InP), 5, 6-... Highly doped layer (InGaAs or InP), 5, 6-... Highly doped layer (InGa
As or InP), 7.8... electrode, 11...
Protective film. Cross-sectional view of the resonant tunneling barrier structure device of the present invention 2.3... Barrier layer (InAtSb) 11... Protective film Band conceptual diagram when no bias is applied Figure 2 Voltage-current/voltage characteristic diagram Figure 3

Claims (1)

[Claims] 1, at least two In_1_-_xAl_xSb barrier layers (0≦x≦1) (2, 3), an InP or InGaAs well layer (4) sandwiched between these barrier layers, and the barrier layer (2, 3); ) and two heavily doped InP or InGaAs layers sandwiching the entire well layer (4) (
5, 6), and the barrier layer (2, 3) has a lattice constant equal to that of the well layer (2, 3).
4) and a resonant tunneling barrier structure device characterized in that the lattice constant is larger than that of the heavily doped layers (5, 6).