JPH01127003U - - Google Patents
Info
- Publication number
- JPH01127003U JPH01127003U JP2237788U JP2237788U JPH01127003U JP H01127003 U JPH01127003 U JP H01127003U JP 2237788 U JP2237788 U JP 2237788U JP 2237788 U JP2237788 U JP 2237788U JP H01127003 U JPH01127003 U JP H01127003U
- Authority
- JP
- Japan
- Prior art keywords
- registered
- event
- information
- storage means
- programmable controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Programmable Controllers (AREA)
Description
第１図は本考案実施例の機能構成を示すブロツ
ク図、第２図は本考案実施例の具体的構成を示す
ブロツク図、第３図は第２図示のＲＯＭ４の記憶
内容を示す説明図、第４図は第２図示のＣＰＵ２
が実行する制御手順を示すフローチヤート、第５
図は第２図示のＲＡＭ５の記憶内容を示す説明図
、第６図は本考案実施例の他の構成例を示すブロ
ツク図、第７図Ａ，Ｂは本考案実施例の表示例を
示す説明図である。
１……タイマ、２……ＣＰＵ、３，５，１４…
…ＲＡＭ、４……ＲＯＭ、６……バス、７，１０
……Ｉ／Ｏ、８……ローダ、８―１……表示器、
８―２……キーボード、９……入出力接点メモリ
、１１……外部機器、２０′……外部記憶装置、
２１……プリンタ。
FIG. 1 is a block diagram showing the functional configuration of the embodiment of the present invention, FIG. 2 is a block diagram showing the specific structure of the embodiment of the present invention, and FIG. 3 is an explanatory diagram showing the storage contents of the ROM 4 shown in FIG. Figure 4 shows CPU2 shown in Figure 2.
Flowchart showing the control procedure executed by
FIG. 6 is an explanatory diagram showing the storage contents of the RAM 5 shown in FIG. 2, FIG. 6 is a block diagram showing another configuration example of the embodiment of the present invention, and FIGS. 7 A and B are explanatory diagrams showing display examples of the embodiment of the present invention. It is a diagram. 1...Timer, 2...CPU, 3, 5, 14...
...RAM, 4...ROM, 6...Bus, 7,10
...I/O, 8...Loader, 8-1...Display unit,
8-2...keyboard, 9...input/output contact memory, 11...external device, 20'...external storage device,
21...Printer.
Claims (1)
記録すべき事象を登録情報として予め登録した第
１の記憶手段と、 プログラマブルコントローラにおいて発生した
事象が前記第１の記憶手段に登録された前記登録
情報に該当するか否かを判定する判定手段と、 該判定手段の判定結果が肯定判定のときには、
前記発生した事象と共に前記計時手段から得られ
る日時を記憶する第２の記憶手段と を具えたことを特徴とするプログラマブルコン
トローラの事象記録装置。 (2) 日時を計時する計時手段と、 プログラマブルコントローラにおいて発生可能
な事象を示す事象情報と、該事象情報を記録する
か否かを示す属性情報とを登録情報としてプログ
ラマブルコントローラから入力する入力手段と、 該入力手段により入力された登録情報を記憶す
る第１の記憶手段と、 プログラマブルコントローラにおいて発生した
事象が前記第１の記憶手段に登録された前記登録
情報に該当するか否かを判定する判定手段と、 該判定手段の判定結果が肯定判定のときには、
前記発生した事象と共に前記計時手段から得られ
る日時を記憶する第２の記憶手段と を具えたことを特徴とするプログラマブルコン
トローラの事象記録装置。[Scope of Claim for Utility Model Registration] (1) A clock means for measuring date and time; a first storage means in which events to be recorded that occur in the programmable controller are registered in advance as registration information; determining means for determining whether or not the registered information registered in the first storage means corresponds to the registered information; and when the determination result of the determining means is an affirmative determination,
and second storage means for storing the date and time obtained from the time measurement means together with the event that has occurred. (2) a clock means for measuring date and time; and an input means for inputting event information indicating an event that can occur in the programmable controller and attribute information indicating whether or not to record the event information from the programmable controller as registered information. , a first storage means for storing registered information inputted by the input means, and a determination for determining whether an event occurring in the programmable controller corresponds to the registered information registered in the first storage means. means, and when the determination result of the determination means is an affirmative determination,
and second storage means for storing the date and time obtained from the time measurement means together with the event that has occurred.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2237788U JPH01127003U (en) | 1988-02-24 | 1988-02-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2237788U JPH01127003U (en) | 1988-02-24 | 1988-02-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01127003U true JPH01127003U (en) | 1989-08-30 |
Family
ID=31240442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2237788U Pending JPH01127003U (en) | 1988-02-24 | 1988-02-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01127003U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03152602A (en) * | 1989-11-10 | 1991-06-28 | Fuji Electric Co Ltd | Programming device for programmable controller |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60159951A (en) * | 1984-01-30 | 1985-08-21 | Fuji Electric Co Ltd | Tracing system in information processing device |
| JPS62143108A (en) * | 1985-12-17 | 1987-06-26 | Omron Tateisi Electronics Co | Data recorder |
-
1988
- 1988-02-24 JP JP2237788U patent/JPH01127003U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60159951A (en) * | 1984-01-30 | 1985-08-21 | Fuji Electric Co Ltd | Tracing system in information processing device |
| JPS62143108A (en) * | 1985-12-17 | 1987-06-26 | Omron Tateisi Electronics Co | Data recorder |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03152602A (en) * | 1989-11-10 | 1991-06-28 | Fuji Electric Co Ltd | Programming device for programmable controller |