JPH01132177U - - Google Patents
Info
- Publication number
- JPH01132177U JPH01132177U JP2763788U JP2763788U JPH01132177U JP H01132177 U JPH01132177 U JP H01132177U JP 2763788 U JP2763788 U JP 2763788U JP 2763788 U JP2763788 U JP 2763788U JP H01132177 U JPH01132177 U JP H01132177U
- Authority
- JP
- Japan
- Prior art keywords
- reference data
- white reference
- peak value
- larger
- storage means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Image Input (AREA)
- Facsimile Image Signal Circuits (AREA)
Description
第１図…本考案の実施例にかかわる画像信号処
理装置におけるピーク検出回路、第２図…異常デ
ータを伴う画像信号、第３図…従来の画像信号処
理装置におけるピーク検出回路、第４図…第３図
のＡ／Ｄ変換器２の詳細図。
図において、１はアナログ画像信号入力端子、
２はＡ／Ｄ変換器、３はピーク値用レジスタ、４
は比較器、５はＤ／Ａ変換器、６はクロツクパル
ス入力端子、７はセレクト信号入力端子、８はマ
ルチプレクサ、８―１はインバータ、８―２，８
―３，８―４は論理素子、９は比較器、１０は異
常データ検知部である。
Fig. 1...Peak detection circuit in an image signal processing device according to an embodiment of the present invention, Fig. 2...Image signal with abnormal data, Fig. 3...Peak detection circuit in a conventional image signal processing device, Fig. 4... 4 is a detailed diagram of the A/D converter 2 of FIG. 3. FIG. In the figure, 1 is an analog image signal input terminal;
2 is an A/D converter, 3 is a peak value register, 4
is a comparator, 5 is a D/A converter, 6 is a clock pulse input terminal, 7 is a select signal input terminal, 8 is a multiplexer, 8-1 is an inverter, 8-2, 8
-3, 8-4 are logic elements, 9 is a comparator, and 10 is an abnormal data detection section.
Claims (1)
、 白基準データ読み込み時に前記記憶手段より提
供される記憶ピーク値と比較してピーク値を検出
する第１の比較器と、 白基準データ読み込み時に前記記憶ピーク値よ
り更に所定値以上大であるかどうかを検出する第
２の比較器と、 読み込んだ白基準データが前記記憶ピーク値よ
り大であり且つ前記記憶ピーク値を所定値以上上
回つていない時、読み込んだ白基準データを前記
記憶手段に記憶させる論理手段とを備えたことを
特徴とする画像信号処理装置におけるピーク検出
回路。[Claims for Utility Model Registration] Storage means for storing the peak value of white reference data; and a first comparator for detecting the peak value by comparing it with the stored peak value provided by the storage means when reading the white reference data. and a second comparator that detects whether or not the white reference data is larger than the stored peak value by a predetermined value or more when reading the white reference data, and if the read white reference data is larger than the stored peak value and is larger than the stored peak value. 1. A peak detection circuit in an image signal processing apparatus, comprising: logic means for storing read white reference data in the storage means when the white reference data does not exceed a predetermined value or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2763788U JPH01132177U (en) | 1988-03-02 | 1988-03-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2763788U JPH01132177U (en) | 1988-03-02 | 1988-03-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01132177U true JPH01132177U (en) | 1989-09-07 |
Family
ID=31250297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2763788U Pending JPH01132177U (en) | 1988-03-02 | 1988-03-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01132177U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6339274A (en) * | 1986-08-04 | 1988-02-19 | Mitsubishi Electric Corp | Picture reader |
-
1988
- 1988-03-02 JP JP2763788U patent/JPH01132177U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6339274A (en) * | 1986-08-04 | 1988-02-19 | Mitsubishi Electric Corp | Picture reader |
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