JPH01143256A - Solid-state image sensing device - Google Patents

Solid-state image sensing device

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Publication number
JPH01143256A
JPH01143256A JP62300909A JP30090987A JPH01143256A JP H01143256 A JPH01143256 A JP H01143256A JP 62300909 A JP62300909 A JP 62300909A JP 30090987 A JP30090987 A JP 30090987A JP H01143256 A JPH01143256 A JP H01143256A
Authority
JP
Japan
Prior art keywords
film
charge transfer
semiconductor substrate
photodiode
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62300909A
Other languages
Japanese (ja)
Inventor
Tadahiro Miwatari
忠浩 見渡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62300909A priority Critical patent/JPH01143256A/en
Publication of JPH01143256A publication Critical patent/JPH01143256A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To prevent any spike noise from being produced and an S/N from being deteriorated by reducing the occurrence of any crystal defect and any disturbance on an oxide film and a semiconductor substrate by flattening the surface of the semiconductor substrate at a photoelectric converter part and a charge transfer part. CONSTITUTION:A p-type silicon semiconductor substrate 1 of silicon is oxidized to form an insulating film 7' and further a polycrystalline silicon film 6 is formed thereon, on which film 16 a silicon nitride film 10 is formed by a chemical vapor phase growing method. The film 10 is etched into a predetermined pattern. Then, a resist film 12 is patterned to form an N-type region 5 of a photodiode. After removal of the resist film 12, a resist film 13 is patterned, and the film 16 is selectively etched with use of the film 10 as a mask to form an N-type region 6 of a charge transfer part. In succession, when the film 16, which is left at the photodiode part, is completely oxidized into a silicon oxide film, semiconductor substrate surface fractions corresponding to the photodiode part and the charge transfer part are selectively oxidized. Further, the film 14 is left to form a channel stop region 8. Films 7'', 7''', 7' are removed by etching and oxidized on their surfaces to form an insulating film 7. An interface between the insulating film 7 and the substrate 1 is flattened at the photodiode part.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、固体撮像装置に関し、特にCC1)を用いた
2矢元固体撮像装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device, and particularly to a two-arrow solid-state imaging device using CC1).

〔従来の技術〕[Conventional technology]

一般にCCU(電荷転送装置)を用いた固体撮像装置は
、半導体基板表面にP−N接合により形成した複数のホ
トダイオードからなる光電変換部と信号電荷を転送する
電荷転送部、ホトダイオードと電荷転送部に隣接して信
号電荷を請λ出すトランスファゲート領域、隣接したホ
トダイオード及びホトダイオードと電荷転送部を電気的
に分離するチャネルストップ領域より成っている。
In general, a solid-state imaging device using a CCU (charge transfer unit) has a photoelectric conversion section consisting of a plurality of photodiodes formed on the surface of a semiconductor substrate by a P-N junction, a charge transfer section that transfers signal charges, and a photodiode and charge transfer section. It consists of an adjacent transfer gate region for transferring signal charges, an adjacent photodiode, and a channel stop region for electrically separating the photodiode and the charge transfer section.

第4図は従来例の主要部を示すチップ断面図であり、ホ
トダイオード2は、P型半導体基板10表面に形成した
N型領域5により構成している。
FIG. 4 is a cross-sectional view of a chip showing the main parts of a conventional example, in which the photodiode 2 is constituted by an N-type region 5 formed on the surface of a P-type semiconductor substrate 10.

電荷転送部3は、この半導体基板1の表面の絶縁膜7上
に形成した多結晶シリコン電極4と、この電極下に形成
したN型領域6とで埋込みチャイル型CCDとして構成
している。又、トランスファケート領域9はP型領域で
、多結詰シリコン電榛5に読み出しパルスを加えること
によってホトダイオード2から電荷転送部3に信号が読
み出させるようになっている。各ホトダイオードは[、
接するホトダイオードや電荷転送部と高強度のP型佃域
であるチャネルストップ領域8により分離されている。
The charge transfer section 3 is configured as a buried child type CCD by a polycrystalline silicon electrode 4 formed on the insulating film 7 on the surface of the semiconductor substrate 1 and an N-type region 6 formed under this electrode. The transfer region 9 is a P-type region, and a signal is read out from the photodiode 2 to the charge transfer section 3 by applying a read pulse to the multi-packed silicon electrode 5. Each photodiode is [,
It is separated from the adjacent photodiode and charge transfer section by a channel stop region 8, which is a high-strength P-type region.

第4図に示した従来例ではホトダイオード2と電荷転送
部3の基板と絶縁膜の界面が凹部にへこんでいる。この
ため電荷転送部のN型領域6へ高濃度P型領域(8)か
らの不純物が後工程の熱処理で横方向に拡散し、N型領
域6の面積が減少するのを防いでいる。
In the conventional example shown in FIG. 4, the interface between the substrate and the insulating film of the photodiode 2 and the charge transfer section 3 is recessed. This prevents the impurities from the highly doped P-type region (8) from diffusing laterally into the N-type region 6 of the charge transfer section in the heat treatment in the subsequent step, thereby preventing the area of the N-type region 6 from decreasing.

こうした第4図に示した構造は窒化硅素膜を用いた選択
酸化法により自己整合的に形成することができる。
The structure shown in FIG. 4 can be formed in a self-aligned manner by selective oxidation using a silicon nitride film.

つまり第5図ra+に示すようにシリコンからなるP型
半導体基板1を酸化してe縁膜7全形成し窒化硅素膜1
0を堆積させる。
That is, as shown in FIG.
Deposit 0.

次に第5図fb)に示すように、窒化硅素膜10を所定
のパターンにエツチングする。
Next, as shown in FIG. 5fb), the silicon nitride film 10 is etched into a predetermined pattern.

次に第5図(C)に示すように写真食刻法によりレジス
ト膜12をパターニングする。この後、イオン注入法に
よシホトダイオードのN型領域5が形成される。
Next, as shown in FIG. 5(C), the resist film 12 is patterned by photolithography. Thereafter, the N-type region 5 of the photodiode is formed by ion implantation.

レジスト膜12を除去した後同様に第5図(d)に示す
ように写真食刻法によりレジスト膜13をパターニング
し、電荷転送部3のN型領域6を形成する。
After removing the resist film 12, the resist film 13 is similarly patterned by photolithography to form the N-type region 6 of the charge transfer section 3, as shown in FIG. 5(d).

次に、レジスト膜を除去後、第5図fe)に示すように
、ホトダイオードと電荷転送部を選択酸化に厚い絶縁膜
7“を形成する。
Next, after removing the resist film, as shown in FIG. 5(e), a thick insulating film 7'' is formed by selectively oxidizing the photodiode and the charge transfer portion.

次に、第5図(flに示すようにトランスファゲート領
域にレジスト膜15を設け、イオン注入法によりチャネ
ルストップ領域8として高濃度P型領域を形成する。
Next, as shown in FIG. 5 (fl), a resist film 15 is provided in the transfer gate region, and a heavily doped P-type region is formed as a channel stop region 8 by ion implantation.

最後に絶縁膜7′、7“をエツチング除去して表面を酸
化して絶縁膜7を形成しさらに多結晶シリコン電極4を
パターニングして形成すれば第4図のような固体撮像装
置は形成することができる。
Finally, the insulating films 7' and 7'' are removed by etching, the surface is oxidized to form the insulating film 7, and the polycrystalline silicon electrode 4 is patterned and formed to form a solid-state imaging device as shown in FIG. be able to.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の固体撮像装置は、ホトダイオード部の半
導体基板表面が選択酸化されて凹部にへこんでいる。こ
のためホトダイオード部には表面応力による結晶欠陥の
発生及び酸化膜と半導体基板の乱れが生じゃすくなシ、
固体撮像装置の固定スパイク雑音の発生や低照度でのS
/Nの劣化を引き起こすという欠点があった。
In the conventional solid-state imaging device described above, the surface of the semiconductor substrate in the photodiode portion is selectively oxidized and recessed. For this reason, crystal defects due to surface stress and disorder of the oxide film and semiconductor substrate do not occur in the photodiode part.
Occurrence of fixed spike noise in solid-state imaging devices and S
/N has the disadvantage of causing deterioration.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の固体撮像装置は、第1導電型の半導体基板の一
生面にそれぞれ選択的に設けられた第2474型領域を
きむ光電変換部及び電荷転送部と、前記電荷転送部に隣
接して設けられた高濃度第14m型のチャネルストップ
領域とを有する固体撮像装置において、前記半導体基板
の表面が前記光電変換部及び前記電荷転送部でそれぞれ
平坦及び凹状であるというものである。
The solid-state imaging device of the present invention includes a photoelectric conversion section and a charge transfer section selectively provided on the entire surface of a first conductivity type semiconductor substrate, and a charge transfer section provided adjacent to the charge transfer section. In the solid-state imaging device having a high concentration 14m type channel stop region, the surface of the semiconductor substrate is flat and concave at the photoelectric conversion section and the charge transfer section, respectively.

〔実施例〕〔Example〕

次に、不発明の実施例について図面を参照して説明する
。
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の主要部を示すチップ断面図
である。
FIG. 1 is a cross-sectional view of a chip showing the main parts of an embodiment of the present invention.

第2図(al〜第2図ff)はこの実施例の製造方法を
説明するための工程順に示したチップ断面図である。
FIG. 2 (al to FIG. 2 ff) are chip cross-sectional views showing the order of steps for explaining the manufacturing method of this embodiment.

シリコンからなるP型半導体基板】の−主表面にホトダ
イオードのへ型領域5及び電荷転送部のN型領域6がそ
れぞれ選択的に形成され、チャネルストップ領域8とト
ラスファゲート領域9が従来例の第4図と同様に形成さ
れている。
A hemi-type region 5 of a photodiode and an N-type region 6 of a charge transfer region are selectively formed on the main surface of a P-type semiconductor substrate made of silicon, and a channel stop region 8 and a transfer gate region 9 are formed as in the conventional example. It is formed in the same manner as shown in FIG.

本実施例が従来例と異なる点は、ホトダイオード部で絶
縁膜7と半導体基板1の界面が凹状にならず、平坦にな
っていることである。
The difference of this embodiment from the conventional example is that the interface between the insulating film 7 and the semiconductor substrate 1 in the photodiode portion is not concave but flat.

この固体撮像装置は、次のように自己整合で作成するこ
とができる。
This solid-state imaging device can be created by self-alignment as follows.

まず、第2図(a)に示すように、シリコンからなるP
型半導体基板1を酸化して絶縁膜7′を形成し多結晶シ
リコン膜16を約20nrnの厚さに形成し、次いでこ
の多結晶シリコン膜16の上に化学気相成長法で窒化硅
素膜10を形成する。
First, as shown in FIG. 2(a), P made of silicon
The type semiconductor substrate 1 is oxidized to form an insulating film 7', and a polycrystalline silicon film 16 is formed to a thickness of about 20 nm, and then a silicon nitride film 10 is formed on this polycrystalline silicon film 16 by chemical vapor deposition. form.

次に第2図+blに示すように窒化硅素膜10を所定の
パターンにエツチングする。
Next, as shown in FIG. 2+bl, the silicon nitride film 10 is etched into a predetermined pattern.

さらに第2図fc)に示すよpに、′cX人食刻法によ
りレジスト膜12をパターニングする。この後イオン注
入法によりホトダイオードのN型領域5が形成される。
Furthermore, the resist film 12 is patterned by the 'cX etching method as shown in FIG. 2 fc). Thereafter, the N-type region 5 of the photodiode is formed by ion implantation.

レジスト膜12を除去後、第2図(d)に示すように写
真食刻法によりレジスト膜13をパターニングする。次
にポリシリコン膜16をパターニングされた窒化硅素膜
10をマスクに選択的にエツチングする。さらにイオン
注入法によシミ荷転送部のN型領域6を形成する。
After removing the resist film 12, the resist film 13 is patterned by photolithography as shown in FIG. 2(d). Next, the polysilicon film 16 is selectively etched using the patterned silicon nitride film 10 as a mask. Furthermore, the N type region 6 of the stain transfer portion is formed by ion implantation.

次にレジスト膜13を除去後、ホトダイオード部に残し
た多結晶シリコン膜16が全て酸化硅素膜になるまで酸
化すると第2図telに示されるようにホトダイオード
部と電荷転送部の半導体基板表面は選択酸化される。
Next, after removing the resist film 13, the polycrystalline silicon film 16 left in the photodiode part is oxidized until it becomes a silicon oxide film, and as shown in FIG. Oxidized.

次に、第2図げ)に示すようにトランスファゲート領域
にレジスト膜14を残し、イオン注入法によりチャネル
ストップ領域8として高濃度P型頭域を形成する。最後
に選択酸化膜7“、7“′及び酸化&7’にエツチング
除去して表面を酸化して絶縁膜7を形5に、 Lさらに
多結晶シリコン電極4をパターニングして形成すれば第
1図のような本発明の固体撮像装置を作成することがで
きる。
Next, as shown in FIG. 2, a resist film 14 is left in the transfer gate region, and a heavily doped P-type head region is formed as a channel stop region 8 by ion implantation. Finally, selective oxide films 7", 7"' and oxidized &7' are removed by etching and the surface is oxidized to form insulating film 7 into shape 5, L, and polycrystalline silicon electrode 4 is patterned and formed, as shown in FIG. The solid-state imaging device of the present invention can be created as follows.

この実施例では、電荷転送部で半導体基板の表面が凹状
になっているので従来例と同様にN型領域の狭小化が防
止されるが、ホトダイオード部では平坦なので、表面応
力による結晶欠陥の発生等がなく固定スパイク雑音や低
照度の8/Nの劣化がない。
In this embodiment, the surface of the semiconductor substrate is concave in the charge transfer section, which prevents narrowing of the N-type region as in the conventional example, but since the photodiode section is flat, crystal defects occur due to surface stress. There is no fixed spike noise or 8/N deterioration in low illuminance.

第3図は本発明の第2の実施例の主要部を示すチップ断
面図である。
FIG. 3 is a cross-sectional view of a chip showing the main parts of a second embodiment of the present invention.

この実施例では、第1の実施例のように電荷転送部を選
択酸化して基板1と絶縁膜7の界面を凹状態にするので
はなく、深溝を基板1をエツチングすることにより形成
して電荷転送部での基板1と絶縁膜7の界面を凹状態に
している。この実施例では、高濃度のP型頭域(8)か
らの不純物拡散を防いで電荷転送部のN型領域6を狭小
化させないばかりでなく、溝の深さを深くすることによ
り転送電荷量を増大することができる。
In this embodiment, instead of selectively oxidizing the charge transfer portion to make the interface between the substrate 1 and the insulating film 7 concave as in the first embodiment, deep grooves are formed by etching the substrate 1. The interface between the substrate 1 and the insulating film 7 in the charge transfer section is made concave. In this embodiment, not only is it possible to prevent impurity diffusion from the highly-concentrated P-type head region (8) to prevent narrowing of the N-type region 6 of the charge transfer section, but also the amount of transferred charge is increased by increasing the depth of the groove. can be increased.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は電荷転送部の半導体基板
と絶縁膜の界面が凹状態になっているので電荷転送部の
不純物領域がチャネルストップ領域からの不純物拡散に
より狭小化し、転送電荷量が減少することはない。また
、ホトダイオード部の基板と絶縁膜の界面は平坦である
ので固体撮像装置の固定スパイクノイズの発生や低照度
でのS/Nの劣化などの画質劣化を生じない。
As explained above, in the present invention, since the interface between the semiconductor substrate and the insulating film in the charge transfer section is in a concave state, the impurity region in the charge transfer section is narrowed due to impurity diffusion from the channel stop region, and the amount of transferred charge is reduced. It will not decrease. Furthermore, since the interface between the substrate and the insulating film of the photodiode section is flat, image quality deterioration such as generation of fixed spike noise in a solid-state imaging device and deterioration of S/N at low illuminance does not occur.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例の主要部を示すチップ断
面図、第2図+a+〜第2図げ)は本実施例の製造方法
を説明するだめの工程11μに示したチップ断面図、第
3図は本)R,明の第2の実施例のキキ主要部を示すチ
ップ断面図、第4図は従来例の主要部を示すチップ断面
図、第5図+a)〜第5図ば)は従来例の製造方法の説
明するための工程順に示したチップ断面図である。 ■・・・・・・P型半導体基板、2・・・・・・ホトダ
イオード、3・・・・・・電荷転送部、4・・・・・多
結晶シリコン電極、5・・・・・・ホトダイオードのN
型領域、6・・・・・・電荷転送部のN型領域、7.7
’、7“、7″・・・・・・絶縁膜、8・・・・・・チ
ャネルストップ領域、9・・・・・・トランスファゲー
ト領域。
FIG. 1 is a cross-sectional view of a chip showing the main parts of the first embodiment of the present invention, and FIG. Figure 3 is a cross-sectional view of the chip showing the main parts of the second embodiment of the present invention, Figure 4 is a cross-sectional view of the chip showing the main parts of the conventional example, and Figures 5+a) to 5 Figure 3) is a cross-sectional view of a chip shown in order of steps for explaining a conventional manufacturing method. ■...P-type semiconductor substrate, 2...Photodiode, 3...Charge transfer section, 4...Polycrystalline silicon electrode, 5... Photodiode N
Type region, 6...N type region of charge transfer section, 7.7
', 7", 7"...Insulating film, 8...Channel stop region, 9...Transfer gate region.

Claims (1)

【特許請求の範囲】[Claims]  第1導電型の半導体基板の一主面にそれぞれ選択的に
設けられた第2導電型領域を含む光電変換部及び電荷転
送部と、前記電荷転送部に隣接して設けられた高濃度第
1導電型のチャネルストップ領域とを有する固体撮像装
置において、前記半導体基板の表面が前記光電変換部及
び前記電荷転送部でそれぞれ平坦及び凹状であることを
特徴とする固体撮像装置。
A photoelectric conversion section and a charge transfer section including a second conductivity type region selectively provided on one main surface of a semiconductor substrate of a first conductivity type, and a highly concentrated first charge transfer section provided adjacent to the charge transfer section. A solid-state imaging device having a conductive type channel stop region, wherein the surface of the semiconductor substrate is flat and concave at the photoelectric conversion section and the charge transfer section, respectively.
JP62300909A 1987-11-27 1987-11-27 Solid-state image sensing device Pending JPH01143256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62300909A JPH01143256A (en) 1987-11-27 1987-11-27 Solid-state image sensing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62300909A JPH01143256A (en) 1987-11-27 1987-11-27 Solid-state image sensing device

Publications (1)

Publication Number Publication Date
JPH01143256A true JPH01143256A (en) 1989-06-05

Family

ID=17890586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62300909A Pending JPH01143256A (en) 1987-11-27 1987-11-27 Solid-state image sensing device

Country Status (1)

Country Link
JP (1) JPH01143256A (en)

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