JPH01168048A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce a distortion generated in the crystal lattice of a chip by providing a protrusion partly on a heat sink, and adhering it to the part of the rear face of the chip. CONSTITUTION:A protrusion 10a is formed at the center of a heat sink 10, a leading electrode pattern 10b is formed on the surface, and a chip 3 is adhered to the top of the protrusion 10a of the sink 10 with a brazing material 11. In this case, since the top of the protrusion 10a has a relatively small area, the material 11 is adhered only to the center of the rear face electrode of the chip 3. As a result, when the material 11 is cooled to be contracted, its volumetric change is small, the chip 3 is not pulled, and a distortion generated in a crystal lattice is small. Accordingly, a dark spot is scarcely generated at a light emitting unit 3b.

Description

[Detailed Description of the Invention] [Summary] Regarding a semiconductor device in which a semiconductor chip is brazed to a heat radiator (heat sink), distortion of the crystal lattice due to contraction of the brazing material that connects the semiconductor depth and the heat sink (heat radiator) 6 In order to reduce this, a convex portion is provided on a portion of the heat sink, and the top of the convex portion and a portion of the back surface of the semiconductor chip are bonded with a brazing material.

[Industrial application field]

The present invention relates to a semiconductor device in which a semiconductor chip is brazed to a heat sink.

For example, in a device such as a surface-emitting LED in which a chip is bonded onto a heat sink using a brazing material, distortion occurs in the crystal lattice of the chip when the brazing material cools and contracts.

Here, it is necessary to suppress this distortion as much as possible to eliminate dark spots and obtain a high-quality surface optical element.

[Conventional technology]

FIG. 4 shows a schematic diagram of a general surface photodiode. In the figure, a heat sink 2 made of silicon or the like is bonded onto a stem 1, and a light-emitting LED chip 3, for example, is bonded onto the heat sink 2 with a conductive brazing material. As is conventionally known, the chip 3 has gallium arsenide (GaAs) on the back electrode.
FFi, a cladding layer, an active layer, a contact layer, and a gold (80) electrode are laminated, and light is emitted from the active layer by applying a voltage between both electrodes. A bonding wire 4 is drawn out from the gold electrode 3a on the surface of the depth 3 and connected to the post 5, while a bonding wire 6 is drawn out from the lead-out electrode pattern 2a formed on the surface of the heat sink 2 and connected to the post 7. ing. In this case, when bonding the chip 3 to the heat sink 2, a brazing material 8 is used as shown in FIG.

[Problem that the invention seeks to solve]

In the conventional example with the above configuration, if there is too much brazing material 8 for bonding the chip 3 to the heat sink 2, the brazing material 8 will spread over the entire surface of the back electrode of the chip 3, and when the brazing material 8 cools and contracts, the sixth As shown in the figure, the chip 3' is stretched and its crystal lattice is strained. As a result, there is a problem that dark spots are likely to occur in the light emitting part 3b shown in Fig. 5, and about 30% of the products are defective as shown in Fig. β. Therefore, in order to solve this problem, As shown in FIG. 7, it is conceivable to provide a four part 2b in the center of the heat sink 2 and fill this part with a brazing material to reduce the bonding area to the chip and to reduce distortion of the crystal lattice of the chip. However, in this case, the shape of the recess actually widens into a tapered shape like recess 2b', and it is difficult to form the recess with high precision. In this case, as shown in FIG. 6, the brazing material spreads over the entire surface of the back electrode of the chip.On the other hand, if there is too little brazing material, there is a problem that the chip cannot be bonded securely.

In addition, in order to solve the above problem, a method of reducing the suspension of the brazing material used may be considered, but with the current production technology of brazing material pellets, It is difficult to make the size smaller, and this method is also not preferable.

An object of the present invention is to reduce distortion of the crystal lattice due to shrinkage of the brazing material by devising the shape of the heat sink while using a predetermined brazing material.

[Means for solving problems]

The semiconductor device according to the present invention has a convex portion provided on a portion of the heat sink, and the top of the convex portion and a portion of the back surface of the semiconductor chip are bonded together with a brazing material.

[Effect]

In the present invention, since the spout is attached only to a part of the back electrode of the chip, there is little change in volume when the brazing material shrinks due to cooling, and distortion is less likely to occur in the crystal lattice of the chip.

〔Example〕

FIG. 1 shows a configuration diagram of an embodiment of the present invention. In the same figure, 1
0 is a heat sink, as shown in FIG. 2, a convex portion 10a is provided in the center, and an extraction electrode pattern 10b is provided on the surface of At the top, the depth 3 is bonded to the heat sink 10.The solder metal 11 is of a size that can be easily manufactured using the current technique of making a beret of solder metal.

In this case, since the top of the convex portion 10a has a relatively small area, unlike the conventional example shown in FIG. When the material 11 cools and contracts, its volume changes little, and the depth 3 is not stretched so much.
Less distortion occurs in the crystal lattice. Therefore, dark spots are less likely to occur in the light emitting part 3b, and as shown in FIG. 3, only about 14% of the products are defective.

Note that if one heat sink (one of the same size as the heat sink 10) is configured to have many convex parts,
The area of each convex portion can be made small, and the bonding area of the brazing material can also be made small, thereby making it possible to reduce distortion occurring in the crystal lattice. or,
For example, if a heat sink of the same size as the heat sink 10 is configured to have a large number of convex parts, it can be applied to a large chip that is larger than the chip 3, and the heat dissipation area is increased, so the heat dissipation performance can be improved by π1. can be obtained.

Furthermore, it is clear that the present invention is not limited to the above-described optical device, but can be applied to other semiconductor devices.

〔Effect of the invention〕

As explained above, according to the present invention, a convex portion is provided on a portion of the heat sink and a portion of the back surface of the chip is bonded to the convex portion, so that the brazing material is attached to the entire surface of the back electrode of the chip. Compared to conventional configurations, the adhesion area of the brazing material to the chip is smaller, and as a result, when the brazing material shrinks due to cooling, its volume changes less than in the conventional example, and there is less distortion in the crystal lattice of the chip. Particularly in optical devices, dark spots do not occur.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the present invention; Fig. 2 is a block diagram of a heat sink used in the present invention; Fig. 3 is a diagram comparing the defective rate between the conventional example and the present invention; Fig. 4 is a typical surface optical element. FIG. 5 is a schematic diagram of a conventional configuration; FIG. 6 is a diagram showing distortion occurring in the conventional example shown in FIG. 5; FIG. 7 is a conventional configuration diagram. In the figure, 3 is a light emitting LED chip (front surface optical chip), 3b is a light emitting part, 10 is a heat sink, 10a is a convex part, 10b is an extraction electrode pattern, and 11 is a brazing material. Hinoki 2. X Figure 3 Figure 4 Figure 5 Figure 6 Figure W&7

Claims (1)

[Claims] In a semiconductor device having a structure in which a heat sink (10) and a semiconductor chip (3) are bonded together with a brazing material (11), a convex portion (10a) is provided on a part of the heat sink (10). A semiconductor device characterized in that the top of the convex portion (10a) and a part of the back surface of the semiconductor chip (3) are bonded together with the brazing material (11).