JPH0117634B2 - - Google Patents
Info
- Publication number
- JPH0117634B2 JPH0117634B2 JP57225673A JP22567382A JPH0117634B2 JP H0117634 B2 JPH0117634 B2 JP H0117634B2 JP 57225673 A JP57225673 A JP 57225673A JP 22567382 A JP22567382 A JP 22567382A JP H0117634 B2 JPH0117634 B2 JP H0117634B2
- Authority
- JP
- Japan
- Prior art keywords
- audio
- intermediate frequency
- transistor
- video
- detector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Receiver Circuits (AREA)
Description
この発明は、例えばテレビジヨン受像機の中間
周波処理装置に関するものである。
一般によく用いられているテレビジヨン受像機
の中間周波処理装置の構成を第1図に示す。
第1図において、1は中間周波信号(以下IF
信号と称す)入力端子で、映像信号で振幅変調さ
れた映像搬送波(国内では58.75MHz)と音声信
号で周波数変調された音声搬送波(国内では
54.25MHz)とが入力されるものである。2はIF
信号を必要なレベルまで増幅するIF増幅器、3
はIF信号から音声搬送波のみ除去する音声搬送
波除去器(以下音声トラツプと称す)、4は映像
検波器で、その検波出力を映像信号出力端子5に
供給する。6は上記IF増幅器2の出力信号の映
像搬送波と音声搬送波からその差の周波数(国内
では4.5MHz)に音声搬送波を周波数変換する音
声第1検波器で、出力端子7に4.5MHzの音声イ
ンターキヤリア信号が出力されるものである。
上述のように、映像検波と音声第1検波とを分
離するのは次の理由によるものである。
すなわち、IF信号中の音声搬送波と色副搬送
波(国内では55.17MHz)とのビートで、いわゆ
る920KHzビートという画面に現われるしま模様
の主たる発生源が映像検波器4であるため、映像
検波器4に不必要な音声搬送波を除去する音声ト
ラツプ3を設けて920KHzビートの発生を防ぎ、
音声トラツプをかける前の信号を音声第1検波器
6に入力するようにしている。
次に音声トラツプ3の従来例を具体的に説明す
る。この例は集積回路に使用されている音声トラ
ツプである。
第2図において、8,9はIF信号入力端子で
あり、IF増幅器2の出力が供給される。10,
11はNPNトランジスタで、ベースは入力端子
8,9にそれぞれ接続されると共にコレクタは電
源端子12に接続され、エミツタと接地間には直
流バイアス手段を構成する定電流回路13,14
がそれぞれ接続されて、エミツタフオロワとして
動作する。15,16は両トランジスタ10,1
1のエミツタにそれぞれ接続された出力端子であ
り、インピーダンスが下げられて音声第1検波器
6に接続される。22,23はトランジスタ1
0,11のエミツタにそれぞれ抵抗17,18を
介して接続された出力端子であり、映像検波器4
に接続される。19および21は出力端子22,
23間に直列接続されたコイルおよびコンデン
サ、20はコイル19に並列接続されたコンデン
サであり、コイル19およびコンデンサ21と共
にリアクタンス回路網26を構成する直並列共振
回路を形成している。コイル19のインダクタン
スをL、コンデンサ20,21の容量をC1、C2
とすると
The present invention relates to an intermediate frequency processing device for, for example, a television receiver. FIG. 1 shows the configuration of an intermediate frequency processing device for a television receiver that is commonly used. In Figure 1, 1 is an intermediate frequency signal (hereinafter referred to as IF
A video carrier wave (58.75MHz in Japan) that is amplitude-modulated with the video signal and an audio carrier wave (58.75MHz in Japan) that is frequency-modulated with the audio signal are input at the input terminal (referred to as signal).
54.25MHz) is input. 2 is IF
IF amplifier that amplifies the signal to the required level, 3
4 is an audio carrier remover (hereinafter referred to as an audio trap) that removes only the audio carrier from the IF signal; 4 is a video detector; its detection output is supplied to the video signal output terminal 5; 6 is an audio first detector which converts the audio carrier wave from the video carrier wave and the audio carrier wave of the output signal of the above-mentioned IF amplifier 2 to the difference frequency (4.5MHz in Japan), and the output terminal 7 is a 4.5MHz audio intercarrier. A signal is output. As mentioned above, the reason for separating the video detection and the first audio detection is as follows. In other words, the video detector 4 is the main source of the striped pattern that appears on the screen, the so-called 920KHz beat, which is the beat between the audio carrier and the color subcarrier (55.17MHz in Japan) in the IF signal. Audio trap 3 is installed to remove unnecessary audio carrier waves to prevent the occurrence of 920KHz beats.
The signal before the audio trap is applied is input to the audio first detector 6. Next, a conventional example of the audio trap 3 will be specifically explained. An example of this is audio traps used in integrated circuits. In FIG. 2, 8 and 9 are IF signal input terminals to which the output of the IF amplifier 2 is supplied. 10,
Reference numeral 11 denotes an NPN transistor, the base of which is connected to the input terminals 8 and 9, the collector connected to the power supply terminal 12, and constant current circuits 13 and 14 constituting DC bias means between the emitter and ground.
are connected to each other and operate as an emitter follower. 15 and 16 are both transistors 10 and 1
The output terminals are respectively connected to the emitters 1 and 1, and are connected to the first audio detector 6 with reduced impedance. 22 and 23 are transistors 1
It is an output terminal connected to emitters 0 and 11 via resistors 17 and 18, respectively, and is connected to the video detector 4.
connected to. 19 and 21 are output terminals 22,
A coil and a capacitor 23 are connected in series, and 20 is a capacitor connected in parallel to the coil 19, forming a series-parallel resonant circuit that constitutes a reactance network 26 together with the coil 19 and the capacitor 21. The inductance of the coil 19 is L, and the capacitance of the capacitors 20 and 21 is C 1 , C 2
Then
【式】で直列共振
してインピーダンスが下がり、
[Formula] causes series resonance and the impedance decreases,
【式】で並列共振するためインピ
ーダンスが増大する。f1を54.25MHzにしてf2を
54.25MHzになるべく近づけると、第3図に示す
ように出力端子22,23での周波数特性は、
54.25MHzで急激に減衰する音声トラツプを実現
することができる。
しかし、音声多重化が普及するにつれて、音声
への市場要求がきびしくなつた現在、上記従来の
構成では、映像信号や同期信号成分の影響による
雑音、いわゆるバズ音や音声S/N等の特性は十
分とは言えず、上記特性を改善するためには、多
くの外付部品が必要となつたり、また集積化した
場合、そのためのピンが必要となるなどの欠点が
あつた。
本発明は上記のような従来の欠点を除去するた
めになされたもので、音声トラツプのリアクタン
ス回路網を利用し、音声検波器の入力の帯域フイ
ルタとして動作させ、音声搬送波のレベルを上げ
ることにより、上記バズや音声S/Nを改善した
中間周波処理装置を提供することを目的としてい
る。
以下、この発明の一実施例を図について説明す
る。
この発明においては、音声トラツプ3の構成を
変えた点に特徴がある。
第4図において、第2図と異なるところは、
NPNトランジスタ10,11のコレクタと電源
端子12との間にそれぞれ負荷回路を構成する負
荷抵抗24,25を挿入し、音声第1検波器6へ
至る出力端子15,16をそれぞれNPNトラン
ジスタ10,11のコレクタから取り出した点で
ある。
次に動作について説明する。音声トラツプにつ
いては第2図と全く同じ動作をするので、説明を
省略する。
音声第1検波器6への入力信号は、従来例では
NPNトランジスタ10,11のエミツタ側から
取り出していたわけであるが、本発明では、上記
トランジスタ10,11のコレクタ側から取り出
している。このようにすると、上記トランジスタ
10,11と抵抗17,18及びコイル19、コ
ンデンサ20,21からなる直並列共振回路と負
荷抵抗24,25とで差動増幅器が形成される。
そして、エミツタ抵抗に直並列共振回路のインピ
ーダンスが入るため、丁度音声トラツプと逆特性
の増幅器となるものである。第5図にその周波数
特性を示す。
図に示すように、直列共振点54.25MHzでイン
ピーダンスが小さくなるため利得が上がり、並列
共振点でインピーダンスが最大となり、利得は最
小となる。
つまり、音声トラツプのリアクタンス回路網2
6は、54.25MHzの音声搬送波周波数での利得が
映像搬送波周波数での利得よりも高くなり、また
不要な映像搬送波の側波帯での利得が低くなるよ
うな帯域フイルタとして動作する。このような特
性の増幅を通して音声第1検波器6に入力する
と、出力の4.5MHz信号のレベルが大きくなり、
同時に映像側波帯の影響も少なくなるので、音声
信号に復調したときに、特に弱電界時のS/Nが
良くなり、バズ音も少なくなる。
なお、上記実施例では、集積化した場合によく
使用される差動増幅器構成のものを示したが、単
なるトランジスタ1個によるエミツタ接地形式の
増幅器でも同様の効果を奏する。また、上記実施
例ではエミツタと接地間には定電流源を使用した
が、抵抗に置換しても同様の効果を示すことは言
うまでもない。
以上説明したように、この発明によれば、映像
中間周波信号と音声中間周波信号がベースに入力
されるトランジスタのエミツタ出力を音声トラツ
プを通して映像検波器に入力し、コレクタ出力を
音声検波器に入力し、音声トラツプのリアクタン
ス回路網を音声検波器の入力の帯域フイルタとし
て利用することによつて、外付部品を必要とせ
ず、特に弱電界での音声S/Nを改善でき、ま
た、バズ音も少なくすることができるという効果
がある。Impedance increases due to parallel resonance in [Equation]. f 1 to 54.25MHz and f 2 to
When approaching 54.25MHz as much as possible, the frequency characteristics at output terminals 22 and 23 are as shown in Figure 3.
It is possible to realize a voice trap that rapidly decays at 54.25MHz. However, as audio multiplexing has become more widespread, market demands for audio have become more stringent, and with the above conventional configuration, noise due to the effects of video signals and synchronization signal components, so-called buzz, audio S/N, etc. This was not sufficient, and there were drawbacks such as the need for many external parts in order to improve the above-mentioned characteristics, and the need for pins when integrated. The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional technology.The present invention utilizes a reactance network of a voice trap, operates as a bandpass filter at the input of a voice detector, and increases the level of the voice carrier wave. It is an object of the present invention to provide an intermediate frequency processing device that improves the buzz and audio S/N. An embodiment of the present invention will be described below with reference to the drawings. This invention is characterized in that the configuration of the audio trap 3 is changed. The differences in Figure 4 from Figure 2 are as follows:
Load resistors 24 and 25 constituting a load circuit are inserted between the collectors of the NPN transistors 10 and 11 and the power supply terminal 12, respectively, and the output terminals 15 and 16 leading to the first audio detector 6 are connected to the NPN transistors 10 and 11, respectively. This is the point taken from the collector. Next, the operation will be explained. The voice trap operates exactly the same as in FIG. 2, so its explanation will be omitted. In the conventional example, the input signal to the first audio detector 6 is
Although the current was taken out from the emitter side of the NPN transistors 10 and 11, in the present invention, it is taken out from the collector side of the transistors 10 and 11. In this way, a differential amplifier is formed by the transistors 10 and 11, the series-parallel resonant circuit consisting of the resistors 17 and 18, the coil 19, and the capacitors 20 and 21, and the load resistors 24 and 25.
Since the impedance of the series-parallel resonant circuit enters the emitter resistance, it becomes an amplifier with characteristics exactly opposite to those of an audio trap. Figure 5 shows its frequency characteristics. As shown in the figure, the impedance decreases at the series resonance point of 54.25MHz, increasing the gain, and the impedance reaches its maximum and the gain reaches its minimum at the parallel resonance point. In other words, the reactance network 2 of the audio trap
6 operates as a bandpass filter such that the gain at the audio carrier frequency of 54.25 MHz is higher than the gain at the video carrier frequency, and the gain is lower at the unwanted video carrier sidebands. When input to the first audio detector 6 through amplification with such characteristics, the level of the output 4.5MHz signal increases,
At the same time, the influence of video sidebands is reduced, so when demodulating into an audio signal, the S/N ratio is improved, especially in a weak electric field, and buzz noise is also reduced. In the above embodiment, a differential amplifier configuration that is often used when integrated is shown, but a common emitter type amplifier using a single transistor can also produce similar effects. Further, in the above embodiment, a constant current source was used between the emitter and the ground, but it goes without saying that the same effect can be obtained even if a resistor is used instead. As explained above, according to the present invention, the emitter output of the transistor whose base receives the video intermediate frequency signal and the audio intermediate frequency signal is input to the video detector through the audio trap, and the collector output is input to the audio detector. However, by using the reactance network of the audio trap as a bandpass filter at the input of the audio detector, it is possible to improve the audio S/N ratio, especially in weak electric fields, without the need for external components, and to reduce buzz noise. This has the effect of reducing the amount of
第1図は一般に用いられる中間周波処理装置の
ブロツク図、第2図は従来の音声トラツプの具体
例を示す回路図、第3図は音声トラツプの周波数
特性図、第4図はこの発明の特徴とする音声トラ
プの一例を示す回路図、第5図は第4図の回路の
増幅器としての周波数特性を示す図である。
図中、6は音声検波器、10,11はトランジ
スタ、12は電源端子、13,14は直流バイア
ス手段、24,25は負荷回路、26はリアクタ
ンス回路網である。なお、図中、同一符号はそれ
ぞれ同一または相当部分を示す。
Fig. 1 is a block diagram of a commonly used intermediate frequency processing device, Fig. 2 is a circuit diagram showing a specific example of a conventional audio trap, Fig. 3 is a frequency characteristic diagram of the audio trap, and Fig. 4 is a feature of the present invention. FIG. 5 is a circuit diagram showing an example of a voice trap, and FIG. 5 is a diagram showing the frequency characteristics of the circuit of FIG. 4 as an amplifier. In the figure, 6 is an audio detector, 10 and 11 are transistors, 12 is a power supply terminal, 13 and 14 are DC bias means, 24 and 25 are load circuits, and 26 is a reactance circuit network. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
ス電極に入力されるトランジスタ、このトランジ
スタのエミツタ電極と接地との間に設けられた直
流バイアス手段、上記トランジスタのコレクタ電
極と電源との間に設けられた負荷回路、上記トラ
ンジスタのエミツタ出力を入力とする映像検波
器、上記トランジスタのコレクタ出力を入力と
し、上記映像中間周波信号と音声中間周波信号の
差の周波数に上記音声中間周波信号を周波数変換
する音声検波器、上記トランジスタのエミツタ電
極と上記映像検波器との間に接続され、上記音声
中間周波信号の除去器を形成すると共に上記トラ
ンジスタのコレクタ出力の帯域フイルタを形成す
るリアクタンス回路網を備えた中間周波処理装
置。1 A transistor into which a video intermediate frequency signal and an audio intermediate frequency signal are input to the base electrode, a DC bias means provided between the emitter electrode of this transistor and ground, and a DC bias means provided between the collector electrode of the transistor and a power source. a video detector that receives the emitter output of the transistor as an input; and a video detector that receives the collector output of the transistor as an input, and converts the audio intermediate frequency signal into a frequency that is the difference between the video intermediate frequency signal and the audio intermediate frequency signal. an audio detector, comprising a reactance network connected between the emitter electrode of the transistor and the video detector, forming a remover for the audio intermediate frequency signal and forming a bandpass filter for the collector output of the transistor; Intermediate frequency processing equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57225673A JPS59114981A (en) | 1982-12-20 | 1982-12-20 | Intermediate frequency processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57225673A JPS59114981A (en) | 1982-12-20 | 1982-12-20 | Intermediate frequency processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59114981A JPS59114981A (en) | 1984-07-03 |
| JPH0117634B2 true JPH0117634B2 (en) | 1989-03-31 |
Family
ID=16832983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57225673A Granted JPS59114981A (en) | 1982-12-20 | 1982-12-20 | Intermediate frequency processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59114981A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7452148B2 (en) | 2004-03-19 | 2008-11-18 | Mitsubishi Pencil Co., Ltd. | Lead holding structure of mechanical pencil |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55143877A (en) * | 1979-04-25 | 1980-11-10 | Mitsubishi Electric Corp | Video intermediate frequency signal processing circuit |
-
1982
- 1982-12-20 JP JP57225673A patent/JPS59114981A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59114981A (en) | 1984-07-03 |
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