JPH0119319Y2 - - Google Patents

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Publication number
JPH0119319Y2
JPH0119319Y2 JP1981006881U JP688181U JPH0119319Y2 JP H0119319 Y2 JPH0119319 Y2 JP H0119319Y2 JP 1981006881 U JP1981006881 U JP 1981006881U JP 688181 U JP688181 U JP 688181U JP H0119319 Y2 JPH0119319 Y2 JP H0119319Y2
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JP
Japan
Prior art keywords
electrode
discharge
voltage
electrode group
electrodes
Prior art date
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Expired
Application number
JP1981006881U
Other languages
Japanese (ja)
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JPS57121049U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Priority to JP1981006881U priority Critical patent/JPH0119319Y2/ja
Publication of JPS57121049U publication Critical patent/JPS57121049U/ja
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Publication of JPH0119319Y2 publication Critical patent/JPH0119319Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案は、誘電体膜で被覆された帯状電極群を
直交するように対向させて構成した放電空間にガ
ス媒体を封入し、対向電極間に交流電圧を印加す
ることにより発光表示を行う、ドツトマトリツク
スタイプのプラズマデイスプレイパネルに関す
る。
[Detailed description of the invention] The invention is based on a method in which a gas medium is filled in a discharge space formed by orthogonally facing a group of band-shaped electrodes covered with a dielectric film, and an alternating current voltage is applied between the facing electrodes. This invention relates to a dot matrix type plasma display panel that performs luminescent display.

従来のドツトマトリツクスタイプのプラズマデ
イスプレイパネルは、駆動方法として対向する帯
状電極群のうち、一方の帯状電極群を時間分割し
て順次走査する様に交流電圧を印加し、残る一方
の帯状電極群に、上記の順次走査のタイミングに
同期させ、選択的に逆相の交流電圧を印加するこ
とにより、所望の表示パターンを得る方法をとつ
ている。このため、表示容量を増加する目的で電
極数を増加させていくにつれて、電極一本あたり
の走査時間つまり表示時間が減少するため表示輝
度が減少するという欠点があつた。この欠点を補
うためには、プラズマデイスプレイパネルに記憶
効果を持たせ、各帯状電極の被選択時間を十分長
くとる必要がある。
Conventional dot matrix type plasma display panels are driven by applying alternating current voltage to one of the opposing strip electrode groups in a time-divided manner and sequentially scanning the remaining strip electrode group. In this method, a desired display pattern is obtained by selectively applying an AC voltage of opposite phase in synchronization with the timing of the sequential scanning described above. For this reason, as the number of electrodes is increased for the purpose of increasing the display capacity, the scanning time per electrode, that is, the display time decreases, resulting in a decrease in display brightness. In order to compensate for this drawback, it is necessary to provide the plasma display panel with a memory effect and to ensure that each strip electrode is selected for a sufficiently long time.

本考案の目的は、放電維持電圧が放電開始電圧
よりも低いことを利用して、記憶効果を持たせた
プラズマデイスプレイパネルを提供することにあ
る。
An object of the present invention is to provide a plasma display panel that has a memory effect by utilizing the fact that the discharge sustaining voltage is lower than the discharge starting voltage.

本考案によれば、誘電体膜で被覆された第1の
電極群を有する基板と誘電体膜で被覆された第2
の電極群を有する基板の一対から構成され、第1
の電極群と第2の電極群とを、絶縁体のスペーサ
を介して対向せしめることにより放電媒体を満た
す放電空間を形成し、かつ第1の電極群と第2の
電極群に交流電圧を印加し放電媒体を発光せしめ
て表示領域を形成したプラズマデイスプレイパネ
ルにおいて、放電空間内で、かつ対向する第1の
電極群と第2の電極群と空間的に分離された位置
で、かつ前記第1及び第2の電極群のうち一方の
電極群の各々の電極の延在方向とほぼ平行し、か
つ一方の電極部の各々の電極の間であつて他方の
電極群に対向して位置する誘電体で被覆された第
3の電極を有することを特徴とする、プラズマデ
イスプレイパネルが得られる。
According to the present invention, a substrate having a first electrode group covered with a dielectric film and a second electrode group covered with a dielectric film are provided.
a pair of substrates having electrode groups of
A discharge space filled with a discharge medium is formed by making the electrode group and the second electrode group face each other via an insulating spacer, and an alternating current voltage is applied to the first electrode group and the second electrode group. In a plasma display panel in which a display area is formed by causing a discharge medium to emit light, the first and a dielectric located substantially parallel to the extending direction of each electrode of one electrode group of the second electrode group, and between each electrode of one electrode part and facing the other electrode group. A plasma display panel is obtained, characterized in that it has a third electrode covered with a body.

次に本考案の一実施例について図面を示して、
説明する。
Next, a drawing is shown for an embodiment of the present invention,
explain.

第1図は本考案によるプラズマデイスプレイパ
ネルの断面図である。ガラス基板1上には、透明
電極3、スペーサ5、本考案による第3の電極で
ある電極8、誘電体層9を順次形成した。
FIG. 1 is a sectional view of a plasma display panel according to the present invention. A transparent electrode 3, a spacer 5, an electrode 8 which is a third electrode according to the present invention, and a dielectric layer 9 were successively formed on a glass substrate 1.

透明電極は、化学気相蒸着法により作製した
SnO2:Sb膜(〜8000Å)を利用した。スペーサ
5は、酸化アルミニウムを主成分とする絶縁体粉
末を有機バインダーと供に混合し、ペースト状に
しスクリーン印刷し、膜厚50μに形成した。
Transparent electrodes were fabricated by chemical vapor deposition
A SnO 2 :Sb film (~8000 Å) was used. The spacer 5 was formed by mixing an insulating powder containing aluminum oxide as a main component with an organic binder, forming a paste, and screen-printing the mixture to a thickness of 50 μm.

電極8は、銀ペーストをスクリーン印刷し、膜
厚10μの銀厚膜を利用した。誘電体層9は鉛ガ
ラス粉末を有機バインダーと供に吹き付け焼成し
て形成した。
For the electrode 8, a thick silver film having a thickness of 10 μm was used by screen printing silver paste. The dielectric layer 9 was formed by spraying and firing lead glass powder together with an organic binder.

一方ガラス基板2上には、背面電極4、誘電体
層7、スペーサ6を順次形成した。背面電極4は
電極8と、またスペーサ6は、スペーサ5と同様
の方法で形成した。誘電体層7は鉛ガラスと有機
バインダーを混合してペースト状にしたものをス
クリーン印刷して形成した。
On the other hand, a back electrode 4, a dielectric layer 7, and a spacer 6 were formed in this order on the glass substrate 2. The back electrode 4 was formed in the same manner as the electrode 8, and the spacer 6 was formed in the same manner as the spacer 5. The dielectric layer 7 was formed by screen printing a paste made by mixing lead glass and an organic binder.

以上の様にして形成した種々の層を有するガラ
ス基板1とガラス基板2を透明電極3と背面電極
4とが直交する様に対向させると表示領域10で
ある放電空間が構成される。かつ、この放電空間
の中間位置すなわち、図示されているように透明
電極3と背面電極4とからほぼ等距離の位置に第
3の電極8が形成される。
When the glass substrate 1 and the glass substrate 2 having the various layers formed as described above are placed opposite each other so that the transparent electrode 3 and the back electrode 4 are perpendicular to each other, a discharge space which is the display area 10 is formed. Further, a third electrode 8 is formed at an intermediate position in this discharge space, that is, at a position approximately equidistant from the transparent electrode 3 and the back electrode 4 as shown.

この構成された電極群の位置関係を模式的に第
2図に示す。透明電極は、31〜38、背面電極は
1〜413、第3の電極は81〜88で示す。この様
にして得られた本考案のプラズマデイスプレイパ
ネルの動作原理を次に示す。
FIG. 2 schematically shows the positional relationship of this constructed electrode group. The transparent electrodes are indicated by 3 1 to 3 8 , the back electrodes are indicated by 4 1 to 4 13 , and the third electrodes are indicated by 8 1 to 8 8 . The operating principle of the plasma display panel of the present invention thus obtained will be described below.

上記の様にして構成された放電空間10には、
背面電極4と第3の電極8との間の放電開始電圧
が最少になるようなガス圧のNeガスをパツシエ
ンカーブより選択して封入する。尚、この様にし
て決定した背面電極4と第3の電極8との間の最
小放電開始電圧を以下VWと定義する。
In the discharge space 10 configured as described above,
Ne gas having a gas pressure that minimizes the discharge starting voltage between the back electrode 4 and the third electrode 8 is selected from the Patsien curve and sealed. Note that the minimum discharge starting voltage between the back electrode 4 and the third electrode 8 determined in this way is hereinafter defined as V W.

この状態で、透明電極3と背面電極4との間に
交流電圧を印加し放電を生じさせるには、放電開
始電圧に比較し十分高い電圧が必要である。ここ
で放電開始電圧とは、封入されたNeガスが放電
発光を開始する電圧である。
In this state, in order to apply an alternating current voltage between the transparent electrode 3 and the back electrode 4 to cause a discharge, a voltage sufficiently higher than the discharge starting voltage is required. Here, the discharge starting voltage is the voltage at which the enclosed Ne gas starts to discharge and emit light.

ところで、この交流電圧の印加に同期して、第
3の電極8と背面電極4とが放電を引き起こす様
な電圧パルスを電極8に加えるとこの放電に依り
イオン化したNe+及び電子あるいは光子が放電空
間10に供給されこの結果電極3と電極4の放電
開始電圧が減少し、放電開始電圧よりも低い電圧
で放電が起り維持される。以下、この電極3と電
極4の放電を維持する電圧をVS、またこの放電
開始電圧をVCと定義する。上述の事柄を第2図
及び第3図を用いて具体的に説明する。透明電極
1〜38には、透明電極3と背面電極4の間の放
電空間10で放電が維持されるに十分な電圧VS/2 の交流電圧が常に加えられる。今、電極41と電
極31及び電極41と電極37で選択される2点が
表示される場合について考える。電極41〜413
には透明電極31〜38と逆相で電圧VS/2の交流電 圧が印加され、かつ電極41にのみ電圧VAが重畳
される。一方第3の電極81及び87には供に電極
1〜38と同相で電圧VBの交流電圧が印加され、
かつ電極82〜86,88は接地される。(ただし上
記の印加電圧の大小関係は、VS/2+VA+VB> VW・VS/2+VA<VWかつVS+VA<VCとした。) VS/2+VA+VB>VWは、電極4と電極8での放 電が生ずることを保償するものである。
By the way, in synchronization with the application of this AC voltage, when a voltage pulse is applied to the electrode 8 that causes a discharge between the third electrode 8 and the back electrode 4, ionized Ne + and electrons or photons are discharged due to this discharge. As a result, the discharge starting voltage of the electrodes 3 and 4 decreases, and a discharge occurs and is maintained at a voltage lower than the discharge starting voltage. Hereinafter, the voltage that maintains the discharge between the electrodes 3 and 4 will be defined as V S , and the discharge starting voltage will be defined as V C . The above-mentioned matter will be specifically explained using FIGS. 2 and 3. An AC voltage of voltage V S /2 sufficient to maintain discharge in the discharge space 10 between the transparent electrode 3 and the back electrode 4 is always applied to the transparent electrodes 3 1 to 3 8 . Now, consider a case where two points selected by electrode 4 1 and electrode 3 1 and electrode 4 1 and electrode 3 7 are displayed. Electrode 4 1 ~ 4 13
An alternating current voltage of voltage V S /2 is applied to the transparent electrodes 3 1 to 3 8 in reverse phase, and a voltage V A is superimposed only on the electrode 4 1 . On the other hand, an AC voltage of voltage V B is applied to the third electrodes 8 1 and 8 7 in the same phase as the electrodes 3 1 to 3 8 ,
Moreover, the electrodes 8 2 to 8 6 and 8 8 are grounded. (However, the magnitude relationship of the applied voltages above is as follows: V S /2 + V A + V B > V W · V S /2 + V A < V W and V S + V A < V C. ) V S /2 + V A + V B > VW ensures that discharge occurs at electrodes 4 and 8.

また、VS/2+VA<VWは第3の電極にVBの印加 の無い時は、第3の電極8と電極4との間に放電
が生じないことを保償するものである。
Further, V S /2+V A <V W ensures that no discharge occurs between the third electrode 8 and the electrode 4 when V B is not applied to the third electrode.

また、VS+VA<VCは、第3の電極8と電極4
との放電が無い状態で電極3と電極4との放電が
生じないことを保償するものである。この様に
各々の電極に電圧を印加すると、透明電極31
8と背面電極41〜413の間には放電を維持する
のに十分な電圧VSが印加され、かつ、選択され
た2点に対応する場所にのみ第3の電極(電極8
,87)と背面電極(電極41)間とで放電を開
始するに十分な電圧VWが印加され、電極81と電
極41及び電極87と電極41との間で放電が開始
する。この放電により、透明電極31と背面電極
1及び透明電極37と背面電極41間に放電が誘
起され選択された2点のみが表示されることにな
る。以上の様に背面電極41〜413の各々に順次
VAの電圧を重畳するのに同期して第3の電極81
〜88にVBの電圧を選択して印加してやれば所望
の点で放電表示を開始させることができる。そし
て一端所望のパターンで放電を開始させた後は、
第3の電極81〜88は接地状態で保持させ、かつ
透明電極31〜38、背面電極41〜413間に放電維
持電圧VSを印加すれば、所望のパターンの表示
を維持することができる。
Moreover, V S +V A <V C means that the third electrode 8 and the electrode 4
This guarantees that no discharge occurs between the electrodes 3 and 4 when there is no discharge between the electrodes 3 and 4. When voltage is applied to each electrode in this way, the transparent electrodes 3 1 to 3
A voltage V S sufficient to maintain discharge is applied between 3 8 and the back electrodes 4 1 to 4 13 , and the third electrode (electrode 8
1 , 8 7 ) and the back electrode (electrode 4 1 ) is applied, and a voltage V W sufficient to start a discharge is applied between the electrode 8 1 and the electrode 4 1 and between the electrode 8 7 and the electrode 4 1 . starts. Due to this discharge, discharge is induced between the transparent electrode 3 1 and the back electrode 4 1 and between the transparent electrode 3 7 and the back electrode 4 1 so that only the two selected points are displayed. As described above, each of the back electrodes 4 1 to 4 13 is sequentially
In synchronization with superimposing the voltage of V A , the third electrode 8 1
If a voltage of VB is selected and applied between 8 and 8 , discharge display can be started at a desired point. After starting the discharge in the desired pattern,
By keeping the third electrodes 8 1 to 8 8 grounded and applying a discharge sustaining voltage VS between the transparent electrodes 3 1 to 3 8 and the back electrodes 4 1 to 4 13 , a desired pattern can be displayed. can be maintained.

この様に本実施例においては、プラズマデイス
プレイパネルに記憶効果を持たすことができたた
め、従来の様に電極を時間分割して走査する必要
が無くなり、表示容量の増加に伴う輝度の減少と
いう問題を解決することができた。
In this way, in this example, since the plasma display panel was able to have a memory effect, it is no longer necessary to scan the electrodes in time divisions as in the past, and the problem of decrease in brightness due to increase in display capacity is eliminated. I was able to solve it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に依るプラズマデイスプレイパ
ネルの断面図である。第2図は本考案に依るプラ
ズマデイスプレイパネルの電極配置の模式図であ
る。第3図は第2図で示した電極の各々に印加さ
れる電圧波形を示したものである。 図において、1,2……ガラス基板、3,31
2…38……透明電極、4,41,42,…413
…背面電極、5,6……スペーサ、7,9……絶
縁体層、8,81,82…88……第3の電極、1
0……放電空間。
FIG. 1 is a sectional view of a plasma display panel according to the present invention. FIG. 2 is a schematic diagram of the electrode arrangement of a plasma display panel according to the present invention. FIG. 3 shows the voltage waveforms applied to each of the electrodes shown in FIG. In the figure, 1, 2... glass substrate, 3, 3 1 ,
3 2 ... 3 8 ... transparent electrode, 4, 4 1 , 4 2 , ... 4 13 ...
... Back electrode, 5, 6 ... Spacer, 7, 9 ... Insulator layer, 8, 8 1 , 8 2 ... 8 8 ... Third electrode, 1
0...discharge space.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電体膜で被覆された第1の帯状電極群を有す
る基板と誘電体膜で被覆された第2の帯状電極群
を有する基板とを、第1の帯状電極群と、第2の
帯状電極群とがほぼ直交する様に対向させ前記第
1と第2の電極群の交点で放電空間を形成した、
プラズマデイスプレイパネルにおいて、前記放電
空間内の前記第1の帯状電極と第2の帯状電極群
とからほぼ等距離にある位置で、かつ前記第1及
び第2の電極群のうち一方の電極群の各々の電極
の延在方向とほぼ平行し、かつ前記一方の電極群
の各々の電極の間であつて他方の電極群に対向し
て位置する、誘電体膜で被覆された第3の電極群
を、設けたことを特徴とするプラズマデイスプレ
イパネル。
A substrate having a first band-shaped electrode group covered with a dielectric film and a substrate having a second band-shaped electrode group covered with a dielectric film are combined into a first band-shaped electrode group and a second band-shaped electrode group. A discharge space is formed at the intersection of the first and second electrode groups, which are opposed to each other so that they are substantially orthogonal to each other.
In the plasma display panel, at a position approximately equidistant from the first band-shaped electrode and the second band-shaped electrode group in the discharge space, and of one of the first and second electrode groups. a third electrode group covered with a dielectric film, which is substantially parallel to the extending direction of each electrode and located between each electrode of the one electrode group and facing the other electrode group; A plasma display panel characterized by having the following.
JP1981006881U 1981-01-21 1981-01-21 Expired JPH0119319Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981006881U JPH0119319Y2 (en) 1981-01-21 1981-01-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981006881U JPH0119319Y2 (en) 1981-01-21 1981-01-21

Publications (2)

Publication Number Publication Date
JPS57121049U JPS57121049U (en) 1982-07-27
JPH0119319Y2 true JPH0119319Y2 (en) 1989-06-05

Family

ID=29805152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981006881U Expired JPH0119319Y2 (en) 1981-01-21 1981-01-21

Country Status (1)

Country Link
JP (1) JPH0119319Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5248765B2 (en) * 1971-10-18 1977-12-12
JPS4898730A (en) * 1972-03-28 1973-12-14

Also Published As

Publication number Publication date
JPS57121049U (en) 1982-07-27

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