JPH01199453A - Manufacture of superconductor element - Google Patents

Abstract

PURPOSE:To stabilize superconduction characteristics avoiding a wet etching process by a method wherein unnecessary parts of an insulator layer covering the upper part of a ceramics superconductor layer are removed by dry etching and the composition ratio of the constituent elements in parts, which are exposed by the etching, of the superconductor layer is changed and the above parts are converted into insulating films. CONSTITUTION:A ceramics superconductor layer 2 is formed on a substrate 1 and after a prescribed insulator layer 3 is formed on the layer 2, masks 4 are formed on the upper part of the layer 3 according to a wiring pattern. Then, after parts, which are not covered with the masks 4, of the layer 3 are removed by dry etching, the composition ratio of the constituent elements in parts, which are exposed by the etching, of the layer 2 is changed and the above parts are converted into insulating layers 2i. For example, the layer 3 consisting of Si3N4 and so on is formed on the upper surface of the layer 2 and the resist layer 4 is formed thereon. Then, after the layer 3 is processed into a wiring pattern by dry etching, the exposed parts of the layer 2 are subjected to dry etching using chlorine gas and are converted into the layers 2i.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Field of Application Conventional Technology Problems to be Solved by the Invention Means for Solving the Problems Action Embodiment One Embodiment of the Present Invention Effects of the Invention [Summary] Regarding the manufacturing method of superconductor elements, the purpose of this research is to provide a manufacturing method of superconductor elements that can avoid the Uesoto etching process and stabilize the superconducting properties. a step of forming a predetermined insulator layer on the superconductor layer, a step of forming a mask on top of the insulator layer according to the wiring pattern, and a step of forming a predetermined insulator layer on the superconductor layer; a step of removing by dry etching the insulating layer that is not etched; and a step of converting the superconductor layer exposed by etching into an insulating layer by changing the composition ratio of the elements constituting the superconductor layer. Configure.

[Industrial application field]

The present invention relates to a method for manufacturing a superconductor element, and more specifically,
The present invention relates to a manufacturing method for forming a superconductor element using a ceramic-based superconductor.

In recent years, the speed of computers has increased dramatically, and approaches to increase the speed include increasing the number of processors, increasing the switching speed of devices, and shortening wiring distances by packaging these devices at high density. In order to achieve high-density wiring, it is necessary to create circuits with fine wiring patterns, and while this miniaturization reduces the cross-sectional area of the conductor used for wiring, it also increases the electrical resistance of the wiring. increase. As a result, the propagating electrical signal decreases and the waveform becomes distorted.

On the other hand, superconductors exhibit properties such as producing a macroscopic quantum phenomenon (superconducting phenomenon) in which electrical resistance becomes zero in an environment below a critical temperature, and having complete diamagnetic property (Meissner effect).

Therefore, if superconductors could be used as wiring materials instead of normal conductors such as copper, these problems would be greatly improved.

Conventional superconductors have a low transition temperature to the superconducting state, requiring the use of liquid helium or liquid hydrogen for cooling. However, these cooling media are difficult to handle and costly, making it difficult to realize superconductor devices.

However, recently, so-called high-temperature superconductors typified by Y-Ba-Cu-0 ceramics have appeared, and the possibilities for practical application of superconductor elements are greatly expanding. That is, Y-Ba-Cu-0 system.

La'-3r-Cu-0 system, La-13a-Cu-0
Ceramic superconductors such as those with high-temperature superconductors have high critical temperatures ranging from 40 to 90 degrees, so the formation of thin films of these high-temperature superconductors is extremely important for applications in microelectronics such as superconductor integrated circuits. be.

Superconductor wiring on integrated circuits is one such example, and is extremely practical.

Incidentally, a ceramic-based high-temperature superconductor has a crystal structure in which each constituent element is regularly arranged, and exhibits a high critical temperature only at a limited composition ratio. In order to apply such ceramic-based high-temperature superconducting materials to superconductor elements, it is first necessary to establish manufacturing technology, and it is required that the superconductor element exhibit stable superconducting properties even after it is formed. be done.

Considering that the current density is also miniaturized, 10' A/c
rA or more is required. Therefore, it is desired to establish a manufacturing technology that can realize superconductor elements with stable superconducting properties.

[Conventional technology]

Ceramic oxide high temperature superconductors range from 40 to 90 currently.
Because it becomes superconducting at relatively high temperatures, it has a wide range of applications, including semiconductor devices such as ICs, parts of various devices, and wiring within devices, and the demand for it is great. In order to meet these demands, it is necessary to efficiently form thin films of good quality. For example, the constituent elements of a semiconductor integrated circuit, including a Josephson junction, have the characteristic of being an all-thin film integrated circuit consisting of all thin film elements. For this reason, thin film properties, uniformity, and reproducibility based on crystallinity such as crystal grain size and orientation of the thin film are important factors for the yield and reliability of devices and, ultimately, superconducting integrated circuits.

As conventional methods for manufacturing superconductor elements, for example, sputtering methods and vapor deposition methods are known. In these methods, ceramic superconducting materials are deposited on a substrate according to the composition ratio, annealed in an oxygen atmosphere to form a superconducting thin film, and then patterned using normal photolithography technology. . The patterned substrate is etched by wet etching to form a predetermined superconductor element.

[Problem to be solved by the invention]

However, such conventional manufacturing methods for superconductor elements require a wet etching process using acid, water, etc. when processing them into devices. Since conductive materials have the property that their superconducting properties deteriorate when they come into contact with acids, water, etc., there has been a problem in that the properties of superconductor elements deteriorate after device fabrication.

This is Y-Ba-Cu-○ ceramics and La-B
In the case of superconductors using a-Cu-0 ceramics, the chemical activity of the main components Ba and Cu is strong and easily reacts with acids, making it difficult to pattern in the film formation process. In the wet etching process using water, acid, etc., the constituent components of the superconductor are liberated from the crystal, resulting in deterioration of superconducting properties. In addition, since wiring patterns were formed using a weight/metal etching process, it was difficult to make the line width of the wiring pattern comparable to that of Si-based wiring due to problems such as undercutting, which hindered the formation of integrated circuits using superconductors. I'm growing up. Therefore, there is a need for a manufacturing method that can finely process superconductor wiring.

Therefore, an object of the present invention is to provide a method for manufacturing a superconductor element that can avoid the wet etching process and stabilize the superconducting properties. In order to achieve the above-mentioned purpose, the method for manufacturing a semiconductor element includes a step of forming a ceramic superconductor layer on a substrate, a step of forming a predetermined insulator layer on the superconductor layer, and a step of forming a predetermined insulator layer on the superconductor layer. A step of forming a mask on the top of the layer according to the wiring pattern, a step of removing the insulator layer not covered by the mask by dry etching, and a step of removing the superconductor layer exposed by the etching. The method includes a step of changing the composition ratio of elements constituting the body layer to convert it into an insulating layer.

[For production]

In the present invention, after a ceramic superconductor layer is formed on a substrate, an insulator layer is formed on the superconductor layer, and a mask is formed according to a wiring pattern. Next, the insulating layer not covered by the mask is removed by dry etching, and the composition ratio of the elements constituting the superconductor layer exposed by the etching is changed to convert it into an insulating layer.

Therefore, the wet etching process is eliminated, and not only stable superconducting characteristics can be obtained, but also microfabrication of a superconductor element having a line width comparable to that of a Si-based semiconductor becomes possible.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

The figure is a diagram showing an embodiment of the method for manufacturing a superconductor element according to the present invention, and this embodiment is an example of producing superconducting wiring as a superconductor element.

Figures (a) to <e> are diagrams showing the manufacturing process of superconducting wiring, and will be explained in order of process.

<1> In the process diagram (a) in Figure (a), l is the substrate. As the substrate 1, for example, Si, MgO, sapphire, 5rTie, etc. are used. The reason why such a material is used as the substrate 1 is that it does not contain magnetic impurities, which is essential for realizing a superconducting integrated circuit made of thin film elements, and it is possible to obtain a clean substrate with good flatness.

A ceramic superconductor layer 2 having a composition of, for example, Yl Baz Cu307-X is formed on the base film to a thickness of 5.
Accumulate up to 000 people. The superconductor layer 2 is deposited, for example, by the following method.

That is, first, a ceramic superconductor layer 2 having a composition of YBa2Cu307-8 is deposited on a substrate 1 by a sputtering method, an EB vapor deposition method, or a CVD method.
Formed under temperature conditions of °C and then in the same chamber for 3
Heat treatment is performed under a temperature condition of 00 to 900'C while supplying oxygen. As a result, the intrusion of oxygen is appropriately adjusted and the material becomes a high-temperature superconductor.

(II) An insulator layer 3 having a composition of Si3N4 or SiO□ is formed on the upper surface of the superconductor layer 2 formed by the process shown in FIG. The insulator layer 3 has water resistance and chemical resistance, and functions as a protective film that protects the superconductor layer 2 from solvents, etc. during k-cyst application and removal, and prevents deterioration of superconducting properties. do. This insulator layer 3 is made of Si3N, for example.
4, and is formed using the CVD method.

(III) A resist N4 is formed according to a predetermined wiring pattern on the insulator layer 3 formed according to the process diagram (b) in FIG. Formation of this resist layer 4 is performed by a normal photolithography technique. That is, after a resist is applied onto the insulator layer 3, it is exposed according to the wiring pattern, unnecessary resist is removed, and a predetermined resist layer 4 is formed. resist layer 4
serves as a mask for the superconductor layer 2 during the etching process shown in Figure (d).

(IV) The insulating layer 3 formed according to the process diagram (b) in FIG. (d) is processed into a wiring pattern by dry etching, avoiding the wet etching process. This insulator layer 3 is processed as follows. That is, unnecessary portions of the insulator layer 3 (composition Si, N4) are anisotropically etched from above as indicated by the arrow in the figure by dry etching such as reactive ion etching (RIE) or plasma etching using CF4 + O□ gas. Perform vertical (vertical) etching. This anisotropic etching proceeds in the vertical direction of the substrate 1, and no undercut occurs, so that the width of the insulator N3 can be made as fine as, for example, about 1 (μm). Dry etching technology is currently used for Si-based semiconductors, and is capable of fine processing to the same degree as the line width of the wiring pattern of Si-based semiconductors. As a result, the superconductor N2 under the insulator layer 3 is made of Si
The wiring is formed with a line width comparable to that of the based semiconductor, and this part plays the role of a supercondensed wire. At this time, resists 1-[4 act as a mask to protect the underlying superconductor layer 2 and The insulator layer 3 is protected, and the insulator layer 3 is processed into the same shape as the wiring pattern.

Next, the superconductor N2 exposed by dry etching
is dry-etched from above as indicated by the arrow in the figure using, for example, a chlorine-based gas such as CCl4. That is, by removing mainly Cu among the constituent elements of the exposed superconductor layer 2 (unnecessary portion) using a chlorine gas, the superconductor N2(7) composition ratio becomes YIB a z C
changes from u307-tt, loses superconducting properties, and insulating layer 2
Convert to i.

That is, ceramic superconductors have a limited composition ratio, for example, Yl B ax Cux O? It exhibits superconducting properties only when -11, but if the composition ratio changes even slightly, it loses its superconducting properties and becomes just a ceramic, that is, an insulator. This conversion occurs easily, for example Cu in the compositional elements.
This occurs even when the composition ratio of 3 to 2.5 becomes an insulator. For this reason, it has conventionally been extremely difficult to form a superconductor element with stable superconducting properties.

Here, the inventor takes advantage of this property and actively changes the composition ratio of the constituent elements to convert it into an insulator, forming the super-flattened 4-body layer 2 only in the portions that are not treated. . This dry etching process takes much less time than the dry etching process that removed the insulator layer 3, and the composition ratio of the superconductor layer 2 protected by the insulator layer 3 and the resist layer 4 does not change. Shows stable superconducting properties. As a result, the superconductor layer 2, which has the same shape as the insulator layer 3 and the resist layer 4 formed according to the predetermined wiring pattern, exhibits stable superconducting properties, and the superconductor layer 2 is surrounded by an insulating JW2i.
is formed. Next, the resist N4 on the insulator layer 3 is removed using a solvent such as acetone.

After the above steps, the completed superconductor device is shown in Figure 1 (e
).

Such a superconductor integrated circuit is cooled, for example, by liquid nitrogen to a temperature close to 77, and when used in this state, the superconductor layer 2 exhibits superconducting properties, and its thin body resistance becomes O. As a result, the superconductor integrated circuit can operate at high speed with low power consumption. At this time, there is an insulation N5 around the superconductor layer 2, which effectively prevents current leakage between the superconductor layers 2. This superconductor layer 2 and insulating layer 5
Formation has the same effect as conventional pattern formation by wet etching after forming a superconductor layer, and the necessary pattern portion 2 of the superconductor layer is not exposed to chemicals, solvents, etc. during processing. Since it is not touched, there is no deterioration of superconducting properties.

In addition, since current semiconductor manufacturing technology can be used for dry etching of the Si-based insulator layer 3, it is now possible to perform microfabrication with a line width comparable to that of Si-based semiconductors (for example, 1 μm), which was previously difficult. It becomes possible to manufacture conductor integrated circuits. In other words, since conventional methods for manufacturing superconductor devices involve a wet etching process, not only is it impossible to reduce the line width of the superconductor device, but also deterioration of superconducting properties occurs during etching. This hindered the realization of superconductor integrated circuits. However, in the manufacturing method of the present invention, when buttering the superconductor layer, there is no damage or contamination to the superconductor element, and not only stable superconducting properties are obtained, but it is also superior to current Si-based semiconductors. It becomes possible to form superconductor elements having similar line widths, and thus a superconducting integrated circuit can be manufactured. Moreover, even after the superconductor element is formed, the surface of the superconductor layer 2 remains smooth,
Problems such as surface steps and flattening do not occur.

In this example, the composition of the superconductor layer is changed by etching Cu to form an insulating layer; however, the composition is not limited to this, and other constituent elements such as Ba may be used.

Of course, the same effect can be obtained by removing compounds such as Y, La, Sr, etc.

In addition, in this example, in order to change the composition ratio of the superconductor layer,
Although dry etching is used, the invention is not limited to this, and wet etching may also be used.

Furthermore, in the above embodiment, a case was explained in which a ceramic-based superconducting material having a composition of Y Ba 2 Cu 307-X was used. The same effect can be obtained using superconducting materials with other compositions, such as those in which 0 is replaced with a lanthanum-based element, Ba is replaced with an alkaline earth metal such as Sr, or a part of 0 is replaced with a halogen. The effect of this can be obtained.

Next, an example of such a substitution is shown.

In the case of LnBaz Cu307-X (Ln: lanthanum-based element), Ln includes Eu (europium),
Gd (gadolinium), Tb (terbium), 1Dy (dysprosium), Ho (holmium).

There are Er (erbium), Tm (thulium), and yb (interbium). Furthermore, even if two or more of these oxides are grown as a mixture, a high-temperature superconductor can be obtained.

Note that chlorides, bromides, or iodides of these metals are used as the growth material.

〔effect〕

According to the present invention, unnecessary parts of the insulating layer covering the upper part of the superconductor layer are removed by dry etching, and the composition ratio of the constituent elements in the superconductor layer exposed by the dry etching is changed to form an insulating film. Therefore, a wet etching step can be avoided, and a superconductor element having a line width comparable to that of a Si-based semiconductor can be manufactured while maintaining stable superconducting characteristics.

[Brief explanation of the drawing]

Figures (a) to (e) are diagrams showing a manufacturing process of an embodiment of the method for manufacturing a superconductor element according to the present invention. 1...Substrate, 2...Superconductor layer, 3...Insulator layer, 4...Resist layer (mask), 21...・
・Insulating layer. Procedural master's letter (method) 1. Indication of the case Relationship to the patent application No. 1983-24192 Patent applicant address 1015 Kamiodanaka, Nakahara-ku, Yozaki City, Kanagawa Prefecture Name (522) Fujitsu Ltd. (:4, Agent Postal code 211 Address Kanagawa Prefecture 1015 Kamiodanaka, Nakahara-ku, Yozaki City (
・ 5. Date of amendment order: March 31, 1985 (Delivery address: April 20, 1988) 6. In the "Detailed description of the invention" column of the specification subject to amendment, "Brief description of the drawings" column and drawings. 7. Contents of the amendment l) On page 9, line 17 of the specification, the text ``J in the figure refers to the present invention'' is amended to read ``Figure 1 refers to the present invention''. 2) In the 20th line of page 9, the phrase ``Figures (a) and (b) are'' is corrected to ``Figures 1 (a) and (b) are''. 3) In the second line of page 10 of the same document, the text "(I) Process shown in Figure 1 (a)" is corrected to "(I) Process shown in Figure 1 (a)". 4) In the third line of page 10 of the same document, the phrase ``In figure (a)'' is corrected to ``In figure 1 (a).'' 5) In the second line of page 11, the text "(■) Process shown in Figure (b)" is corrected to read "r (ff) Process shown in Figure 1". (6) In the third line of page 11, the phrase ``the process shown in Figure (a)'' is corrected to ``the process shown in Figure 1 (a).'' (7) r on page 1I, line 11 of the same (II[) figure <c>
The text ``Process'' has been corrected to ``(■) Process shown in Figure 1(c)''. (8) On page 11, line 12, the phrase "according to figure (b)" is corrected to "according to figure 1 (b)." (9) On page 11, lines 18 to 19, “Figure (d
)” should be corrected to “Fig. 1(d)”. aω In the first line of page 12 of the same document, "(■) The process shown in Figure (d)" is corrected to "(■) The process shown in Figure 1 (d)". 0υ In the second line of page 12 of the same document, the phrase ``according to figure (b)'' is corrected to ``according to figure 1 (b).'' @Page 18, line 7 of the same document, the text ``Figures F (a) to (e)'' is corrected to ``Figures 1 (a) to (e) are''. Correct the side exit surface as shown in the attached sheet. that's all

Claims (1)

[Claims] A step of forming a ceramic superconductor layer on a substrate, a step of forming a predetermined insulator layer on the superconductor layer, and a wiring pattern on the top of the insulator layer. a step of forming a mask according to the mask, a step of removing the insulating layer not covered by the mask by dry etching, and a step of removing the elements constituting the superconductor layer from the superconductor layer exposed by the etching. 1. A method for manufacturing a superconductor element, comprising: changing the composition ratio of and converting it into an insulating layer.