JPH01201917A - Impurity introduction method for semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To treat impurity-introduction into the side walls of a groove and the inner circumference face of the base at a high speed and further, make it possible to introduce impurities into a semiconductor substrate at a uniform impurity concentration, by installing the semiconductor substrate in parallel to a thin plate-shaped plasma region having a dense, uniform ion electric current distribution. CONSTITUTION:An extensive plate-shaped plasma region 18 of high density is formed between a plasma beam source 10 and an electrode facing the above beam source by the effect of a magnetic field which is formed by: a plurality of focusing coils 26; a permanent magnet for an electrode facing its magnet which is installed at the rear of the electrode 12; and the permanent magnet 44 which is installed at the outlet of the plasma beam source 10. A doping gas introduced into a vacuum chamber 22 from a gas introducing part 28 is ionized at the plasma region 18 to be impurity ions. The impurity ions collide with a semiconductor substrate 16 on a sample electrode 14 where a prescribed negative voltage is impressed to the facing electrode 12 and then, impurities are introduces into the side walls of a groove as well as the base. In such a case, as the inside of the vacuum chamber 22 is kept at a high vacuum 10<-3>-10<-4>Torr, the average free path of the impurity ions becomes large and then, the impurities are introduced into both side walls of the groove and the base having a large aspect ratio.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of introducing impurities into a semiconductor substrate, and particularly to a method of introducing impurities into the side walls and bottom of a trench formed in a semiconductor substrate.

[Prior art and its issues]

Semiconductor memory, especially dynamic random access memory with a storage capacity of 1 megabit or more! J(DRA
The memory cell structure of M) is a stacked capacitor type, or a so-called trench in which the side walls and bottom surface of a trench formed perpendicularly to a semiconductor substrate serve as a capacitor, as described in JP-A No. 62-272561, for example. 2 with capacitor
There are two structures.

This trench capacitor will be explained using the element cross-sectional view of FIG.

For example, a trench 52 is formed in an n-type semiconductor substrate 16, and an n-type impurity layer 46 having a high impurity concentration is formed on the sidewalls and bottom of the trench 52 for the purpose of increasing the capacitance value and separating trench capacitors. .

An insulating film 48 is formed as a dielectric film on the sidewalls and bottom of the trench 52 on the impurity layer 46 with a high impurity concentration, and a polycrystalline silicon film 50 containing impurities is further formed in the trench 52.
Embed. In other words, a trench capacitor for storing information is constituted by the impurity layer 46, the insulating film 48, and the polycrystalline silicon film 5o.

In a 16 megabit DRAM, this trench capacitor is expected to have a trench opening size of 05 μm or less and a trench depth of approximately 5 μm.

When the ratio of the groove depth to the size of the groove opening, that is, the aspect ratio increases, it becomes difficult to introduce impurities into the sidewalls and bottom of the groove.

For example, as described in pages 31 to 36 of the 33rd Semiconductor Integrated Circuit Technology Symposium Proceedings (December 3, 1987), an ion implanter is used to inject impurities into the side walls and bottom of the trench. A method has been proposed to introduce

In this method, the semiconductor substrate is tilted according to the aspect ratio of the groove, and impurities are introduced into the side walls and bottom of the groove by rotational ion implantation in which the semiconductor substrate is rotated. However, in this rotary ion implantation method, as the aspect ratio of the groove increases, the angle between the ion beam and the surface of the semiconductor substrate approaches perpendicular, making it difficult to introduce impurities into the groove.

Therefore, for example, using the microwave electron cycloton resonance (hereinafter referred to as ECR) plasma doping method described in pages 103 to 108 of the December 1987 issue of Electronic Materials (published by Kogyo Research Association), the side walls of the grooves were A method of introducing impurities into the bottom surface has also been proposed.

This ECR plasma doping method will be explained with reference to FIG. 5, which is an explanatory diagram showing a side arrangement of an ECR plasma doping apparatus.

A ring-shaped electromagnet 54 applies a resonant magnetic field (8
75 Gauss). This electromagnet 54 is connected to the sample electrode 1
A diverging magnetic field is formed in which the magnetic field strength gradually weakens toward 4. A microwave of 2.45 GHz is applied from the upper microwave waveguide 58 under this magnetic field. At this time, gas molecules are activated within the vacuum chamber 22 by the cycloton movement of electrons, and high-density plasma is generated.

For example, a mixed gas of arsine (ASH3) and helium is introduced as a doping gas, and ionized arsenic is generated in this plasma region. By applying a high frequency voltage to the sample electrode 14 by the high frequency power supply 56 and a diverging magnetic field whose magnetic field strength gradually weakens toward the semiconductor substrate 16,
The semiconductor substrate 16 is irradiated with ionized impurities to introduce the impurities into the inner peripheral surface of the groove.

However, in the ECR plasma doping method, ECR
The ion current value of the groove exit hole 6o is 2 mA/crj degree, and with the current 6-inch semiconductor substrate, it takes about 100 seconds per substrate to introduce impurities into the inner peripheral surface of the groove.
The support for high-speed processing is not sufficient. Furthermore, the electromagnet 54
Since ions are accelerated using a divergent magnetic field, the concentration of impurities introduced within the semiconductor substrate becomes non-uniform.

[Purpose of the invention]

The purpose of the present invention is to solve the above-mentioned problems, and to introduce impurities into the inner peripheral surface of the side walls and bottom of the groove at high speed.
Moreover, it is an object of the present invention to provide an impurity introduction method that can introduce impurities into a semiconductor substrate at a uniform impurity concentration.

[Means to solve the problem]

In order to achieve the above object, the following method is used in the impurity introduction method of the present invention.

A plasma beam source that generates a beam-shaped plasma for forming plasma, a counter electrode to which a positive voltage is applied to the plasma beam source, and a counter electrode placed opposite to the plasma beam source, and a thin plate-like It is equipped with means for shaping the plasma region, a sample electrode to which a negative voltage is applied to the facing electrode and arranged parallel to the plate-shaped plasma region, a gas inlet for introducing doping gas, and an exhaust system. Place the semiconductor substrate on the sample electrode in the vacuum chamber,
After the vacuum chamber is evacuated by the exhaust system, a thin plate-shaped plasma region is formed between the plasma beam source and the counter electrode, and the doping gas is introduced into the vacuum chamber from the gas inlet, and is then applied to the semiconductor substrate in a predetermined area. Impurities are introduced into the semiconductor substrate by applying a voltage of .

〔Example〕

The present invention will be described in detail below using the drawings.

FIG. 1jal and FIG. 1(b) show an apparatus used for introducing impurities in the present invention, and FIG. FIG. 3 is an explanatory diagram showing a planar arrangement of a cross section.

FIG. 2 is a sectional view showing a plasma beam source used for introducing impurities according to the present invention.

The following description will be made with alternate reference to FIG. 1(a), FIG. 1(b), and FIG. 2.

A plasma beam source 10 that generates a beam-shaped plasma and a permanent magnet 44 are provided on the wall surface of the vacuum chamber 22, and a water-cooled magnet 44 is provided to which a positive voltage is applied to the plasma beam source 10 and is placed opposite the plasma beam source 10. A counter electrode 12 is provided. This plasma beam source 10 and counter electrode 1
2 Generate plasma between the two. A permanent magnet for a counter electrode (not shown) is arranged on the back surface of the counter electrode 12, and plasma generated by the magnetic field of the permanent magnet for a counter electrode and a plurality of focusing coils 26 provided outside the vacuum chamber 22 is It is focused on the counter electrode 12.

Further, between the exit of the plasma beam source 10 and the vacuum chamber 22, the thickness of the plasma is compressed by the repulsive magnetic field of a pair of permanent magnets 44 with magnets with the same polarity facing each other, and the plasma is shaped into a thin plate shape with an expanse. A high-density plasma region 18 indicated by a broken line 20 is formed.

In other words, as a means of shaping plasma into a thin plate shape,
It consists of a plurality of focusing coils 26 provided outside the vacuum chamber 22 and a pair of permanent magnets 44 provided between the exit of the plasma beam source 10 and the entrance of the vacuum chamber 22.

Note that this focusing coil 26 may be placed inside the vacuum chamber 22. The semiconductor substrate 16 is placed on a sample electrode 14 arranged substantially parallel to a thin plate-shaped plasma region 18 . At this time, the sample electrode 14 applies a negative voltage to the counter electrode 12. The voltage applied to this sample electrode 14 is controlled independently of the voltage applied between the plasma beam source 10 and the counter electrode 12.

As shown in FIG. 2, the plasma beam source 10 that generates beam-shaped plasma includes an auxiliary cathode 62 consisting of a tankle pipe that penetrates the center of the water-cooled box 40 and also serves as a gas inlet, and a disk-shaped lantern. Hexaboloid (LaB6
), a disk-shaped hot plate 66 made of tungsten, an outer cylinder 42 and camp 68 made of molybdenum, and an intermediate electrode 60.

To generate plasma, first, the pressure inside the vacuum chamber 22 is reduced by the exhaust system 24.
After evacuating to a vacuum level of about 10 Torr,
An inert gas such as argon is introduced through the auxiliary cathode 62 and the inert gas introduced between the auxiliary cathode 62 and the counter electrode 12 is discharged.

At this time, the pressure inside the vacuum chamber 22 is 10 Torr~10
, held at Torr.

When the main cathode 64 is heated to a high temperature by bombarding the lanthanum of the main cathode 64 by this discharge, the discharge then shifts to between the main cathode 64 and the counter electrode 12.

At this time, the intermediate electrode 60 narrows the plasma using a magnetic field, and the opening of the intermediate electrode 60 has an inner diameter of about several μm. Therefore, although the vacuum chamber 22 is in a high vacuum, the vicinity of the main cathode 64 is maintained at a low vacuum. be done. Therefore, the high temperature main cathode 64 also continues to emit a large amount of thermoelectrons, and a large discharge current is maintained.

As this thermionic emission source, a coil-shaped lanthanum hexaboloid or the like may be used instead of the disk-shaped main cathode.

A plurality of focusing coils 26 shown in FIG. 1(a) and FIG. Due to the action of the magnetic field formed by the magnet 44,
A plate-shaped plasma region 18 with high density and spread is formed between the plasma beam source 10 and the counter electrode 12.

Introducing impurities into the inner peripheral surface of a groove formed in a semiconductor substrate is
As doping gases into the vacuum chamber 22 from the gas inlet 28, for example, n-type impurities include arsine (AsH3) and phosphine (PH3) diluted with an inert gas, and p-type impurities include dibora diluted with an inert gas. ′”< (”f
32=ms') etc. are introduced.

This doping gas is ionized in the plasma region 18 and becomes impurity ions. These impurity ions are removed from the counter electrode 12.
impurities collide with the semiconductor substrate 16 on the sample electrode 14 to which a predetermined negative voltage is applied, and impurities are introduced into the side walls and bottom of the groove.

As mentioned above, the degree of vacuum in the vacuum chamber 22 is 10'l'orr.
Since the vacuum is as high as ~10 Torr, the mean free path of impurity-ions becomes large, and impurities are introduced into the side walls and bottom of the groove having a large aspect ratio.

At this time, the plasma state is determined by the plasma beam source 10 independently of the accelerating voltage of the impurity ions colliding with the semiconductor substrate 16.
It can be controlled by a voltage applied between the electrode 12 and the counter electrode 12.

Because the plasma is compressed by a large amount of thermionic emission from the plasma beam source 10 and the repulsive magnetic field of the permanent magnet 44 placed at the exit of the plasma beam source 10, a high-density and uniform plasma region 18 is formed. A high ion current value of 5 mA/ci to 100 mA/i and a uniform ion current distribution can be obtained on the semiconductor substrate 16. Therefore, it is possible to introduce impurities into a semiconductor substrate with a uniform impurity concentration within the substrate and at a speed more than 10 times that of the conventional ECR plasma doping method.

Impurities can be uniformly introduced into the bottom and side walls of the groove by changing the voltage applied to the sample electrode 14 and the vacuum degree of the vacuum chamber 22 depending on the size of the groove opening, the groove depth, and the groove shape. Can be done. Further, the impurity concentration can be controlled by processing time, doping gas flow rate, doping gas dilution degree with inert gas, and the like.

Also, unlike the normal ion implantation method, impurities can be introduced even if the voltage applied to the sample electrode 14 is extremely low.
Impurities can be introduced without causing plasma irradiation damage to the sample substrate.

FIG. 3 is an explanatory diagram showing a planar arrangement of a cross section of the main parts of the device in another embodiment of the device for introducing impurities.

The plasma region 18 is shaped like a plate that extends in the vertical direction. The semiconductor substrates 16 are placed on a plurality of sample electrodes 14 arranged vertically parallel to the plasma region 18 and sandwiching the plasma region 18, so that impurity introduction processing is performed on the plurality of semiconductor substrates 16 at the same time. Alternatively, the plasma region may be shaped into a horizontally extending plate, and sample electrodes may be placed above and below this plasma region.

The above example has been explained in which impurities are introduced into the side walls and bottom of a trench formed in a semiconductor substrate, but for example, it is possible to form a source/drain region in a MOS transistor, which does not require a strict ion implantation amount, or to form a gate made of polycrystalline silicon in a MOS transistor. The impurity introduction method of the present invention can also be applied to the introduction of impurities into electrodes or the formation of emitter regions in bipolar transistors.

〔Effect of the invention〕

As is clear from the above explanation, by placing the semiconductor substrate parallel to a thin plate-shaped plasma region with a high density and uniform ion current distribution, impurities can be introduced into the semiconductor substrate at high speed and uniformly. This is possible depending on the impurity concentration.

In addition, impurities can be introduced even when the voltage applied to the semiconductor substrate is extremely low, and impurities can be introduced without causing plasma irradiation damage to the semiconductor substrate.

[Brief explanation of the drawing]

FIG. 1(a) is an explanatory diagram showing the side layout of a cross section of the main parts of the device used for introducing impurities in the present invention, and FIG. , FIG. 2 is a cross-sectional view showing a plasma beam source used for impurity introduction in the present invention, FIG. 3 is an explanatory view showing a cross-sectional plane layout of other main parts of the device used for impurity introduction in the present invention, and FIG. 4 is a trench 5 is an explanatory diagram showing a conventional ECR plasma doping apparatus. 10... Plasma beam source, 12... Counter electrode, 14... Sample Electrode, 16...Semiconductor substrate, 18...Plasma region, 22...Vacuum chamber. Fig. 1 (Q) 10.7 Toward the lasma beam 12 Opposing guest attendant 14, formula Electrode] 6 +4 ↓ Provisional 18 >Russ' 74 Negative region 22, vacuum chamber Fig. 2 Fig. 3 Fig. 4

Claims (1)

[Claims] A plasma beam source that generates a beam-shaped plasma for forming plasma; a counter electrode to which a positive voltage is applied to the plasma beam source and is disposed opposite to the plasma beam source; a vacuum comprising: means for shaping a plasma region; a sample electrode to which a negative voltage is applied to the counter electrode and arranged parallel to the plasma region; a gas inlet for introducing a doping gas; and an exhaust system. A semiconductor substrate is placed on the sample electrode in the chamber, and after the vacuum chamber is evacuated by the exhaust system, a plate-shaped plasma region is formed between the plasma beam source and the counter electrode, and the gas inlet is A method for introducing impurities into a semiconductor integrated circuit device, the method comprising: introducing a doping gas into the vacuum chamber, and further applying a predetermined voltage to the semiconductor substrate to introduce impurities into the semiconductor substrate.