JPH01208943A - Receiver - Google Patents

Receiver

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Publication number
JPH01208943A
JPH01208943A JP63033138A JP3313888A JPH01208943A JP H01208943 A JPH01208943 A JP H01208943A JP 63033138 A JP63033138 A JP 63033138A JP 3313888 A JP3313888 A JP 3313888A JP H01208943 A JPH01208943 A JP H01208943A
Authority
JP
Japan
Prior art keywords
signal
intermediate frequency
vco
output
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63033138A
Other languages
Japanese (ja)
Inventor
Shogo Iizuka
飯塚 捷吾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63033138A priority Critical patent/JPH01208943A/en
Publication of JPH01208943A publication Critical patent/JPH01208943A/en
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To obtain a synchronizing detection recovered carrier while making a local oscillation frequency stable with a simple circuit constitution by adopting the constitution of PLL such that a phase difference between a received intermediate frequency signal and a signal from a reference oscillator is detected and its error voltage is fed back to a VCO(voltage controlled oscillator) being a local oscillation frequency source. CONSTITUTION:In the case of the reception of a modulation wave FR to a reception input 11, a mixer 12 mixes it with a local oscillation signal (FL+ or -FR) from a VCO 17 to obtain an intermediate frequency signal (¦FR-FL+ or -DELTAFL¦). The intermediate frequency signal is given to a synchronizing detector 13 and the phase is compared with a signal (FIF+ or -DELTAFIF) from a reference oscillator 15 at a PD(phase comparator) 14 to produce a phase error voltage. The phase error voltage is subjected to the elimination of noise and modulation component by an LPF 16 and the result is fed to the frequency control terminal of the VCO 17, then the PLL circuit is constituted to control te VCO 17 so as to obtain the relation of ¦FL+ or -DELTAFL¦=FIF+ or -DELTAFIF. Thus, the reference oscillation signal is equivalent to a reception carrier and fed to the synchronizing detector 13 and used as the synchronizing detection recovered carrier.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ディジタル無線通信等に使用する受信装置に
関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a receiving device used in digital wireless communications and the like.

従来の技術 従来、この種の受信装置では、検波回路に同期検波カー
用いられており、同期検波に必要な搬送波を再生する技
術として代表的なものに(1)てい倍器、(2)逆変調
法、(3)コスタス法、等が知られている。
Conventional technology Conventionally, in this type of receiving device, a synchronous detection car has been used in the detection circuit, and the typical technologies for regenerating the carrier wave required for synchronous detection are (1) multiplier, (2) reverse A modulation method, (3) Costas method, etc. are known.

ここでは従来の代表例として、てい倍器を用いた4PS
K受信装置について述べる。
Here, as a typical example of a conventional 4PS system using a multiplier,
The K receiving device will be described.

第2図は従来のてい倍器を用いた4PSK受信装置の構
成を示しており、第2図ておいて21は受信入力端子で
ありミキサ22に接続されている。
FIG. 2 shows the configuration of a 4PSK receiving apparatus using a conventional multiplier. In FIG. 2, reference numeral 21 is a reception input terminal connected to a mixer 22.

局部発振器23の出力はミキサ22に接続されている。The output of local oscillator 23 is connected to mixer 22 .

ミキサ22の出力は4てい倍器24及び同期検波回路2
5に接続されている。4てい倍器24の出力は帯域フィ
ルタ26に接続され、帯域フィルタ26の出力は位相比
較器(μ下PD:PhascDetectorと言う)
27に接続されている。一方28は電圧制御発振器(μ
下V CO: Vol tage Control 1
edOscillatorと言う)であり、その出力は
同期検波回路25及び4てい倍器29に接続されている
The output of the mixer 22 is a quadruple multiplier 24 and a synchronous detection circuit 2.
5. The output of the quadruple multiplier 24 is connected to a bandpass filter 26, and the output of the bandpass filter 26 is connected to a phase comparator (called PhascDetector).
It is connected to 27. On the other hand, 28 is a voltage controlled oscillator (μ
Lower V CO: Voltage Control 1
edOscillator), and its output is connected to a synchronous detection circuit 25 and a quadrupler 29.

また30は低域戸波器(以下LPF : Low Pa
5sFilterと言う)であり、PD27の出力端子
と、VC028の周波数制御端子に接続されている。次
に上記従来例の動作について説明する。第2図において
、4PSK信号が受信されるとミキサ22において局部
発振器23からの信号と混合され、中間周波信号Fif
を得る。 JPSK波の場合、Fifと表現される0こ
のFifが4てい倍器24で4てい倍されると、F=c
os(4ωcj+(2に+1)π)=cos 4ωct
を得る。 この信号を4ωCを中心とする帯域フィルタ
26を通すこにより変調成分が除去された搬送波cos
 4ωc1を得る。この搬送波を位相比較器(PD)2
7に供給すると、 27,28,29゜30で構成され
る狭帯域な追ずいフィルタとして働く位相同期回路(μ
下PLL : Phase LockedLoopと言
う)によりVC028から4特性の優れた基準搬送波を
得、同期検波用基準搬送波として用いることができる。
Also, 30 is a low frequency door filter (hereinafter referred to as LPF: Low Pa
5s Filter) and is connected to the output terminal of PD27 and the frequency control terminal of VC028. Next, the operation of the above conventional example will be explained. In FIG. 2, when a 4PSK signal is received, it is mixed with a signal from a local oscillator 23 in a mixer 22, and an intermediate frequency signal F
get. In the case of a JPSK wave, 0 expressed as Fif, when this Fif is multiplied by 4 in the 4 multiplier 24, F=c
os(4ωcj+(2+1)π)=cos 4ωct
get. The carrier wave cos from which modulation components are removed by passing this signal through a bandpass filter 26 centered at 4ωC
4ωc1 is obtained. Phase comparator (PD) 2
7, a phase-locked circuit (μ
Lower PLL: A reference carrier wave with excellent four characteristics can be obtained from VC028 using Phase Locked Loop, and can be used as a reference carrier wave for synchronous detection.

このような上記従来の受信装置でもてい倍器を用いるこ
とにより同期検波用基準搬送波を得ることが出来る。
By using a multiplier in such a conventional receiving device, a reference carrier wave for coherent detection can be obtained.

発明が解決しようとする課題 しかしながら上記従来の受信装置では、1、てい倍回路
が必要なため、回路が複雑、大形になり消費電力も太き
G。
Problems to be Solved by the Invention However, the above-mentioned conventional receiving device requires a multiplier circuit, which results in a complex and large circuit and high power consumption.

2、局部発振回路の発振周波数偏差の影響が大きい。例
えば局部発振回路の周波数偏差を900 MHzで±1
0ppmとすると、+9 kHzの周波数偏差を生じ、
+9kHzずれた中間周波数で同期検波されるため受信
性能が劣化するという問題があった。
2. The influence of the oscillation frequency deviation of the local oscillation circuit is large. For example, if the frequency deviation of a local oscillation circuit is ±1 at 900 MHz,
If it is 0 ppm, it will cause a frequency deviation of +9 kHz,
There was a problem in that reception performance deteriorated because synchronous detection was performed at an intermediate frequency shifted by +9 kHz.

本発明はこのような上記従来の問題を解決するものであ
り、回路構成が簡単で、局部発振周波数の安定化を図り
つつ、同期検波用再生搬送波を得ることができる優れた
受信装置を提供することを目的とするものである。
The present invention solves the above conventional problems, and provides an excellent receiving device that has a simple circuit configuration and can obtain a regenerated carrier wave for synchronous detection while stabilizing the local oscillation frequency. The purpose is to

課題を解決するための手段 本発明は上記目的を達成するために局部発振周波数源と
してvCOを有し、また公称中間周波数に略等しい発振
周波数を有する基準発振器と、その基準発振器出力信号
と、受信中間周波信号の位相差を検出する位相比較器(
PD)及び雑音と変調成分を除去するLPFを設け、v
CO1基準発振器。
Means for Solving the Problems In order to achieve the above objects, the present invention provides a reference oscillator that has vCO as a local oscillation frequency source and has an oscillation frequency approximately equal to a nominal intermediate frequency, a reference oscillator output signal, and a receiver. A phase comparator (
PD) and an LPF that removes noise and modulation components,
CO1 reference oscillator.

PD、LPFでP L L (Phase Locke
d Loop )回路を構成するようにしたものである
PD, LPF (Phase Locke)
d Loop) circuit.

作    用 本発明は上記のような構成により次のような作用を有す
る。すなわち、変調波を受信すると(ここでは、受信周
波数FRは正確であるとする。)vCOと混合され、中
間周波信号を得る。その中間周波信号は、基準発振器出
力信号とPDで位相比較され、位相誤差電圧を生ずる。
Effects The present invention has the following effects due to the above configuration. That is, when a modulated wave is received (here, it is assumed that the reception frequency FR is accurate), it is mixed with vCO to obtain an intermediate frequency signal. The intermediate frequency signal is phase-compared with a reference oscillator output signal at the PD to generate a phase error voltage.

該位相誤差電圧は、LPFで雑音と変調成分を除去され
た後、VCOの周波数制御端子に加えられる。このよう
にしてPLL回路を構成し、LPFの定数を適当に選ぶ
ことにより 1、受信中間周波信号と基準発振器の位相、周波数は一
致し、基準発振器出力信号は受信搬送波と等価になる。
The phase error voltage is applied to the frequency control terminal of the VCO after noise and modulation components are removed by the LPF. By configuring the PLL circuit in this manner and appropriately selecting the constant of the LPF, the phases and frequencies of the received intermediate frequency signal and the reference oscillator match, and the reference oscillator output signal becomes equivalent to the received carrier wave.

2、受信周波数をFR1局部発振周波数(VCO周波数
)をFL±ΔFL、基準発振器周波数をFIF士△FI
Fとすると受信中間周波数はIFR−FL±△FL1と
なる。これがPI、L回路により基準発振周波数と等し
くなるから 1F’R,PL±ΔFt、1=Ftp±ΔFIFとなり
一方l FR−FL I =FIFであるから、△FL
=ΔFIFとなる。
2. Set the reception frequency to FR1, set the local oscillation frequency (VCO frequency) to FL±ΔFL, and set the reference oscillator frequency to FIF ΔFI.
When F, the reception intermediate frequency becomes IFR-FL±ΔFL1. Since this becomes equal to the reference oscillation frequency by the PI and L circuits, 1F'R, PL ± ΔFt, 1 = Ftp ± ΔFIF, and l FR - FL I = FIF, so ΔFL
=ΔFIF.

ここで例えばFt = 900MHz、 PIF = 
45 MHz、△F IF ” 450Hz (基準発
振器の周波数偏差が±10ppmの場合)とするとΔF
 L = 450 Hzとなり、局部発振周波数安定度
は等測的に△Ft、/Ft、=0.5ppmとなり、±
1oppmの周波数安定度の基準発振器を用いて、等測
的に±0.5ppmの受信周波数安定度を得ることが出
来る。
Here, for example, Ft = 900MHz, PIF =
45 MHz, △F IF "450Hz (when the frequency deviation of the reference oscillator is ±10 ppm), ΔF
L = 450 Hz, and the local oscillation frequency stability is isometrically △Ft, /Ft, = 0.5 ppm, ±
Using a reference oscillator with a frequency stability of 1 oppm, a receive frequency stability of ±0.5 ppm can be obtained isometrically.

実施例 第1図は本発明の一実施例の構成を示すものである。第
1図において11は受信入力端子であり、ミキサ12に
接続されている。ミキサ12の出力は同期検波器13と
PD14に接続されている。15は基準発振器であり、
その出力は同期検波器13とPD14のもう一方の端子
に接続されている。
Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, 11 is a reception input terminal, which is connected to a mixer 12. The output of the mixer 12 is connected to a synchronous detector 13 and a PD 14. 15 is a reference oscillator;
Its output is connected to the other terminals of the synchronous detector 13 and PD 14.

PD14の出力はLPF16に入力され、LPF16の
出力はVCO17の周波数制御端子に接続されている。
The output of the PD 14 is input to the LPF 16, and the output of the LPF 16 is connected to the frequency control terminal of the VCO 17.

18は復調出力端子である。18 is a demodulation output terminal.

次に上記実施例の動作について説明する。上記実施例に
おいて受信人力11が変調波FRを受信すると、ミキサ
12でVCO17からの局部発振信号(Ft、±ΔFt
、)と混合され、中間周波信号(IFR〜FL±ΔFt
 l )を得る。
Next, the operation of the above embodiment will be explained. In the above embodiment, when the receiver 11 receives the modulated wave FR, the mixer 12 outputs the local oscillation signal (Ft, ±ΔFt) from the VCO 17.
, ) and mixed with the intermediate frequency signal (IFR~FL±ΔFt
l) is obtained.

この中間周波信号は同期検波器13に入力されるととも
に、PD14において、基準発振器15からの信号(F
Ip±ΔFIF)と位相が比較され、位相誤差電圧を生
ずる。この位相誤差電圧はLPF16で雑音、変調成分
を除去された後VCO17の周波数制御端子に加えられ
、PLL回路を構成し、IFR〜FL±ΔFL1=FI
F±ΔFIFとなるようにvCO17を制御する。従っ
て基準発振信号は受信搬送波と等価になり、同期検波器
13に加えられ、同期検波用再生搬送波として用いられ
る。また、l FR−Ft、i:FLl =PIF±Δ
FIFとなり局部発振周波数の安定化が図られる。
This intermediate frequency signal is input to the synchronous detector 13, and the signal from the reference oscillator 15 (F
Ip±ΔFIF) and the phase is compared to produce a phase error voltage. This phase error voltage is applied to the frequency control terminal of the VCO 17 after noise and modulation components are removed by the LPF 16, forming a PLL circuit, IFR~FL±ΔFL1=FI
vCO17 is controlled so that F±ΔFIF. Therefore, the reference oscillation signal becomes equivalent to the received carrier wave, is added to the synchronous detector 13, and is used as a recovered carrier wave for synchronous detection. Also, l FR−Ft, i:FLl = PIF±Δ
It becomes FIF and stabilizes the local oscillation frequency.

発明の効果 本発明は上記実施例より明らかなように、μ下に示す効
果を有する。
Effects of the Invention As is clear from the above embodiments, the present invention has the effects shown below.

受信中間周波信号と基準発振器の位相差を検出し、その
誤差電圧を局部発振周波数源であるvCOに帰還してP
LLを構成しているため。
The phase difference between the received intermediate frequency signal and the reference oscillator is detected, and the error voltage is fed back to vCO, which is the local oscillation frequency source, and P
Because it constitutes LL.

(1)従来より簡単な回路構成で同期検波用再生搬送波
を得ることが出来る。
(1) A regenerated carrier wave for synchronous detection can be obtained with a simpler circuit configuration than the conventional one.

(2)等測的な高安定な局部発振周波数を得ることが出
来る。
(2) It is possible to obtain an isometric and highly stable local oscillation frequency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における受信装置の11・・
・受信入力端子、12・・・ミキサ、 13・・・同期
検波回路、14・・・PD、15・・・基準発振器、 
16・・・LPF、17・・・VCo、18・・・復調
出力、21・・・入力端子、22・・・ミキサ、23・
・・局部発振器、24・・・てい倍回路、25・・・同
期検波回路、26・・・帯域フィルタ、27 、、、 
P D、28 、、、 VCo 、29 ・4 ティ倍
回路、30、、、LPF。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名I、
+   ≧ 1v
FIG. 1 shows a receiving device 11 in an embodiment of the present invention.
・Reception input terminal, 12...Mixer, 13...Synchronized detection circuit, 14...PD, 15...Reference oscillator,
16... LPF, 17... VCo, 18... Demodulation output, 21... Input terminal, 22... Mixer, 23...
...Local oscillator, 24... Multiplier circuit, 25... Synchronous detection circuit, 26... Bandpass filter, 27...
P D, 28, , VCo, 29 ・4T multiplier circuit, 30, , LPF. Name of agent: Patent attorney Toshio Nakao and one other person
+ ≧ 1v

Claims (1)

【特許請求の範囲】[Claims] 外部の制御電圧によって、その発信周波数が制御される
電圧制御発振器と、上記電圧制御発振器の出力を受信機
の局部発振信号源として用い、受信、信号を中間周波信
号に変換するミキサーと、上記受信機の公称中間周波数
とほぼ等しい周波数を発生する基準発振器と、上記中間
周波信号と上記基準発振器の出力との位相差を検出し、
この位相差を電圧に変換する位相比較器と、上記位相比
較器の出力から雑音と変調成分を除去する低域ろ波器を
設け、上記低域ろ波器の出力を上記電圧制御発振器の周
波数制御端子に帰還するとともに、上記基準発振器の出
力を基準搬送波として上記中間周波信号を同期検波する
同期検波器とを備えた受信装置。
a voltage controlled oscillator whose oscillation frequency is controlled by an external control voltage; a mixer that uses the output of the voltage controlled oscillator as a local oscillation signal source for a receiver and converts the receiving signal into an intermediate frequency signal; a reference oscillator that generates a frequency approximately equal to the nominal intermediate frequency of the machine, and detecting a phase difference between the intermediate frequency signal and the output of the reference oscillator;
A phase comparator that converts this phase difference into a voltage, and a low-pass filter that removes noise and modulation components from the output of the phase comparator are provided, and the output of the low-pass filter is set to the frequency of the voltage controlled oscillator. A receiving device comprising a synchronous detector that feeds back the intermediate frequency signal to a control terminal and synchronously detects the intermediate frequency signal using the output of the reference oscillator as a reference carrier wave.
JP63033138A 1988-02-16 1988-02-16 Receiver Pending JPH01208943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63033138A JPH01208943A (en) 1988-02-16 1988-02-16 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63033138A JPH01208943A (en) 1988-02-16 1988-02-16 Receiver

Publications (1)

Publication Number Publication Date
JPH01208943A true JPH01208943A (en) 1989-08-22

Family

ID=12378235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63033138A Pending JPH01208943A (en) 1988-02-16 1988-02-16 Receiver

Country Status (1)

Country Link
JP (1) JPH01208943A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089155A (en) * 1983-10-20 1985-05-20 Fujitsu Ltd Phase locked loop system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6089155A (en) * 1983-10-20 1985-05-20 Fujitsu Ltd Phase locked loop system

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