JPH01223547A - Input/output instruction converting system - Google Patents

Abstract

PURPOSE:To shorten the time until the input output instruction after conversion, in which a retrial is requested, is sent to a peripheral device by providing a control instruction memory area to store an (n) number [(n) is positive integer] of the output instructions after the conversion in an I/O. CONSTITUTION:When an input output instruction (seek command A) before conversion is inputted from a system control device 2 to an I/O 1, the I/O 1 successively converts this to a seek command A1, a set command A2 and a search command A3. By storing the input output instruction after these are converted in a control instruction memory area in the I/O 1, the input output instruction before conversion is received by the I/O 1, the time necessary to read the input output instruction after the conversion corresponding to these instructions can be shortened. When a retrial request is executed from a peripheral device 5, the input output instruction corresponding out of the input output instructions after conversion stored in a control instruction memory area is sent to the device 5. Thus, the time until the input output instruction after the conversion to request the retrial is sent to the device 5 can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input/output command conversion method, and particularly to an input/output processing device that transfers data based on instructions from a central processing unit. The present invention relates to an input/output instruction conversion method for converting input/output instructions into I/O instructions (n is a positive integer).

Traditionally, in this type of input/output command conversion method, all the results of converting an input input/output command into n input/output commands (n is a positive integer) are stored in the main memory in advance. Therefore, when an instruction is received from the central processing unit, the converted input/output instruction corresponding to that instruction is read from the main memory and temporarily stored in the register of the input/output processing unit, and then temporarily stored in the register according to the sending instruction. It was controlled to send the converted input/output instruction to the peripheral device, and to store the next converted input/output instruction in this register.

Therefore, when a peripheral device executes a converted input/output instruction sent from a register, the execution of the converted input/output instruction causes an abnormal termination and the peripheral device requests a retry. , the input/output instruction for which retry was requested no longer exists in the input/output processing unit, and the input/output instruction for which retry was requested is sent to the peripheral device before conversion. requesting the central processing unit to send the input/output command again.

In such a conventional input/output instruction conversion method, if a converted input/output instruction that has been read from the main memory and temporarily stored in a register of the input/output processing unit is abnormally terminated in a peripheral device, the input/output instruction is read out from the input/output processing unit. Since the central processing unit was requested to send the unconverted input/output command again, the time required for the central processing unit to send the unconverted input/output command again, and the retransmitted unconverted input/output command It is necessary to spend time reading the converted input/output instruction corresponding to the input/output instruction from the main memory and storing it in the register.
The drawback is that it takes a lot of time to send the converted input/output command to the peripheral device.

The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it shortens the time required to send converted input/output commands that require retry to peripheral devices. The purpose of this invention is to provide an input/output command conversion method that allows

The input/output command conversion method according to the present invention converts an input/output command input from a central processing unit into n input/output commands (n is a positive integer) and sequentially sends them to peripheral devices. An input/output command conversion method of an output processing device, comprising a storage means for storing the n converted input/output commands, and storage position information of each of the n input/output commands stored in the storage means. and a holding means for holding the n input/outputs stored in the storage means based on the storage position information held in the holding means in response to a retry request from the peripheral device. The present invention is characterized in that a corresponding input/output command is read out of the commands and sent to the peripheral device.

Next, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG.
2, a control command storage area 13, a sending circuit 15, an address selection circuit 16, a control circuit 17, an address counter 18, and a receiving circuit 19.

The input/output command register 11 receives input/output commands before conversion sent from a system control device (not shown) via an interface line 1.1 and a set signal from the control circuit 17 sent via a signal line 110. The input/output command before conversion is temporarily stored by the data bus 103 and sent to the conversion circuit 12 via the data bus 103.

The conversion circuit 12 sequentially converts the unconverted input/output instructions sent from the input/output instruction register 11 into n (n is a positive integer) converted input/output instructions, and converts the converted input/output instructions into data. It is sent to the control instruction storage area 13 via the bus 104.

The control command storage area 13 receives the converted input/output commands sent from the conversion circuit 12 and sends them to the address selection circuit 16 via the address line 109 in response to a write instruction signal input from the control circuit 17 via the signal line 113. Store at the address supplied by . In addition, the control command storage area 13 receives converted input/output data read from the address supplied from the address selection circuit 16 via the address line 109 in response to a read instruction signal input from the control circuit 17 via the signal line 113. The command is sent to the input/output command register 14 via the data bus 105.

The input/output instruction register 14 temporarily stores the converted input/output instruction sent from the control instruction storage area 13 and sends the converted input/output instruction to the sending circuit 15 via the data bus 106.

The sending circuit 15 outputs an input/output command request signal to the control circuit 17 via the signal line 108, and in response to this input/output command request signal, the converted input/output command sent from the input/output command register 14 is sent to the control circuit. 17 via the signal line 115, the data line 107
The data is sent to a peripheral device (not shown) via the .

The address selection circuit 16 receives the address from the control circuit 17 input via the address line 111 and the address from the address line 11.
select one of the addresses from the address counter 18 input via the signal line 112 in response to an address selection signal from the control circuit 17 input via the signal line 112;
The selected address is sent to the control instruction storage area 13 via the address line 109.

When the control circuit 17 receives an input/output command sending instruction signal from the system control device via the signal line 102, the signal line 11
A set signal is sent to the input/output command register 11 via 0. Further, the control circuit 17 sends an address to the address selection circuit 16 via the address line 111, and
An address selection signal is output to the address selection circuit 16 via the signal line 112.

Furthermore, the control circuit 17 outputs a write instruction signal or a read instruction signal to the control instruction storage area 13 via a signal line 113, and outputs a write instruction signal or a read instruction signal to the input/output instruction register 13 via a signal line 114.
Outputs a set signal to .

The control circuit 17 outputs a sending instruction signal to the sending circuit 15 via a signal line 115, and sends the storage address of the converted input/output instruction in the control instruction storage area 13 to the address counter 18 via a signal line 116.

The address counter 18 holds the storage address input from the control circuit 17 via the signal line 116 and sends the storage address to the address selection circuit 16 via the address line 117. Further, the address counter 18 updates the address sent to the address selection circuit 16 in response to an update instruction signal from the receiving circuit 19 inputted via a signal line 119. Furthermore, the receiving circuit 19 via the signal line 120
When a retry request signal is input from the address selection circuit 16, the address sent to the address selection circuit 16 is not updated.

Upon receiving the operation completion report from the peripheral device via the data line 121, the receiving circuit 19 notifies the control circuit 17 via the signal line 118 that the operation completion report has been received, and also confirms that the operation completion report is normal. When indicating completion, an update instruction signal is output to address counter 18 via signal line 119, and when this operation completion report indicates abnormal termination and a retry request, an update instruction signal is output to address counter 1 via signal line 120.
A retry request signal is output to 8.

2 is a block diagram showing the configuration of a system according to an embodiment of the present invention. In FIG. 0, the input/output processing device 1 shown in FIG. 1 is connected to a system control device 2 and a peripheral device 5, and The system control device 2 is connected to an arithmetic processing device 3 and a main storage device 4.

Figure 3 is a diagram showing an example of conversion of input/output commands in an embodiment of the present invention. Figure 9 shows a function to transfer data for positioning the head, a function to position the head, and a function to search for records. and a seek (SEE
) Command A is a seek (5eek) command A that has the function of transferring data for positioning the head.
1 and a set sector (with the function of positioning the head)
An example is shown in which the command is converted into the Set 5ector) command A2 and the Search command (Set File Mask) A3, which has the function of searching for records.

The operation of one embodiment of the present invention will be explained using these FIGS. 1 to 3.

First, when the system control device 2 notifies the control circuit 17 of the input/output processing device 1 of an input/output command sending instruction signal, the control circuit 17 sends the input/output command in order to receive the seek command A from the system control device 2. A set signal is output to the register 11.

In response to a set signal from the control circuit 17, the input/output command register 11 temporarily stores the seek command A sent from the system control device 2, and sends this seek command A to the conversion circuit 12.

The conversion circuit 12 sequentially converts the seek command A from the input/output instruction register 11 into three types of input/output instructions, that is, seek command A1, set sector command A2, and search command A3, and converts these seek command A1 and set sector command A2 and search command A3 are sent to the control command storage area 13.

In the control command storage area 13, the seek command A1, set sector command A2, and search command A3 sent from the conversion circuit 12 are sequentially stored in the address from the address selection circuit 16 in response to a write instruction signal from the control circuit 17.

At this time, the control circuit 17 sets the addresses in which the seek command A1, set sector command A2, and search command A3 are respectively stored in the address counter 18, and the address is selected by the address selection circuit 16 to control command storage area. An address selection signal is output to the address selection circuit 16 so that it is output to the address selection circuit 13.

Next, when the control circuit 17 receives the input/output command request signal from the sending circuit 15, it outputs a read instruction signal to the control command storage area 13, and the address from the address counter 18 is selected by the address selection circuit 16. The address selection circuit 1 outputs the command to the control command storage area 13.
An address selection signal is output to 6.

In response to the read instruction signal from the control circuit 17, the seek command A1 is read from the control instruction storage area 13 according to the address supplied from the address selection circuit 16, and this seek command A1 is sent to the input/output instruction register 14.

At this time, since the set signal from the control circuit 17 is input to the input/output command register 14, the seek command A1 read from the control command storage area 13 is temporarily stored, and this seek command A1 is sent to the sending circuit 15. Sent out.

When the seek command A1 read from the control command storage area 13 is input to the exit circuit 15, the control circuit 17 outputs a sending instruction signal to the sending circuit 15, and the sending circuit 15 sends the seek command A1 to the peripheral device 5. be done.

When the seek command A1 is executed in the peripheral device 5, an operation completion report is sent to the receiving circuit 19 as a result of the execution. The receiving circuit 19 receives the operation completion report from the peripheral device 5, decodes the contents of the operation completion report, and determines that the operation has completed normally, and notifies the control circuit 17 that the operation completion report has been received, and updates the operation completion report. An instruction signal is output to the address counter 18.

When the control circuit 17 is notified that the operation completion report has been received from the receiving circuit 19, it outputs a read instruction signal to the control command storage area 13 and also outputs a read instruction signal to the address selection circuit 1.
6 outputs an address selection signal to select the updated address from address counter 18.

In response to a read instruction signal from the control circuit 17, the set sector command A2 is read from the control instruction storage area 13 according to the updated address supplied from the address selection circuit 16, and this set sector command A2 is stored in the input/output instruction register 14. Sent out.

When the set sector command A2 read from the control command storage area 13 is temporarily stored in the input/output command register 14, this set sector command A2 is sent to the peripheral device 5 in the same manner as the processing operation described above.

When the set sector command A2 is executed in the peripheral device 5, an operation completion report is sent to the receiving circuit 1 as a result of the execution.
It will be sent out on 9th. Upon receiving the operation completion report from the peripheral device 5, the receiving circuit 19 decodes the contents of this operation completion report. At this time, if it is determined that the content of the operation completion report is abnormal termination and a retry request, the control circuit 17 is notified that the operation completion report has been received, and a retry request signal is sent to the address counter 18. Output to.

When the control circuit 17 is notified that the operation completion report has been received from the receiving circuit 19, it outputs a read instruction signal to the control command storage area 13 and also outputs a read instruction signal to the address selection circuit 1.
6 outputs an address selection signal to select an address from address counter 18.

When the address counter 18 receives the retry request signal from the receiving circuit 19, it does not update the held address and sends the same address as the previously sent address (the address where the set sector command A2 is stored) to the address selection circuit 18. Send to.

Since the same address as the address sent last time from the address selection circuit 16 is input to the control instruction storage area 13, the set sector command A2 is read out by the read instruction signal from the control circuit 17 and is sent to the input/output instruction register 14.
sent to.

When the set sector command A2 read from the control command storage area 13 is temporarily stored in the input/output command register 14, this set sector command A2 is sent to the peripheral device 5 in the same manner as the processing operation described above. Therefore, even if the peripheral device 5 terminates abnormally and a retry request is sent, the same command (converted input/output command,
In this example, a set sector command A2) can be sent.

In this way, the input/output command before conversion (seek command A) received from the system control device 2 is sequentially converted into input/output commands after conversion (seek command A1, set sector command A2, and search command A3), and these commands are By storing the input/output instructions after conversion in the control instruction storage area 13, when the input/output processing device 1 receives the input/output instruction before conversion, it can handle the input/output instruction before conversion. The time required to read the converted input/output instructions can be reduced.

Also, surrounding waves! When a retry request is received from the peripheral device 5, the corresponding input/output instruction is sent to the peripheral device 5 from among the converted input/output instructions stored in the control instruction storage area 13. It is now possible to immediately send the corresponding input/output command in response to a retry request, and the converted input/output command for which a retry request was requested can be sent to a peripheral device, which would have taken a large amount of time in the conventional example. It is possible to significantly shorten the time it takes to send the data to 5.

As explained above, according to the present invention, n (n is a positive integer) input/output commands converted from input/output commands from the central processing unit are sequentially stored, and then retried from the peripheral device. By reading out the corresponding input/output instruction from among the stored n input/output instructions and sending it to the peripheral device in response to the request, the converted input/output instruction for which retry was requested This has the effect of shortening the time it takes to send the data to the peripheral device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a system according to an embodiment of the present invention, and FIG. 3 is an input/output command in an embodiment of the present invention. It is a figure which shows the conversion example of. Explanation of symbols of main parts 1... Input/output processing device 2... System control device 5... OR gate 11.14... Input/output instruction register 12.・・・
... Conversion circuit 13 ... Control command storage area 15 ... Sending circuit 17 ... Control circuit 18 ... Address counter 19 ... receiving circuit

Claims (1)

[Claims] (1) N input/output instructions input from the central processing unit (
An input/output instruction conversion method for an input/output processing device that converts the input/output instructions into input/output instructions (n is a positive integer) and sequentially sends them to peripheral devices, the input/output instructions comprising: a storage means for storing the converted n input/output instructions; , a holding means for holding storage position information of each of the n input/output commands stored in the storage means, the storage position information being held in the holding means in response to a retry request from the peripheral device. The input/output command conversion is characterized in that a corresponding input/output command is read out of the n input/output commands stored in the storage means based on the storage location information and sent to the peripheral device. method.