JPH01240955A - Input/output controller - Google Patents

Input/output controller

Info

Publication number
JPH01240955A
JPH01240955A JP6861888A JP6861888A JPH01240955A JP H01240955 A JPH01240955 A JP H01240955A JP 6861888 A JP6861888 A JP 6861888A JP 6861888 A JP6861888 A JP 6861888A JP H01240955 A JPH01240955 A JP H01240955A
Authority
JP
Japan
Prior art keywords
input
identification information
output control
device identification
floppy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6861888A
Other languages
Japanese (ja)
Inventor
Hironori Ono
小野　裕基
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP6861888A priority Critical patent/JPH01240955A/en
Publication of JPH01240955A publication Critical patent/JPH01240955A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To respond even to a state where a peripheral device to be connected is changed without applying any change to an input/output controller by loading corresponding input/output control firmware from a floppy disk based on device identification information in the peripheral device. CONSTITUTION:A device identification information reading circuit 41, when a reset signal is received from a host device via a high-order interface (d), starts up an input/output control circuit 42, and after reading the device identification information 21 in the peripheral device 2, stores the identification information in a device identification information storage part 62 in a floppy control adaptor 6. The floppy control adaptor 6 reads out a file storing firmware sequentially from the floppy 7 by a floppy access circuit 61, and stores the input/output control firmware of the file in a control storage part 43 in an input/output control adaptor 4 via a bus line (c) when the file coincides with the device identification information 21. Thereafter a microprocessor 44 executes a microinstruction in the control storage part 43. In such a way, the peripheral device 2 can be controlled.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、入出力制御装置に関し、特に、入出力制御用
ファームウェアのロード方式に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an input/output control device, and particularly to a method for loading input/output control firmware.

従来の技術 従来、この種の入出力制御装置は各アダプタ毎に不揮発
性メモリ（ＰＲＯＭ）を持ち、このＰ　Ｉｔ　ＯＭに入
出力制御ファームウェアを書込んでいた。2. Description of the Related Art Conventionally, this type of input/output control device had a nonvolatile memory (PROM) for each adapter, and input/output control firmware was written in this P It OM.

発明が解決しようとする課題 上述した従来の入出力制御装置では、入出力制御ファー
ムウェアがＰＲＯＮに書込まれている為に、接続される
入出力装置の構成が変更されると。Problems to be Solved by the Invention In the conventional input/output control device described above, since the input/output control firmware is written in the PRON, if the configuration of the connected input/output device is changed.

ＦＲＯＭの変更又はアダプタの変更が必要となるので、
コスト高及び変更作業が煩雑になるという欠点がある。Since it is necessary to change FROM or change the adapter,
There are disadvantages of high cost and complicated modification work.

本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記欠点
を解消することを可能とした新規な入出力制御装置を提
供することにある。The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a novel input/output control device that makes it possible to eliminate the above-mentioned drawbacks inherent in the conventional technology.

課題を解決するための手段 」二記目的を達成する為に、本発明に係る入出力制御装
置は、アダプタ内の制御記憶ぶ；に格納されアダプタに
接続される入出力装置毎に異なる人出力制御ファームウ
ェアと、前記入出力制御ファームウェアの全ての種類を
格納するフロッピーディスクと、前記アダプタに接続さ
れる入出力装置の装置識別情報を読取る前記アダプタ内
の装置識別読取回路と、この装置識別読取回路で読取ら
れた装置識別情報からフロッピーディスクに格納された
入出力制御用ファームフェアの内特定のファームウェア
が格納されているファイルを読出しアダプタ内の制御記
憶部に格納するファームウェア読出し回路とを具備して
構成される。In order to achieve the second object of ``Means for Solving the Problems'', the input/output control device according to the present invention has a control memory stored in the adapter and a different input/output device for each input/output device connected to the adapter. a floppy disk for storing control firmware, all kinds of the input/output control firmware, a device identification reading circuit in the adapter for reading device identification information of an input/output device connected to the adapter, and this device identification reading circuit. and a firmware reading circuit that reads a file in which specific firmware is stored among the input/output control firmware stored on the floppy disk based on the device identification information read by the adapter and stores it in a control storage section in the adapter. configured.

実施例 次に本発明をその好ましい一実施例について図面を参照
しながら具体的に説明する。Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

第１図は本発明の一実施例を示すブロック構成図である
。第１図を参照するに、周辺装置２，３は入出力制御装
置１の入出力制御アダプタ４．５に接続されている。FIG. 1 is a block diagram showing one embodiment of the present invention. Referring to FIG. 1, the peripheral devices 2, 3 are connected to the input/output control adapter 4.5 of the input/output control device 1.

フロッピー７はフロッピー制御アダプタ６に接続され、
フロッピー制御アダプタ６は、フロッピーアクセス回路
６１と装置識別情報格納部６２から構成されている。又
、入出力制御アダプタ４は装置識別情報読取回路４１と
入出力制御回路４２と制御記憶部４３とマイクロプロセ
ッサ４４とから構成されている。Floppy 7 is connected to floppy control adapter 6,
The floppy control adapter 6 includes a floppy access circuit 61 and a device identification information storage section 62. The input/output control adapter 4 includes a device identification information reading circuit 41, an input/output control circuit 42, a control storage section 43, and a microprocessor 44.

装置識別情報読取回路４１は、上位インタフェースｄ経
由して上位装置からリセット信号を受信すると、入出力
制御回路４２を起動し、周辺装置２にある装置識別情報
２１を読取った後にフロッピー制御アダプタ６内の装置
識別情報格納部６２に識別情報を格納する。When the device identification information reading circuit 41 receives a reset signal from the host device via the host interface d, it activates the input/output control circuit 42, reads the device identification information 21 in the peripheral device 2, and then reads the device identification information 21 in the floppy control adapter 6. Identification information is stored in the device identification information storage section 62 of.

フロッピー制御アダプタ６は、フロッピーアクセス回路
６１によりフロッピー７からファームウェアが格納され
たファイルを順次読出し、ファイルが装置識別情報と一
致する時に該当ファイルの人出力制御ファームウェアを
バス線Ｃを経由して入出力制御アダプタ４の制御記憶部
４３に格納する。The floppy control adapter 6 sequentially reads files storing firmware from the floppy 7 using a floppy access circuit 61, and when the file matches the device identification information, inputs/outputs the human output control firmware of the corresponding file via the bus line C. It is stored in the control storage section 43 of the control adapter 4.

その後、マイクロプロセッサ４４が制御記憶部４３内の
マイクロ命令を実行することにより、周辺袋＠２を制御
することが出来る。Thereafter, the microprocessor 44 can control the peripheral bag @2 by executing the microinstructions in the control memory 43.

入出力制御アダプタ５も同様にして１周辺装置３に対応
するファームウェアをフロッピー７から制御記憶部に格
納することができる。Similarly, the input/output control adapter 5 can store the firmware corresponding to one peripheral device 3 from the floppy disk 7 into the control storage section.

発明の詳細 な説明したように、本発明によれば、周辺装置内の装置
識別情報をもとにフロッピーから該当する人出力制御フ
ァームウェアをロードすることにより、接続される周辺
装置が変更されても入出力制御装置は何も変更せずに対
応出来るという効果が得られる。As described in detail, according to the present invention, by loading the corresponding human output control firmware from a floppy disk based on the device identification information in the peripheral device, even if the peripheral device to be connected is changed. The effect is that the input/output control device can be adapted without any changes.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例を示すブロック構成図である
。 １０１．入出力制御装置、２．３．、、周辺装置、２１
．３１．　、　、装置識別情報、４．５１０．入出力制
御アダプタ、４１．　、　、装置識別情報読取回路、４
２．　、　、入出力制御回路、４３．　、　、制御記憶
部、４４．　、　、マイクロプロセッサ、６００．フロ
ッピー制御アダプタ、６１．　、　、フロッピーアゲセ
ス回路、６２．　、　、装置識別情報格納回路、ａ、ｂ
。 ９．テハイスインタフェース、Ｃ，，，バス線、ｄ３２
．上位インタフェースFIG. 1 is a block diagram showing one embodiment of the present invention. 101. Input/output control device, 2.3. ,,peripheral device,21
．． 31. , ,Device identification information, 4.510. Input/output control adapter, 41. , , device identification information reading circuit, 4
2. , , input/output control circuit, 43. , , control storage section, 44. , , microprocessor, 600. Floppy control adapter, 61. , , floppy access circuit, 62. , , device identification information storage circuit, a, b
. 9. Tech high speed interface, C,, bus line, d32
．． Upper interface

Claims (1)

【特許請求の範囲】[Claims] 複数のアダプタから構成され、各アダプタが各々異なる
入出力装置を制御する入出力制御装置において、前記ア
ダプタ内の制御記憶部に格納されこのアダプタに接続さ
れる入出力装置毎に異なる入出力制御用ファームウェア
と、前記入出力制御ファームウェアの全ての種類を格納
するフロッピーディスクと、前記アダプタに接続される
入出力装置の装置識別情報を読取る前記アダプタ内の装
置識別読取回路と、この装置識別読取回路で読取られた
装置識別情報から前記フロッピーディスクに格納された
入出力制御用ファームウェアの内特定のファームウェア
が格納されているファイルを読出し前記アダプタ内の制
御記憶部に格納するファームウェア読出し回路とを具備
することを特徴とする入出力制御装置。In an input/output control device that is composed of a plurality of adapters, each adapter controlling a different input/output device, a control storage unit in the adapter stores a different input/output control device for each input/output device connected to this adapter. firmware, a floppy disk for storing all types of input/output control firmware, a device identification reading circuit in the adapter for reading device identification information of an input/output device connected to the adapter, and this device identification reading circuit. and a firmware reading circuit that reads a file in which specific firmware is stored among the input/output control firmware stored in the floppy disk based on the read device identification information and stores it in a control storage section in the adapter. An input/output control device featuring:
JP6861888A 1988-03-23 1988-03-23 Input/output controller Pending JPH01240955A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6861888A JPH01240955A (en) 1988-03-23 1988-03-23 Input/output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6861888A JPH01240955A (en) 1988-03-23 1988-03-23 Input/output controller

Publications (1)

Publication Number Publication Date
JPH01240955A true JPH01240955A (en) 1989-09-26

Family

ID=13378926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6861888A Pending JPH01240955A (en) 1988-03-23 1988-03-23 Input/output controller

Country Status (1)

Country Link
JP (1) JPH01240955A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100310517B1 (en) * 1998-06-12 2001-10-17 가토 요시카즈 Data storage device using an exchangeable recording media

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100310517B1 (en) * 1998-06-12 2001-10-17 가토 요시카즈 Data storage device using an exchangeable recording media

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