JPH01241163A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To scale down element and element isolation regions and realize a high integration of an integrated circuit, by forming insulating substances in a groove and performing electrical connection between a wiring metal and a highly concentrated impurity region. CONSTITUTION:An insulation layer 2 consisting of insulating substances of SiO2 and the like is formed on side walls of a groove 5 which is formed so as to reach a buried collector 4 formed on a semiconductor substrate 3 and also on the semiconductor substrate. Moreover, wiring 1 of aluminum and the like is formed continuously on the insulation layer 2 as well as on the buried collector 4. Contact is just made, like this, between a highly concentrated impurity layer of the inside of substrate and wiring without developing crosswise diffusion of impurities. In this way, element and element isolation regions are refined and an integrated circuit is highly integrated.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a semiconductor device and a method for manufacturing the same.

In particular, the present invention relates to a semiconductor device having a structure in which a high concentration impurity region formed inside a substrate is well connected to wiring on the substrate, and a method for manufacturing the same.

(Prior Art) A semiconductor device such as a bipolar transistor usually requires a step of forming a lead-out region connected to a buried collector formed inside a substrate. In this case, conventionally, as shown in FIG. 3, when forming a contact layer between the wiring metal 01 and the high concentration impurity region inside the substrate.

Six insulating layers are provided on the surface of the substrate (to), patterning is performed, and impurity ions of the same conductivity type as the high concentration impurity region (b) are implanted from the substrate surface through the opening (g).

A contact is formed by performing thermal diffusion so as to reach the high concentration region (b).

However, when heat treatment is performed using such a method so that the impurities sufficiently reach the buried collector, the impurities diffuse not only in the depth direction but also in the lateral direction. Therefore, there is a problem in that a large area for elements and element isolation must be provided, making it difficult to miniaturize the elements.

(Problem to be Solved by the Invention) As described above, when heat treatment is performed so that the collector lead-out part fully reaches the buried collector lead-out part of the conventional bipolar condition, the elements and the elements are damaged due to lateral diffusion of impurities. There is a problem that a large area for separation must be taken, and the degree of integration cannot be improved.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device and a method for manufacturing the same in which elements and element isolation regions are more effectively reduced than in the past.

In order to achieve the above object, the present invention forms a trench that reaches a high concentration impurity region formed inside a substrate, and forms an insulating material on the sides of this trench to connect the high concentration impurity region and wiring. Provided are a semiconductor device and a method for manufacturing the same, characterized in that the elements are directly electrically connected to each other and the element regions and element isolation regions are miniaturized.

(Function) The present invention forms a groove in the substrate and forms an insulating material in the groove to electrically connect the wiring metal and the high concentration impurity region inside the substrate. The impurity diffusion step can be omitted. This makes it possible to further reduce the size of elements and element isolation regions than in the past, making it possible to increase the degree of integration of the integrated circuit.

(Example) An embodiment of the present invention will be described below using one drawing.

FIG. 1 shows an embodiment of a semiconductor device according to the present invention, in which the semiconductor device is applied to a buried collector draw-out portion of a bipolar quartet.

In other words, an insulating layer (5) made of an insulating material such as StO is formed on the side wall of the groove (5) formed to extend into the semiconductor substrate (3) and on the sidewall of the trench (5) extending into the semiconductor substrate (3).
is formed, and furthermore, a wiring (1) made of aluminum or the like is continuously formed on the insulating layer (5) and the buried collector (4).

FIG. 2 shows a cross-sectional view of a manufacturing process according to an embodiment method of the present invention for obtaining a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG. 2(a), an n-type buried collector a''J is formed in a silicon substrate 0υ by a well-known technique.

Next, r4Q, which will become the collector drawer part, as shown in Fig. 2 Φ)
5) is buried and etched to a depth of about 2 μm using, for example, the well-known R/E technique so as to reach one edge.

Next, as shown in FIG. 2(C), for example, an oxide film (13) is formed by CVD.
The thickness of the side wall is, for example, 500A. Thereafter, as shown in FIG. 2(d), the oxide film deposited on the bottom of the groove aS is etched by, for example, RIE so as to expose the surface of the buried collector a. After that, Figure 2 (e
), without forming a buried collector lead-out region, wiring with the buried collector (13) is directly formed using, for example, an aluminum film I by, for example, a sputtering method.

In addition, in order to lower the contact resistance in the contact between the buried collector a2 and the aluminum wiring αno.

For example, if the buried collector n'lJ is an n-type, ions of arsenic, phosphorus, etc. may be implanted, and if the buried collector n'lJ is a p-type, ions such as boron may be implanted.

Furthermore, the wiring directly connected to the buried collector described in FIG. 2(e) may be made of a metal such as copper or a high melting point metal such as tungsten or molybdenum.

By connecting the high-concentration impurity layer (MA buried collector H) formed inside the substrate aυ with the wiring as described above, the method is different from the conventional case of forming a contact by diffusion of impurities. The problem of having to take up a large area for devices and device isolation is reduced.

〔Effect of the invention〕

As described above, according to the present invention, the contact between the high concentration impurity layer inside the substrate and the wiring can be formed without causing lateral diffusion of impurities, so it is possible to miniaturize the element region and the element isolation region. .

High integration of integrated circuits is possible.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an apparatus according to an embodiment of the present invention. FIG. 2 is a process cross-sectional view for explaining a method according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view for explaining conventional problems. 1... Wiring metal, 2... Insulating layer. 3... Semiconductor substrate, 4... Buried layer. 5... Groove, 11... Silicone board. 12...Buried collector, 13...Oxide film. 14...Aluminum wiring. Agent Patent Attorney Yudo Ken Chika Matsuyama Speed of Light Figure 1 Figure 3

Claims (2)

[Claims] (1) In a semiconductor device having a high concentration impurity region in a semiconductor substrate, wiring is provided through a trench formed to reach the high concentration impurity region from the surface of the semiconductor substrate and an insulating layer formed on the sidewall of this trench. 1. A semiconductor device comprising a conductive material for wiring, the conductive material for wiring being directly electrically connected to the high concentration impurity region. (2) After forming a high concentration impurity region in a semiconductor substrate, a trench is dug in the substrate until it reaches the high concentration impurity region, and then an insulating layer is formed on the sidewalls of the trench, and then an insulating layer is formed on the bottom of the trench. A method for manufacturing a semiconductor device, comprising: removing the formed insulating layer to expose a high concentration impurity region, and then forming a continuous wiring from the exposed high concentration impurity region to the insulating layer on the surface of the substrate. .