JPH01243740A - multiplex converter - Google Patents

Abstract

PURPOSE:To obtain a simple circuit device without an overhead by providing a transmitting part which executes the stuffing of inputted plural low-order group signals with the same stuffing control circuit. CONSTITUTION:Input signals are inputted through a bipolar/unipolar converter 1 and a transmitting part buffer memory 2 to a pulse inserting circuit 3, and further, transmitted through a multiplexing circuit 4 as 5-th order group signals. On the transmission side, a single stuffing control circuit 7 is commonly used with respect to each input signal of the low order group, and the stuffing is executed. On a receiving side, a de-stuffing control circuit 19 is commonly used in the same way, and the destuffing is executed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a staff multiplex conversion device for digital communication,
In particular, the present invention relates to a device applied to multiplex conversion when the lower order group side is synchronized and the higher order group side is not synchronized.

[Conventional technology]

The staff multiplex converter used in conventional digital communications is described in, for example, "Transmission Facility Design for Digital Networks J, 1.
It was structured as shown on page 55 (1984). An example of a conventional multiplex conversion device is shown in FIG. This figure is a block configuration diagram of a multiplex converter that multiplex-converts four low-order group digital signals into a high-order group signal by synchronizing each signal using a stuff synchronization method.

This device unipolar-converts four low-order group signals with slightly different speeds using a bipolar-unipolar converter 31, and generates a write pulse from a write pulse generation circuit 34 at the clock speed extracted by each timing extraction circuit 33. A common clock speed that is slightly faster than the speed of each channel, which is generated and written into the transmitter buffer memory 32, is generated by dividing the signal of the high-order group clock generator 10 by the timing pulse generation circuit 9, for example, and generates a read pulse. circuit 3
By generating a read pulse at step 5 and reading from the memory, each input signal is synchronized.

After a frame pulse, a stuff designation pulse, etc. are inserted by a pulse insertion circuit 3, they are multiplexed by a multiplexing circuit 4.

In 22, the difference between the manual signal speed and the readout speed is absorbed by inserting wasteful pulses called stuff pulses.

The timing of the insertion is controlled by the phase comparator circuit 36 and the stuff control circuit 37. In other words, the phase comparator circuit 36 compares the phases of the pulses of the write pulse generation circuit 34 and the read pulse generation circuit 35, and When a 1-bit phase difference is detected, the stuff control circuit 3
7 to request the insertion of a stuff pulse.

In the receiving section (Fig. 2b), the transmitted signal is demultiplexed by the demultiplexing circuit 15, frame synchronization is established by the frame synchronization circuit 14, and the pulse detection circuit 13 detects whether or not there is a stuff designation pulse in the signal. When a stuffing designation pulse is detected, the stuffing control circuit 45 removes (destuffing) the stuffing pulse. here,
The above-mentioned destuffing is performed by stopping the clock pulse of the write pulse generation circuit 42 during destuffing, and
This is done by avoiding writing stuff pulses to. The jitter that occurs at this time is eliminated by smoothing the speed of the clock pulse in a phase-locked loop 43 consisting of a phase comparison circuit, a low-pass filter, and a voltage-controlled oscillator. It is absorbed by taking it out. Thereafter, the unipolar/bipolar converter 39 performs bipolar conversion and sends it to the lower order group.

In the conventional stuff synchronous multiplex converter as mentioned above,
Since the low-order group signals are not synchronized and have slightly different speeds, the low-order group corresponding parts of the transmitter and receiver (
38 and 45) are required for each low-order group signal.

[Problem to be solved by the invention]

The above-mentioned conventional multiplex converter using the stuff synchronization method is based on the assumption that signals that are not synchronized with each other are handled as low-order group signals. For such a signal,
Since the signal speeds are slightly different from each other, the stuff pulses 51 are inserted at different positions for each channel, as shown in FIG. Furthermore, the insertion interval also differs for each channel.

On the other hand, the conventional device can be used even when the lower order group side is synchronized, but in that case, the insertion position of the stuff pulse 51 is as shown in FIG. 4 because the speed of each signal is the same. In this way, each signal is inserted at the same position, and the insertion interval is also the same for each channel. therefore,
When a conventional multiplex converter is applied to such a system, stuffing control circuits and destuffing control circuits that operate in the same way are used to insert stuffing pulses at the same position or remove stuffing pulses at the same position. A circuit is required for each of the low-order group signals, resulting in large overhead.

Furthermore, since each channel has around 11 locked loops, differences in the characteristics of each phase locked loop can be seen in the signal after destuffing. For example, although the signal speeds should originally be exactly the same (the average speed is the same), jitter appears differently for each channel, which may make subsequent processing difficult.

An object of the present invention is to provide a multiplex conversion device for multiplexing a low-order group synchronous signal into an asynchronous high-order group signal, which eliminates the above-mentioned waste and has no difference in jitter characteristics etc. for each channel. It is.

[Means to solve the problem]

The above purpose is to use one stuff control circuit in common on the transmitting side for each input signal on the low-order group side.

On the receiving side, this is also achieved by using a common destuffing control circuit.

[Effect]

The stuffing control circuit on the transmitting side inserts a stuffing pulse at the same position for each input signal, and conversely, the destuffing control circuit on the receiving side removes the stuffing pulse at the same position in the higher-order group signal. Since the low-order group side is synchronized, a common stuffing control circuit and destuffing control circuit can be used for each low-order group signal.

〔Example〕

The present invention will be explained in detail below.

FIG. 1 is a block diagram showing the configuration of a device in which the present invention is applied to a device that multiplex converts four fourth-order group synchronization signals into a fifth-order group signal.

Multiplexing the manually generated 4th order group synchronization signal into the 5th order group signal,
The configuration of the transmitting unit that sends data to the Endarasu relay device is shown in Figure (a).
The configuration of the receiving section that performs the reverse demultiplexing is shown in FIG. 2(b). This device consists of the circuits shown below. In other words, the transmitter includes a bipolar-unipolar converter 1
．． Transmitter buffer memory 2. Write pulse generation circuit 5.
Read pulse generation circuit 6. Stuff pulse control circuit 79
Phase comparison circuit 8. Pulse insertion circuit 3. Multiplexing circuit 4° timing pulse generation circuit 9, 5th order group clock generator 10
It consists of

Further, the receiving section includes a unipolar/bipolar converter 11.
Receiver buffer memory 12. Read pulse generation circuit 16
．． Write pulse generation circuit 172 phase-locked loop 18. Destuff control circuit 19. Pulse detection circuit 13. Frame synchronization circuit 14. Demultiplexing circuit 15. It is composed of a timing pulse generation circuit 20.

Among the above, pulse insertion circuit 3. Multiplexing circuit 4゜5th order group clock generation circuit 10. Pulse detection circuit 13, frame synchronization circuit 14. As the demultiplexing circuit 15, the same circuit as the conventional one can be used.

The difference from the conventional device is the stuff pulse control circuit7. Since this is the periphery of the destuff control circuit 19, the operation will be explained with a focus on these and also with reference to FIG.

Since the fourth-order group signals are synchronized, there is no need for the transmitter to extract timing from each input signal as in the past. Instead, a new circuit 5 is required which receives an externally generated synchronization clock and generates a write pulse to the buffer memory from it. Since the input signals are synchronized, the difference between the internal clock speed and the speed of each input signal is constant for all channels, and therefore the stuff pulse insertion timing is the same for each input signal. Therefore, the write pulse generation circuit 5. A read pulse generation circuit 6, a circuit for detecting the phase difference between them 8. If a set of circuits 7 for inserting a stuff pulse when a 1-bit phase difference occurs is provided, the stuff ink of each input signal can be controlled. The stuff pulses are inserted at the same timing as shown in FIG. After inserting stuff pulse, frame pulse,
Stuff designation pulses and the like inserted in response to pulses designating stuff positions from the stuff control circuit 7 are inserted and multiplexed.

On the other hand, on the receiving side, each signal after passing through the pulse detection circuit 14 has a stuff pulse 51 at the same position as shown in FIG.
is inserted, it is possible to remove the stuff pulses of each channel using a common circuit. The destuff control circuit 19 includes the frame synchronization circuit 14 and the pulse detection circuit 13.
The frame start position and staff specified pulse are received from each frame.

At the stuff position, the write pulse generating circuit 17 is requested to inhibit writing to the memory 12 for each channel at the same timing. The signal written in the memory is read out using the clock obtained by smoothing the clock after the stuff pulse has been removed by the phase-locked loop 18. Since one or more phase-locked loops 18 are used in common for each channel, there is no jitter. There is no difference in characteristics etc.

The output of the transmitter of the multiplex converter of the present invention is exactly the same as the output when the fourth-order group synchronization signal is input to the conventional multiplex converter shown in FIG. Also.

Since the input and output signals of the receiving section are the same as those of the conventional device, it is easy to replace this device with the conventional device.

As described above, if the present invention is applied to a multiplex converter that converts a high-order group signal that is not synchronized with a low-order group synchronization signal, a stuffing control circuit can be used in the transmitting section and a destuffing control circuit can be used in the receiving section. , and low-order group signals, the circuit configuration becomes a simple WI circuit. Furthermore, it is possible to configure a multiplex conversion device in which there is no difference in jitter characteristics for each channel.

〔Effect of the invention〕

According to the present invention, stuffing control circuits and destuffing control circuits corresponding to each of the low-order group signals are no longer necessary in the transmitting section and the receiving section of the stuffing synchronous multiplex converter that converts a low-order group synchronous signal into an asynchronous high-order group signal. Therefore, a multiplex conversion device with no overhead and a simple circuit can be constructed. Furthermore, since one destuffing control circuit can perform destuffing for all channels, a multiplex conversion device with the same jitter characteristics for each channel can be achieved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a multiplex conversion device according to an embodiment of the present invention, in which (a) shows a transmitter and (b) shows a receiver. FIG. 2 is a block diagram of a conventional stuff synchronous multiplex converter, in which (a) shows a transmitter. (b) is a receiving section. FIG. 3 is a pulse timing diagram showing the stuff pulse insertion position when the lower order group side is asynchronous, and FIG. 4 is a pulse timing diagram showing the stuff pulse insertion position when the lower order group side is synchronized. DESCRIPTION OF SYMBOLS 1... Bipolar-unipolar converter, 2... Transmitter buffer memory, 3... Pulse insertion circuit, 4...
Multiplexing circuit, 5...Write pulse generation circuit, 6...
Read pulse generation circuit, 7... Stuff pulse control circuit, 8... Phase comparison circuit, 9... Timing pulse generation circuit, 10... High-order group clock generator, 11...
- Unipolar/bipolar converter, 12... Receiver buffer memory, 13... Pulse detection circuit, 14...
Frame synchronization circuit, 15... Demultiplexing circuit, 16...
-Read pulse generation circuit, 17...Write pulse generation circuit. 18... Phase locked loop, 19... Destuff control circuit, 20... Timing pulse generation circuit, 31...
・Bipolar/unipolar converter, 32... Transmitter buffer memory, 33... Timing extraction circuit, 34.
. . . Write pulse generation circuit, 35 . . . Read pulse generation circuit, 36 . . . Phase comparison circuit, 37 .
unipolar/bipolar converter, 40... receiving section buffer memory, 41... read pulse generation circuit, 42...
°°Write pulse generation circuit, 43...Phase locked loop, 44...Destuff control circuit, 45...Receiver low-order group corresponding section, 51...Stuff pulse insertion position. Tsumugi 2 illustration Tsumugi 3 (!l 4th concave 5/ staff l Gurusu god entrance 1

Claims (1)

[Claims] 1. In a multiplex conversion method using a stuff multiplexing method,
1. A multiplex conversion device comprising a transmitter that performs stuffing of a plurality of input low-order group signals using the same stuffing control circuit. 2. A multiplex conversion device comprising a transmitter having a function of inserting stuff pulses into all of a plurality of low-order group signal input signals in response to one stuff pulse insertion request. 3. A multiplex conversion device comprising a transmitter having a function of inserting stuff position designating pulses into all of a plurality of low-order group signal input signals in response to one stuff pulse insertion request. 4. Claims 1 to 3 include a transmitter having a function of using a clock signal generated outside the device as a write control signal to the memory of the stuff circuit. multiple converter. 5. In the multiplex conversion method using the stuff multiplexing method,
1. A multiplex conversion device comprising a receiving section that performs destuffing of a plurality of output low-order group signals using the same destuff control circuit. 6. A multiplex conversion device comprising a receiver having a function of removing stuff pulses from a plurality of low-order group signal input signals in response to one stuff pulse removal request.