JPH0127602B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a modulated color signal processing circuit for a color television camera, and provides a signal processing circuit including a differential amplifier with a stable output DC potential suitable for a semiconductor integrated circuit (hereinafter abbreviated as IC). It is something to do.

In particular, in the present invention, when a modulated color signal is amplified to output two signals whose phases are inverted, a comparison circuit that operates only during the horizontal blanking period of the output signal detects the DC potential difference between the two signals. , the relative error between the DC potentials of the two signals is eliminated without being affected by signal waveform distortion or the like.

In a color television camera, in order to create a color difference signal using a color signal optically modulated by a stripe filter and a luminance signal that is not modulated by the stripe filter, the modulated color signal described above is converted into a low frequency signal. Need to convert. This method is generally used by detecting an amplitude-modulated color signal using a diode or transistor, and then passing it through a low-pass filter. When using a double wave detection circuit as this detection circuit, connect the primary side of the transformer to the load of the amplifier,
There is a method of extracting two modulated color signals whose phases are reversed by 180 degrees with respect to the center point of the coil from the secondary output terminal and sending these two signals to the next stage detection circuit. However, this method of creating two signals with inverted phases using a transformer has the disadvantage that when the signal processing circuit is integrated into an IC, the number of signal input/output terminals increases, making it difficult to increase the degree of integration of the IC. be.

A differential amplifier as shown in FIG. 1 can be considered as a method of obtaining two signals with inverted phases using a circuit suitable for IC implementation. Transistors T ₁ and T ₂ whose emitters are differentially connected via a resistor R ₃ , load resistors R ₄ and R ₅ connected to the collectors of these transistors T ₁ and T ₂ , and a constant current source of a differential amplifier. It consists of a certain transistor T ₃ , T ₄ , resistors R ₁ , R ₂ connected to the emitters of the transistor T ₃ , T ₄ , and a DC bias V _A , and the transistor T ₁ , T ₂
The modulated color signal S ₁ input from the base of is amplified and output from the respective collectors of transistors T ₁ and T ₂ and sent to the next stage double-wave detection circuit, but in such a differential amplifier, Since there are element mismatches caused by the IC process technology, it is not necessarily an ideal circuit. For example resistance R ₄
and R ₅ , the resistance R ₄
and the voltage drop due to the current I ₁ R ₄ × I ₁ = V ₁ and the voltage drop due to the resistor R ₅ and the current I ₃ R ₅ × I ₂ = V ₂ , there is a voltage drop equal to the element mismatch. Mismatch △V=V ₁ −
V ₂ will occur. Such element mismatch is
This adversely affects the modulated color signal in the next stage detection circuit. For example, as shown in the signal waveform example in Figure 2, if there is a mismatch between the load resistances mentioned above, the output Vs ₁ of transistor T ₁ and the output of transistor T ₂
Vs ₂ is shifted by the DC voltage error △V mentioned above, and the second
The relationship is as shown in Figure a.

As shown in Figure 1, the above two signals are
When two positive signals are made conductive through diodes D ₁ and D ₂ connected to the respective collectors of transistors T ₁ and T ₂ , the load resistance increases.
At R ₆ , a signal as shown in Figure 2b can be obtained. As is clear from the figure, there is an error in the DC potential of the two signals, so the signals are duplicated. When a signal with such a waveform is converted into a low-frequency signal through a low-pass filter, an error occurs in the signal level compared to when a normal signal with no DC potential error is converted, and color television The drawback is that it impairs the color balance of the camera.

DESCRIPTION OF THE PREFERRED EMBODIMENTS A signal processing circuit according to the present invention will be described below with reference to the drawings. FIG. 3 shows a basic configuration example of the present invention, showing transistors T ₁ and T ₂ whose respective emitters are connected via a resistor R ₃ .
constitutes a differential amplifier, and the color signal _S1 modulated by the stripe filter in the color television camera mentioned above is applied to the base. Also, transistors T ₃ and T ₄ forming current sources are connected to each emitter.
Each emitter of T ₃ and T ₄ is a bias resistor
R ₁ and R ₂ are connected. More transistors
The base of T ₃ is given a fixed bias V _A.
Load resistors R ₄ and R ₅ are connected to the collectors of the transistors T ₁ and T ₂ , respectively, and the amplified signal output is taken out and sent to the next stage circuit from terminals 1 and 2, and the transistors T ₅ and The terminals 1 and 2 are connected to the respective bases of the comparator circuit composed of _T6 .
is connected. The collector of the transistor T ₅ is connected to the load resistor R ₆ and the AC signal removal capacitor C ₂
and the base of the aforementioned transistor _T4 are further connected.

Next, the operation will be briefly explained. Let the respective collector potentials of differential transistors T ₁ and T ₂ be V ₁ ,
When V ₂ , each potential is V ₁ = I ₃ × R ₄
V ₂ =I ₄ ×R ₅ . In the case of R ₄ = R ₅ and I ₃ = I ₄ ,
There is no problem since the two DC potentials V ₁ =V ₂ , but if a mismatch occurs between the resistors R ₄ and R ₅ , for example, an error voltage will occur between the DC potentials V ₁ and V ₂ .
This error voltage is detected by transistors T ₅ and T ₆ ,
The configuration is such that the AC signal is removed at the collector of the transistor T ₅ and only the DC signal is fed back to the base of the transistor T ₄ to control the current I ₄ and correct the error voltage due to the aforementioned mismatch.

The present invention is based on the circuit configuration shown in FIG. 3, and further operates the constant current I ₀ portion in FIG. 3 with a horizontal blanking pulse in order to conduct the aforementioned comparison circuit only during the horizontal blanking period. can be,
FIG. 4 shows an example of this. In Figure 4,
The emitters of the differential transistors T ₁ and T ₂ are connected through a resistor R ₃ and the modulated color signal S ₁ is applied to the base. Also, the transistor T ₁ ,
Each emitter of T ₂ is connected to a transistor T ₈ , T ₉
A constant current circuit composed of resistors R ₇ and R ₈ is connected. The DC voltage source V _A is the base bias of this constant current circuit. The collector of transistor _T1 has a transistor connected between the base and collector to form a diode as an active load.
The base of T ₁₁ and the base of another transistor T ₁₂ are connected, and the collector of this transistor T ₁₂ is connected to the load resistor R ₁₆ and the collector of transistor T ₁₅ , and becomes output terminal 1, which is used for double wave detection in the next stage. connected to the circuit and comparison circuit. Further, a DC control signal is applied to the base of the transistor _T15 to control the collector current of the transistor _T15 . On the other hand, the collector of the transistor _T2 is connected as an active load to the base of a transistor _T13 whose base collectors are commonly connected to form a diode configuration, and the base of another transistor _T14 . The collector of the transistor T ₁₄ is connected to the load resistor R ₁₅ and the collector of the transistor T ₁₀ , and is connected as the output terminal 2 to the next stage circuit in the same way as the output terminal 1 described above. The base of the transistor _T10 is connected to the aforementioned DC voltage source V _A , and the collector current is a constant current.

The operation of the comparison circuit is as follows. The output signal from the differential amplifier input from the bases of the emitter follower transistors T ₁₆ and T ₁₇ is made low impedance, and then the output signal from the differential amplifier T ₁₈ and T ₁₉ whose emitters are differentially connected is input. input to the base. More transistors
The emitters of T ₁₈ and T ₁₉ are connected to the collector of a transistor T _{20 .}
A blanking signal is input to the base of the circuit through the resistor _R19 , and the transistor _T20 performs constant current operation only during the horizontal retrace period, and compares the DC potentials of the two signals mentioned above during the horizontal retrace period. The difference signal is detected by a load resistor _R20 connected to the collector of the transistor _T19 . In this way, the comparison circuit is made conductive only during the horizontal blanking period and the DC potentials of the two amplified output color signals during the horizontal blanking period are compared. If there is an influence such as an interfering pulse from the circuit, an error will occur in the average DC potential of the color signal, so this is to remove these influences and accurately compare the DC potentials of the two signals. In other words, since the horizontal blanking pulse does not include any extra signals, accurate comparison can be made by using it. The detection signal of the comparator circuit is detected and smoothed by the base-emitter diode of the transistor _T21 , the resistor ₂₁ , and the capacitor _C3 , and then DC amplified through the transistor _T22 , and then sent to the base of the DC current control transistor _T15 mentioned above. Sent as a control signal. As is clear from FIG. 4, the above comparator circuit forms a negative feedback loop in terms of direct current, and is configured to match the direct current potential of the output terminal 1 and the direct current potential of the output terminal 2. Resistors R ₉ , R ₁₆ , R ₁₇ , R ₂₂ , and R ₂₃ are bias resistors, respectively.

Next, the DC potentials of output terminals 1 and 2 will be explained. Transistors T ₁₁ and T ₁₂ and T ₁₃ and T ₁₄ each form a current mirror circuit, and each pair of current flows through emitter resistors R ₁₁ and R ₁₂ , R ₁₃ and R ₁₄
If they are consistent, they are considered to be the same. Furthermore, since the collector of transistor T ₁₄ is connected to the collector of transistor T ₁₀ forming a constant current circuit, the DC potential of output terminal 2 is
If the collector current of T ₁₄ is I' ₄ and the collector current of transistor T ₁₀ is I ₅ , then I' ₄ = I ₅ , and since no DC current flows to the load resistor R ₁₅ , the potential of DC bias V _B becomes. From an AC perspective, the current I ₅ is constant and the current I' ₄ changes by the signal current I _S , so the total signal current is I' ₄ + (±I _S ),
Of these, since I' ₄ is equal to I ₅ , only ±I _S flows through the resistor R ₁₅ , so the potential at terminal 2 is V _Ac2 = V _B − (±I _S ) × R ₁₅ during the AC signal period. It is becoming. The same applies to the DC potential of output terminal 1.
The collector current I' ₃ of the transistor T ₁₂ and the collector current I ₆ of the transistor T ₁₅ are I' ₃ = I ₆ , and since no DC current flows to the load resistor R ₁₆ , the potential is DC biased as in terminal 1. It becomes V _B. Since they are the same in terms of AC, they will be omitted.

In the above configuration, ideally the potentials of output terminals 1 and 2 should be equal, but if a mismatch occurs in any element, the above condition will be broken and the DC potentials of terminals 1 and 2 will be equal. It makes a difference. By detecting such an error potential between the two terminals using a comparator circuit and controlling the collector current of the transistor _T15 , the DC voltage at terminal 1 is made to match the DC voltage at terminal 2. .

FIG. 5 shows an example of a signal waveform. a is a blanking signal, b is a modulation signal at terminal 1, and c is a modulation signal at terminal 2. The phases of the modulation signals b and c differ by 180°. V _B1 and V _B2 are the DC potentials mentioned above,
This corresponds to the DC potential during the horizontal retrace period of the modulation signal. d and e are signal waveforms when the positive direction of the signals b and c are detected, d is a waveform containing a modulated wave component, and e is a signal waveform converted into a low frequency signal.
Also, the error voltage △V = DC potential of terminals 1 and 2
When V _B1 −V _B2 occurs, the signal waveforms are as shown in f and g. As is clear from the low-frequency signal waveform of g, the signal level ΔV _S changes under the influence of the error voltage.

FIG. 6 shows another embodiment of the invention. This embodiment differs from the embodiment shown in FIG. 4 in the configuration of the comparator circuit. The modulated signals with a phase difference of 180 degrees are connected from terminals 1 and 2 to the bases of transistors T ₁₆ and T ₁₇ , respectively, and their respective emitters are connected to the bases of differential transistors T ₁₈ and T ₁₉ by resistors R ₂₄ and R ₂₅ . connected via. Furthermore, this resistance R ₂₄ ,
The collectors of switching transistors T 23 and T 24 are connected to the connection point between R ₂₅ and the base, respectively, and these transistors T ₂₃ and _{T 24 are} conductive during the effective period of horizontal scanning, and the _signal is It is not input to dynamic transistors T ₁₈ and T ₁₉ . Then, signals are input to the differential transistors T ₁₈ and T ₁₉ only during the horizontal scanning blanking period when the transistors T ₂₃ and T ₂₄ are non-conductive. Also, constant current source transistors connected to the emitters of differential transistors T ₁₈ and T ₁₉
A constant current determined by the DC bias Vc always flows through _T20 . The other operations are the same as those in the embodiment shown in FIG. 4, so their explanation will be omitted.

As explained above, according to the present invention, two
By making it possible to match the relative values of the DC potentials of the two modulated color signals, and by providing a comparison circuit that operates only during the horizontal blanking period and comparing the DC potentials of the modulated color signals only during the horizontal blanking period. , waveform distortion of the modulated color signal,
This enables accurate comparison and cancellation of the DC potential value of the color signal without being affected by interference pulses etc. from the deflection circuit. The present invention is designed to reduce the number of IC terminals, improve the degree of integration, and reduce the number of IC terminals and improve the degree of integration when used as a drive circuit for a color signal processing circuit of an IC-based television camera, especially a dual-wave detection circuit. This has excellent effects such as eliminating the white balance error of the accompanying television camera.

[Brief explanation of drawings]

Figure 1 is a signal processing circuit diagram using a conventional circuit.
2 is a signal waveform diagram in FIG. 1, FIG. 3 is a signal processing circuit diagram showing one embodiment of the present invention, FIG. 4 is a signal processing circuit diagram showing another embodiment of the present invention, and FIG.
This figure is a signal waveform diagram of each part in FIG. 4, and FIG. 6 is a signal processing circuit diagram showing still another embodiment. T ₁ , T ₂ ... Differential transistor, T ₃ , T ₄ ... Constant current transistor, T ₅ , T ₆ ... Transistor for comparison circuit, T ₈ , T ₉ , T ₁₀ , T ₁₅ ... For constant current Transistor, T ₁₁ , T ₁₃ ... Transistor for active load, T ₁₂ , T ₁₄ ... Transistor for polarity reversal,
T ₁₆ , T ₁₇ ... Impedance conversion transistors, T ₁₈ to _{T 22} ... Comparison circuit transistors,
T ₂₃ , T ₂₄ ... switching transistor, R ₁₁ ...
R ₁₄ ...Load resistance, V _A , V _B , Vc ... DC bias.

Claims (1)

[Claims] 1. The emitters of the first and second transistors are connected to each other via a resistor, and a constant current source circuit is connected between the emitters of the first and second transistors and a reference potential, respectively. A differential amplifier circuit is constructed by connecting a load resistor between the collector of the transistor and the power supply line, and a color signal modulated by a color television camera filter is applied between the bases of the first and second transistors. The two amplified signals of the color signal, which are obtained from the collector sides of the first and second transistors and have a phase difference of 180 degrees from each other, are extracted, and the DC potential difference between these two signals is detected by operating only during the horizontal blanking period. a comparator circuit is provided, and the output signal of the comparator circuit is configured to control at least one of the two constant current circuits in a direction in which the DC potential difference between the two signals decreases; A signal processing circuit characterized by eliminating a DC potential difference.