JPH01280980A - Sampled video signal recording disk player - Google Patents

Abstract

PURPOSE:To reduce the deterioration in the reproduced picture quality due to intermodulation by operating a time axis correction circuit (TBC) adjusting minutely the time axis fluctuation based on a synchronizing signal included in a sampled video signal while the time axis fluctuation are adjusted roughly through the application of spindle servo. CONSTITUTION:The drive of a disk is controlled within a prescribed range by a spindle servo and when a horizontal synchronizing signal is detected from a demodulated MUSE signal, the TBC comprising a PLL circuit and a memory is functioned. Thus, no jitter exists in a data outputted from a memory 36 and the MUSE signal data decoded as a sample value is obtained. Since the pilot signal is not used as the reference signal of the TBC in this way, the effect due to the deteriorated S/N of a pilot signal onto the time axis correction is not caused. Moreover, since it is not required that the memory output is subject to D/A conversion to restore once the signal into an analog MUSE signal and the signal is subjected to A/D conversion again by a MUSE decoder, the circuit constitution is simplified. Thus, the deterioration in the reproduced picture quality due to intermodulation is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a disc playing device for reproducing information such as video information recorded on a recording disc.

BACKGROUND ART A so-called high definition video signal is sampled, and data processing such as thinning and rearranging of the sample data is performed according to a certain procedure.
A method has been proposed in which a video signal (hereinafter referred to as a sampled video signal) obtained by D/A converting the signal to be processed and returning it to an analog signal is transmitted or recorded and reproduced as a baseband signal.

An example of using such a sampled video signal is the MU S, which compresses a high-definition video signal to a bandwidth of about 8 MHz to enable transmission by broadcasting satellites.
E (Multlple 5ub-Nyqulst S
There is an amplification encoding method.

According to this MUSE method, it is also easy to record high-quality video signals on a recording medium such as an optical video disc.

FIG. 2 shows the structure of one frame of the standardized MUSE signal. One frame consists of 1125 lines, and one line consists of 480 samples. The sample transmission rate for this sample value is 16.2M samples/sec. Sample numbers 1-12 of each line are assigned to the horizontal synchronization signal.

Frame pulses, which are vertical synchronization signals, are inserted into line numbers 1 and 2. The color signal (shown as the C signal in FIG.
58 and 605-1120 sample numbers 13-106
The sample data is transmitted.

The luminance signal (shown as a Y signal in FIG. 2) is transmitted by sample data of sample numbers 107-480 on line numbers 47-562 and 609-1124.

Line numbers 3 to 46 and 565 corresponding to the vertical flyback period
-608 are areas where audio information or additional information is time-division multiplexed and transmitted.

FIG. 3 shows an example of the waveform of the MUSE signal. A horizontal synchronizing signal is added to the MUSE signal with the same polarity as the image signal, and has an amplitude that is approximately 1/2 of the pp value of the image signal. Further, the horizontal synchronizing signal waveform of the i+1th line is an inversion of the horizontal synchronizing signal waveform of the i-th line.

FIG. 4 shows the horizontal synchronization signal. The MUSE signal consists of 480 sample values in one horizontal scanning period, and the numbers shown as sample numbers in FIG. 4 represent the number of samples from the first sample in one horizontal scanning period.

Here, the amplitude value of sample number 6 is a phase reference point called an HD point, and is used, for example, in a decoder (not shown) to control the phase of a clock for resampling the MUSE signal.

In addition, the numbers shown as levels in Figure 4 are
It represents the level of each sample when the signal is quantized to 256 levels. The above HD point level is 12
It has 8 levels and is the median value of the image signal amplitude.

When transmitting the MUSE signal by, for example, satellite broadcasting, the signal propagates in space, so no fluctuations (jitter) in the time axis occur.

However, when recording and reproducing information on a video disc, for example, jitter occurs as the disc rotates. In order to absorb this, a time base correction circuit (hereinafter referred to as TBC) is required.

By the way, the synchronization signal of the MUSE signal is positive polarity synchronization,
The amplitude of the synchronization signal is within the level of the image signal. As a result, it is difficult to easily detect the synchronization signal in the MUSE signal using methods such as amplitude separation as in the case of conventional NTSC signals, and synchronization must be performed when the signal is not being reproduced on the normal time axis. Separation is difficult.

For this reason, if normal playback is not being performed, for example, when the spindle motor starts up during playback on a video disc player, or when the rotational speed is disturbed due to a large burst-like dropout, or during trick play such as scanning or searching. It becomes difficult to use the synchronization signal of the MUSE signal for time axis control in a state where the rotation of the disk is not normal, such as when returning to normal playback.

Therefore, as shown in FIG. 5, when recording the MUSE signal on a video disc, a sine wave pilot signal is frequency-multiplexed onto the video FM modulation signal in a band lower than the lower sideband of the video FM modulation signal. A method has been proposed in which this pilot signal is separated during reproduction and used, for example, as a phase reference for TBC to detect time base errors.

A prior example of such a system will be explained with reference to FIG. In FIG. 6, a pilot signal and an FM-modulated MUSE signal are frequency-multiplexed and recorded on a disk 1, and the recorded signal is read by a pickup 2 as the disk 1 rotates. The above recording signal is FM
The demodulator 3 performs FM demodulation to obtain a MUSE signal. Further, the pilot signal is separated from the recorded signal by a pilot signal separation circuit 4 constituted by a BPF or the like. The separated pilot signal is supplied to the spindle servo circuit 5, and at the same time, is supplied to the phase comparator 7 that constitutes the PLL loop.

The spindle servo circuit 5 includes, for example, a frequency phase comparator and an equalizer amplifier, and controls the rotation of the spindle motor 6 based on the difference signal between the pilot signal and the comparison reference signal supplied from the frequency divider 14.

The above PLL loop includes a phase comparator 7, a loop filter 8
, VC09 and frequency divider 10, VCO9
24.3 [MH
A variable timing signal having a center frequency of z] is obtained. This variable timing signal is supplied to the A/D converter 11 and memory 1.2 as an operating clock signal.

The A/D converter 11 receives the M signal demodulated by the FM demodulator 3.
The USE signal is sampled in synchronization with the variable timing signal, and the obtained sample data is supplied to the memory 12. The memory 12 continuously writes the sample data in synchronization with the variable timing signal, and continuously reads out the sample data in synchronization with a reference timing signal supplied from a reference clock generator 13 constituted by a crystal oscillator or the like. The clock frequency of the reference timing signal is 24.3 [MHz
] is a constant value. The series of sample data thus read out from the memory 12 is converted into an analog signal by a D/A converter 15 operating in synchronization with the reference timing signal, filtered by an interpolation filter 16, and then sent to MUSE as an analog signal again. I get a signal. This M
The USE signal is supplied to a MUSE decoder (not shown).

In the MUSE decoder, 16. 2 [MH2
] The analog MUSE signal is A/D converted again using the resampling clock, and data demodulation is performed to demodulate a video signal, control data signal, etc.

The reference timing signal of the reference clock generator 13 is also supplied to the frequency dividing circuit 14, and is frequency-divided by the circuit to become the aforementioned comparison reference signal, which serves as a comparison phase reference for the spindle servo circuit 5.

In this way, TBC is realized by writing sample data into memory using a variable timing signal output from the PLL that follows a pilot signal that has the same jitter as the MUSE signal, and reading the stored sample data using a jitter-free reference timing signal. jitter-free M
A USE signal is obtained.

By the way, the above-mentioned TBC has a technical feature in that the pilot signal is used as the TBC phase reference, but if the S/N of the pilot signal decreases, the jitter will not be removed sufficiently by the TBC, and the residual output of the TBC will be reduced. There is a problem that jitter increases.

That is, as shown in FIG. 7, the read recorded signal contains not only the first side wave component of the video FM modulation signal, but also the second side wave component as shown by diagonal lines and higher-order components. There are side wave components.

These lower side wave components reduce the S/N of the pilot signal and increase residual jitter. The magnitude of this interfering lower side wave component is determined by the spectral distribution of the baseband image signal, FM
It depends on the magnitude of the modulation deviation and the depth of pre-emphasis performed during FM modulation.

Regarding the spectral distribution of the baseband image signal, the higher the level of the high frequency component in the image signal band, the greater the interference, and the digital audio data multiplexed during the vertical retrace period of the MUSE signal also contains the middle and high frequency component. Since the level of is large, the interference is large. Furthermore, the greater the deviation of the image signal and the deeper the pre-emphasis, the greater the interference.

Therefore, there are problems in that the residual jitter increases depending on the content of the image information, and the residual jitter increases depending on the deviation or pre-emphasis setting of the image signal.

On the other hand, residual jitter can be reduced by increasing the level of the pilot signal and performing multiplex recording, but intermodulation components between the video FM modulation signal and the pilot signal occur, which interferes with the video FM modulation signal, resulting in poor playback image quality. There is a problem with the deterioration of the

In addition, when transmitting the MUSE signal by satellite broadcasting, the transmission system can be considered as a sample value transmission system, and 16
．． Sample values of the image signal are transmitted at a sample transmission rate of 2M samples/second.

This is phase-synchronized with the image signal on the receiving side at 16.2MHz.
By resampling with the clock, the correct image sample values can be restored.

However, in recording and reproducing systems using video disks and other recording media, it is difficult to strictly control the relative phase between the previously described image signal and the pilot signal during recording, and the pilot signal is used as the phase reference to create an image. It is not possible to generate a 16.2 MHz clock phase-synchronized with the signal.

Therefore, it is necessary to consider the video disc recording and reproducing system as a waveform transmission system, and as described in the recording and reproducing method described above, the demodulated MUSE signal is resampled with a higher frequency clock of, for example, about 24°3 MHz, and the time axis is After correction, the signal is D/A converted and returned to an analog MUSE signal, which is then supplied to the decoder.

As a result, the TBC device of the performance equipment is required to operate at high speed, and after the MUSE signal is A/D converted and D/A converted in the TBC, it is A/D converted again in the decoder connected after the TBC. However, there is also the problem that signal conversion is redundant.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a sampled video signal recording disk performance device that does not increase jitter depending on the content of video information and has a relatively simple circuit configuration.

In order to achieve the above object, a sampled video signal recording disk performance device according to a first aspect of the present invention includes a reading means for obtaining a read signal from a recording disk that carries a sampled video signal, and a rotation control of a spindle motor that drives the recording disk. spindle servo means for demodulating the sampled video signal from the read signal; and a demodulation means for storing sample data obtained by sampling the demodulated video signal in synchronization with a variable timing signal; storage means for reading out the stored sample data in synchronization with the demodulated sampled video signal; synchronization signal detection means for generating a synchronization signal when detecting a synchronization signal in the demodulated sampled video signal; and a phase difference between the synchronization signal and the variable timing signal. The present invention is characterized in that it includes a phase difference detection means for detecting the phase difference and generating a phase difference signal representing the phase difference, and a phase control means for controlling the phase of the variable timing signal according to the phase difference.

Furthermore, in order to expand the pull-in range of the PLL constituting the TBC, the sampled video signal recording disk performance device of the second invention includes a reading means for obtaining a read signal from the recording disk that carries the sampled video signal, and a reading means for obtaining a read signal from the recording disk that carries the sampled video signal. spindle servo means for controlling the rotation of a driven spindle motor; demodulation means for demodulating the sampled video signal from the read signal; and demodulation means for demodulating the sampled video signal from the read signal; storage means for storing sample data to be stored and reading out the stored sample data in synchronization with a reference signal; synchronization signal detection means for generating a synchronization signal when detecting a synchronization signal in the demodulated sampled video signal; phase difference detection means for detecting a phase difference between the signal and the variable timing signal to generate a phase difference signal representing the phase difference; and detecting a frequency difference between the variable timing signal and the reference signal to detect the frequency difference. The present invention is characterized in that it includes a frequency difference detection means for generating a frequency difference signal representing the phase difference signal, and an angle control means for controlling the angle of the variable timing signal based on the phase difference signal and the frequency difference signal.

Example Embodiments of the present invention will be described below with reference to FIG.

In the apparatus shown in FIG. 1, parts corresponding to those in the apparatus shown in FIG. 6 are denoted by the same reference numerals, and a description thereof will be omitted.

As shown in FIG. 1, the A/D converter 30 samples the MUSE signal supplied from the FM demodulator in synchronization with the variable timing signal supplied from the VCO 35, and passes the sample data through a low-pass filter (hereinafter referred to as LPF). )31
and the memory 36. The frequency of the variable timing signal is determined depending on the degree of jitter, with the center frequency of 16.2 [MHz] being the same as that of the reference signal described later.

LPF 31 is a digital filter, and FM demodulator 3
The triangular noise superimposed on the output MUSE signal is reduced. The level of this noise tends to increase in proportion to the frequency, as shown in FIG. 8(A).

The output of the LPF 31 is supplied to a phase difference detector 32. The phase difference detector 32 detects the value of sample data at the HD point from the output data of the LPF 31. As mentioned above, since the level at the HD point of the jitter-free MUSE signal is specified in 1287258,
MUSE by reading the actual level of this point.
The phase difference between the signal and the variable timing signal can be detected.

The configuration of the phase difference detector 32 will be described later.

The phase difference at the HD point detected as a sample value is converted into an analog voltage by the D/A converter 33, and becomes the control voltage of the VCOB 5 via the loop filter 34. The oscillation frequency fS of the VCO 35 is 16.2 [M
Hz], and the oscillation frequency changes around this frequency in accordance with the phase difference. As a result, the phase of the variable timing signal described above is adjusted.

Note that it is also possible to configure the loop filter 34 with a digital filter. In this case, the D/A converter 33
A loop filter 34 is inserted before.

A/D converter 30, LPF 31, phase difference detector 32, D
/A converter 33, loop filter 34, and VCO 35 are P
Configure the LL circuit. These PL and L circuits perform follow-up control to control the phase of the variable timing signal so that the detected phase error of the HD point becomes zero, so the variable timing signal output from the PLL circuit is synchronized with the horizontal synchronization signal of the demodulated MUSE signal. Since it is possible to extract a specified number of samples by performing phase synchronization and expanding and contracting the sampling interval according to the time axis expansion and contraction of the MUSE signal, it is possible to resample the image signal at the position where it should be sampled.

That is, the recording and reproducing system of the video disc of the embodiment can be considered as a sample value transmission system.

The A/D converter 30 samples the analog MUSE signal with a 16.2 [MHz] clock that follows the phase change of the MUSE signal and is phase-synchronized, thereby restoring the data at an appropriate timing and storing the data in the memory 36. supply to.

The memory 36 converts the output data of the A/D converter 30 into a VCO.
The sample data is written in synchronization with the variable timing signal supplied from the reference clock generator 35, and the sample data is read out at regular intervals in synchronization with the reference clock supplied from the reference clock generator 37.
The signal is supplied to a MUSE decoder (not shown). The frequency of the reference clock is a constant value of 16°2 [MHzl, which is the resampling frequency of the MUSE signal, and the output of the memory 36 provides MUSE signal data with time axis fluctuations corrected. The reference clock signal is also supplied to the frequency divider circuit 38 at the same time. The frequency-divided reference clock signal becomes a phase reference signal for the spindle servo circuit 5. The spindle servo system lacks coordination compared to the MUSE signal processing system described above, and is less affected by the S/N reduction of the pilot signal. The other configurations are the same as the previous example.

In this way, when the rotation of the disk is controlled within a certain range by the spindle servo and the horizontal synchronization signal is detected from the demodulated MUSE signal, the TBC constituted by the PLL circuit and memory functions, and the data output from the memory 36 is is a jitter-free MU restored as a sample value
SE signal data can be obtained.

In this way, since the pilot signal is not used as the TBC reference signal, there is no influence on the time axis correction due to the S/N reduction of the pilot signal, and the output of the memory 12 is not affected as in the prior art shown in FIG. Since there is no need to D/A convert the signal, once return it to an analog MUSE signal, and then perform A/D conversion again in the MUSE decoder, there is an advantage that the circuit configuration is simplified accordingly.

Next, the reason why the LPF 31 reduces the triangular noise generated by the FM demodulator 3 will be explained with reference to FIGS. 8(A) to 8(D).

FIG. 8(A) shows the MUSE output from the FM demodulator 3.
It shows triangular noise superimposed on the signal. DC-f s/2 (f
s: At a sampling frequency of 16°2 [MHzl], the high frequency noise level is large.

FIG. 8(B) shows the noise distribution in the output of the A/D converter 30, and as is well known regarding sampling,
The original spectral characteristics are repeated at every sampling frequency fs.

FIG. 8(C) shows the noise distribution in the output of the LPF 31, which is obtained by multiplying the spectrum in FIG. 8(B) by the gain characteristic of the LPF 31 shown by the broken line in the figure. L
The gain characteristic of PF31 is the baseband DC-fs/2, as is known as the characteristic of a digital filter.
It is expressed as a periodic function that repeats at each frequency fs a characteristic that is a low-pass type within the range of fs/2 to fs and a high-pass type within the range of fs/2 to fs. The LPF 31 suppresses the level of high-frequency components of the triangular noise in the baseband.

FIG. 8(D) shows the noise distribution in the output of the phase difference detector 32. The phase difference detector 32 is 4 per line.
Only one sample per line from the data input every 80 samples, that is, the HD of sample number 6.
Only data at points are extracted. In other words, data sampled at fs-16,2 [MHzl] is downsampled at the horizontal scanning frequency fH. f, is 16. 2 [MHz +48
0-33.75 [KHz]. At this time, MUS
The triangular noise superimposed on the E signal is also fs=16.2
[After being sampled at MHz, fH-33,7
Downsampled at 5 KHz. fH is fs
Since it is sufficiently low compared to , aliasing of the noise distribution characteristics occurs during this downsampling process. Figure 8 (C
) The noise spectrum shown in ) is folded and superimposed many times to become white noise at a substantially constant level. As described above, the high level portion of each triangular noise is suppressed by the LPF:31, so the level of white noise is also reduced.

In this way, the noise level in the output of the phase difference detector 32 is reduced, thereby improving the accuracy of detecting the phase error at the HD point.

LPF31 is a well-known transversal filter (FI
R). However, if the order of the filter is too high, the impulse response will become long and the video signal at the end of the previous line will affect the level of the HD point, so the order of the filter should be kept around 9th order. There is. For the same reason, it is not appropriate to use a recursive digital filter (IR).

For example, if the LPF 31 is configured with a third-order FIR filter with tap coefficients of 1/4.1/2.1/4, the triangular noise level can be suppressed to about 174, and the white noise level can also be suppressed to about 1/4. It is suppressed to 4.

As described above, by supplying the A/D converted sample data to the phase difference detector 32 via the digital filter, the accuracy of detecting the phase error at the HD point is improved. In other words, the S/N at the HD point is increased by reducing noise in the MUsE signal.

Note that the S/N ratio at the HD point can also be increased by increasing the amplitude of the horizontal synchronization signal of the MUSE signal. As shown in Figure 4, the horizontal synchronization signal of the MUSE signal is centered around the 128 level HD point.
It has an amplitude of 64-192. If this is converted into, for example, twice the amplitude in a video disk recording device, it will have amplitudes of 0 to 255 levels centered around the 128 level. Such conversion can be easily realized by bit-shifting the sample data of the horizontal synchronization signal, and it is equally easy to restore it within the playback device. If the amplitude of the horizontal synchronization signal is doubled, the S/N ratio at the HD point will equivalently improve by 6 [dB], and the phase error detection accuracy will improve accordingly.

Next, a specific circuit of the phase difference detector 32 will be explained.

As shown in FIG. 3, the horizontal synchronization signal in the MUSE signal is a positive synchronization signal added with the same polarity as the image signal.

Compared to negative polarity synchronization, which is added with the opposite polarity to the image signal as in standard television signals, the circuit configuration for synchronization separation is complicated because the amplitude of the synchronization signal cannot be separated. In addition, in video disc performance devices, MUSE including Jeddah
Since the horizontal synchronization signal is discriminated from the signal and the phase error at the HD point is detected, there may be cases where the image signal is erroneously determined to be the horizontal synchronization signal due to jitter and the phase error is output.

Therefore, in this embodiment, a configuration as shown in FIG. 9 is used to simplify the phase difference detector and prevent erroneous detection of the horizontal synchronization signal.

In FIG. 9, MUSE data supplied from the LPF 31 is supplied to a line inversion circuit 50.

The line inversion circuit 50 inverts each bit of the data input line by line, thereby detecting the same waveform of each horizontal synchronization signal, which has a waveform inverted line by line as shown in FIG. Make it easier. Line inversion circuit 50
The output is supplied to an HD point extraction circuit 53 and a pattern matching circuit 52. Pattern matching circuit 5
2 performs pattern matching between the MUSE data input and the reference data pattern input corresponding to the horizontal synchronization signal while the time window signal is supplied from the time window generation circuit 51. When the change pattern of the MUSE data value matches the pattern of the horizontal synchronization signal, it is determined that the horizontal synchronization signal has arrived, and a synchronization detection signal is supplied to the HD point extraction circuit 53. The time window generator 51 is configured with a counter or the like and integrates the variable timing signal of the VCO 35 that follows the jitter, and generates a time window signal for a certain period when the integrated value reaches a value that predicts the arrival of the horizontal synchronization signal. . The HD point extraction circuit extracts HD point data only when the synchronization detection signal is supplied, and supplies this as a phase difference signal to the D/A converter 33 of the PLL circuit described above.

By using such time discrimination and pattern discrimination, it is possible to quickly detect a horizontal synchronizing signal and prevent erroneous detection of a phase error, and the circuit has the advantage of being relatively simple. Incidentally, an example of a phase difference detector having such a configuration is described in detail in Japanese Patent Application No. 62-61496.

Next, other embodiments will be described. If the PLL circuit is in phase synchronization with the MUSE signal during disk performance, the horizontal synchronization signal can be stably detected because the time window signal is also generated following jitter.

However, the PLL circuit is in an asynchronous state when starting up the performance device or performing special playback. In this state, the variable timing signal frequency of the VCO 35 is 16.2 of its center frequency.
If it deviates significantly from [MHz], the horizontal synchronization signal cannot be discriminated because the time window signal is not generated at an appropriate time. Therefore, frequency stability of the VCO 35 in an asynchronous state is required. On the other hand, VCO3 in the synchronous state
5 is desired to operate in a wide frequency range by following the jitter of the MUSE signal.

The first example of a TBC that can satisfy these two contradictory requirements is
This will be explained with reference to Figure 0. In the circuit shown in FIG. 10, the parts corresponding to those of the TBC circuit shown in FIG. 1 are denoted by the same reference numerals, and a description thereof will be omitted.

The reference clock signal from the reference clock signal generator 37 is supplied to the timing generation circuit 70.

The timing generation circuit 70 includes a counter, a gate circuit, and the like, and generates an integration control signal that controls the integration operation of the frequency counter 71 based on the reference clock signal.

The frequency counter 71 integrates the variable clock signal of C035 for a fixed period determined by the integration control signal.

For example, if the reference clock signal of the reference clock generator 37 is counted by the timing generation circuit 70 until it reaches a certain integrated value, and the above-mentioned integrated control signal is generated during the counting, this integrated control signal can give an accurate fixed time. become.

If the frequency counter 71 counts the variable clock signal of the VCO 35 within this time, the oscillation frequency of the VCO 35 can be detected as a digital value. As a result, the output of the frequency counter 71 has a value corresponding to the frequency difference between the output frequency of the reference clock generator 37 and the output frequency of the VCO 35.

The lock detection circuit 72 detects the phase difference signal output from the phase difference detector 32 and the frequency counter 71 according to the frequency difference.
The frequency difference signal which is the output of
The selection operation of the selector 73 relayed to the terminal 3 is controlled. That is, if the value of the frequency difference signal exceeds a certain range, the lock detection circuit 72 determines that the frequency of the variable timing signal output from the VCO 35 is outside the predetermined frequency range, and causes the selector 73 to select the value of the frequency counter 71. output D
/A converter 33. At this time, the circuit 33~
35 and circuits 71 to 73 is an AFC (Automatl
c Perform Frequency Control operation.

Further, if the frequency difference is within a certain range, the lock detection circuit 72 determines that the frequency of the variable timing signal is within a specified range, and causes the selector 73 to send the phase difference signal to the D/A converter 33. Let it be relayed. At this time, the circuit 30
~35 and the circuit 73 is an APC (AutoI) that uses the phase of the horizontal synchronization signal as a comparison standard
(Latic Phase Control) operation.

Note that the AFC operation and the APC operation can be performed simultaneously by using an adding means.

An example of such a TBC is shown in FIG. In the circuit shown in No. 11, parts corresponding to those in the circuit shown in FIG. The frequency difference signal from the frequency counter 71 is converted into a voltage signal by the D/A converter 74, and becomes one input of the adder 76 via the loop filter 75. The adder 76 outputs the frequency difference signal from the phase difference detector 32 to the D/A converter 3.
3 and the phase difference signal supplied via the loop filter 34, and the oscillation frequency of the VCO 35 is controlled by the added output. The other configurations are the same as the circuit shown in FIG.

In this way, by controlling the frequency and phase of the VCO 35 based on the frequency difference signal and the phase difference signal described above,
A wide frequency pull-in range of the PLL circuit can be obtained even when the performance device is started up or during a special performance, and the frequency in an asynchronous state is also stabilized.

By the way, when sampling the MUSE signal with an A/D converter, a clamp circuit is usually provided before the A/D converter to perform DC reproduction of the MUSE signal.
This clamp circuit may not be able to accurately reproduce C due to noise superimposed on the MUSE signal.

An example in which the clamp circuit biases the MUSE signal to a high level is shown in FIG. 12(A).

FIG. 12(A) shows the MUSE signal waveform. Since the HD point of the i-th line is not properly clamped, the level of the HD point of the i-th line is high, but the level of the HD point of the i+1-th line is the line inversion of the phase difference detector 32. Due to the operation of the circuit 50, it is detected to be low.

As a result, as shown in FIG. 12(B), an error component at a frequency of 1/2 of the horizontal scanning frequency fH, whose level is inverted line by line, is superimposed on the phase difference signal. This f
The H/2 component causes disturbance in the PLL circuit.

When transmitting a MUSE signal by satellite broadcasting, the transmitted signal does not include jitter, so the PLL circuit for resampling clock generation is not required to have high-speed response, so the PLL circuit in the receiving device has a narrow PLL loop band. good. In this case, the f H/2 component is sufficiently attenuated by the narrow band loop gain and does not cause any operational disturbance.

However, the PLL circuit in a video disk performance device needs to follow the MUSE signal including jitter, and high-speed response is required, so the PLL loop band is set wide. Therefore, the fH/2 component cannot be sufficiently attenuated by the loop gain, and the VCO follows this disturbance, increasing the residual jitter of the TBC output.

Therefore, in the example of TBC shown in FIG. 13, a filter 90 for removing this fH/2 component is used.
It is inserted into L Roux-j. As this filter, for example, a notch filter or the like whose gain is 0 at the frequency f H/2 is used.

An example of the configuration of such a notch filter is shown in FIG. 1st
In Figure 4, the phase difference signal from the phase difference detector 32 is IH.
It is supplied to one input terminal of a delay circuit 91 and an adder 92.

The IH delay circuit 91 is composed of, for example, a group of D-flip-flops to which a clock of frequency fH is input, delays the supplied phase difference signal by a period equivalent to one line, and supplies the delayed signal to the other input terminal of the adder 92. The adder 92 adds up and down phase difference signals corresponding to one line and supplies the result to a 1/2 multiplier 93 . The 1/2 multiplier 93 is composed of a circuit that shifts the data signal by 1 bit, for example, and adds 1/2 to the output of the adder.
is multiplied by , and then supplied to the D/A converter 33.

With this configuration, the notch filter 90 averages the phase difference signals of the current line and the previous line to cancel out the error caused by the clamp level shift.

FIG. 15 shows an example of frequency characteristics of the notch filter 90.

For the D C-f H/2 band, this filter functions as an LPF.

Note that the filter for removing the above-mentioned f H/2 component may be an analog filter, and in this case, the D/A
It is inserted after the converter 33. This analog filter has BRF (Band Rejection) even if it is an LPF.
Filter) may also be used.

In this way, by inserting a filter that reduces or removes the fH/2 component into the PLL circuit of the TBC,
Residual jitter caused by insufficient clamping accuracy is suppressed, and a TBC with stable operation can be obtained.

By the way, video discs are required to have various functions such as random access function and trick play. In order to meet such requirements, control data such as address data must be
Must be inserted and recorded in the USE signal. Also,
It is also contemplated to use video discs as data memories in the form of MUSE signals.

For example, as shown in Fig. 16, the standard method is to four-value a PCM audio signal during the vertical retrace period of the MUSE signal at a sample transmission rate of 16.2M samples/second and time-division multiplex it with a bell signal. Patent application No. 62-03835 filed by the applicant
6 has been proposed. According to the multiplexing method, MUSE
Two bits of data can be multiplexed per sample of the signal. Line numbers 3 to 42 and 565 to 6°4 of the MUSE signal contain 464 samples (-928 bits) in one line.
116 bytes) of data, line numbers 43 to 46 and 605 to 608 contain 368 samples (-7
(36 bits to 92 bytes) data can be multiplexed. The data block configuration of this data area is shown in FIG.

For example, a double de Solomon code is used as an error correction code, and P parity (for CI correction) is added in the horizontal direction and Q parity (for C2 correction) is added in the vertical direction. line number 4
For 3 to 46 and 605 to 608, set the 24-byte data corresponding to the C signal area and empty area to 00 (HEX).
The following 76-byte area is used for additional information data other than audio. The audio data area is 100 bytes x 3
Since it has a data capacity of 2 lines/field (-3200 bytes/field), it has a data capacity of 3200 bytes/field x 60 fields/sec - 192000 bytes/sec.

On the other hand, if the 2-channel audio signal is subjected to 16-bit linear quantization at a sampling frequency of 48 [KHz],
The amount of data per second is 2 channels x 48000/sec x 16 bits 1536000 bits (-192000
bytes), which exactly matches the capacity of the data area.

Further, the additional information data has a data capacity of 76 bytes x 4 lines/field (-304 bytes/field).

According to this digital data multiplexing system, high-quality two-channel PCM audio signals and 304
It becomes possible to record and reproduce bytes of additional information data, and error correction is also possible.

Furthermore, since data blocks for both audio data and additional information data are completed within one field, the random access function of the disc player can be utilized.

The present invention can also be applied to such digital data multiplexed MUSE signals.

FIG. 18 shows an example of the configuration of a disc player that reproduces a MUSE signal in which digital data is multiplexed. The circuit shown in FIG. 18 has the same parts as the circuit shown in FIG. Explanation of the portions marked with reference numerals will be omitted.

In FIG. 18, the A/D converter 30 samples the demodulated MUSE signal, which is time-division multiplexed digital data supplied from the FM demodulator, in response to a variable clock supplied from the VCO 35 to obtain sample data. This sample data is supplied to the phase difference detector 32, memory 36a, and frame pulse detector 101. A/D converter 30
, the phase difference detector 32, the D/A converter 33, the loop filter 34, and the VCO 35 constitute the previously described PLL, and the demodulation MU
A variable clock that follows the jitter of the SE signal is supplied to the A/D converter 30.

When the frame pulse detector 101 detects the frame pulse described above from the sample data, it generates a detection pulse, which is sent to the timing generation circuit 102 and the MUSE decoder for timing generation through the memory 36a for correcting jitter. Supplied to circuit 105. Memory 36a
consists of two memory areas, the previously described sample data and
The sample data and the detection pulse are written in separate areas according to the variable clock, while the sample data and the detection pulse are read out according to the reference clock supplied from the reference clock generation circuit 37a via the frequency divider 107. Eliminate jitter in sample data and detection pulses. Note that the capacity of the memory 36a for the aforementioned detection pulse may be 1 bit. The read sample data is sent to data processing circuit 1
03, audio decoding circuit 104 and video decoding circuit 1
06. Further, the detection pulse is supplied to timing generation circuits 102 and 105.

The timing generation circuit 102 generates various timing signals necessary for data processing and audio decoding processing using the time axis adjusted detection pulse as a time reference. The data processing circuit 103 decodes digital data that is time-division multiplexed during the vertical retrace period among the sample data read out from the memory 36a. Audio decoding circuit 104
performs processing such as level conversion, time axis expansion, error correction, decoding, etc. on the audio data that is time-division multiplexed during the vertical retrace period among the sample values restored based on the timing signal etc. described above. Demodulate the audio signal.

The timing generation circuit 105 generates various timing signals necessary for video decoding processing using the time axis adjusted detection pulse as a time reference. The video decoding circuit 106 receives the clock signal 48.6 supplied from the reference clock generation circuit 37a.
Based on the [MHz] clock, the timing signal, etc., data processing such as interpolation processing and rearrangement of the restored sample values is performed to demodulate a high-quality video signal.

The output of the reference clock generation circuit 37a is frequency-divided by 3 by the frequency divider 107 to become a 16.2 [MHz] reference clock, which is supplied to the memory 36a and the frequency divider 38. The other configurations are similar to the circuit shown in FIG. here,
Circuits 101 to 107 correspond to the MUSE decoder 100, but in the embodiment, circuits 101 to 104 are provided on the disc player side, and the separated data is supplied to an operation control means (not shown) to control the disc player. I'm trying to make use of it. In addition, the reference clock generation circuit 3
It is also possible to use 7g as the system clock.

In this way, the configuration of the present invention is a MU including digital data.
It can also be applied to SE signals. Further, since the D/A conversion performed in the prior art disc player shown in FIG. 6 is not performed, A/D conversion and a clock phase synchronization circuit are not required in the MUSE decoder connected at the subsequent stage, which is preferable.

In the embodiment, the spindle servo is performed using the pilot signal separated from the read signal as a phase reference, but for example, as disclosed in Utility Model Application No. 58-202883, the low frequency range of the recording signal of a video disc is Spindle servo may be performed using a PCM audio signal sample clock frequency-multiplexed. Furthermore, as proposed in Japanese Patent Application No. 63-24662 by the present applicant, spindle servo can be performed using the spindle motor rotation speed signal, the frame pulse of the MUSE signal, and the horizontal synchronization signal.

Further, in the embodiment, a case is explained in which audio data and additional information data are multiplexed in the vertical blanking period, but for example, according to Japanese Patent Application No. 62-077996 or Japanese Patent Application No. 62-077997 of the present applicant. As has been proposed, it is also possible to record digital data in the recorded portion of the video signal. In such a case, there is an advantage that recording and reproducing still images, recording and reproducing long-term audio, recording and reproducing still images and digital data, etc. is possible.

The present invention can be applied not only to a video disk performance device in which MUSE signals are recorded, but also to, for example, a VTR. Further, the video signal is not limited to the MUSE signal, but can also be applied to a video signal having a similar positive polarity synchronization signal.

As described in detail, in the sampled video signal recording disk performance device of the first invention, coarse adjustment of time axis fluctuations is made by performing a predetermined spindle servo, while
The TBC, which makes fine adjustments to time axis fluctuations, is configured to operate based on the synchronization signal included in the sampled video signal. Second, since TBC does not depend on the pilot signal, it is possible to multiplex record the pilot signal at a lower level, reducing deterioration in playback image quality due to intermodulation. Thirdly, the TBC can be operated at the resampling frequency when reproducing sampled video signals, eliminating the conventional duplication of A/D conversion and D/A conversion and the requirement for high-speed circuit operation. There are advantages.

Further, according to the configuration of the second invention, since the TBC is frequency phase controlled, in addition to the above-mentioned advantages, it has the advantage of having a wide frequency pull-in range and stable operation.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an embodiment of the present invention, and FIG.
4 to 4 are explanatory diagrams for explaining the MUSE signal, FIG. 5 is an explanatory diagram for explaining the frequency spectra of the MUSE signal and pilot signal, and FIG. 6 is an explanatory diagram for explaining the prior art. A block circuit diagram, FIG. 7 is an explanatory diagram for explaining the above-mentioned prior art, FIGS. 8(A) to (D) are diagrams showing frequency spectra of each part shown in FIG. 1,
FIG. 9 is a block circuit diagram showing an example of the configuration of the phase difference detector 32, FIG. 10 is a block circuit diagram showing an example of a TBC that switches between AFC operation and APC operation, and FIG.
Block circuit diagrams illustrating an example of a TBC that simultaneously performs AFC operation and APC operation, FIGS. 12(A) and 12(B) are M
An explanatory diagram for explaining noise due to changes in the clamp level of the USE signal, FIG. 13 is a block circuit diagram showing an example of a TBC including a notch filter, and FIG. 14 is a block circuit diagram showing an example of the configuration of the notch filter 90. Figure 15 is a characteristic diagram showing an example of the frequency characteristics of a notch filter.
6 and 17 are explanatory diagrams for explaining data format examples, and FIG. 18 is a block diagram showing an example in which the present invention is applied to a MUSE signal obtained by time-division multiplexing digital data. Explanation of symbols of main parts 30... A/D converter 32... Phase difference detector 33... D/A converter 34... Loop filter 35...VCO 36...Memory 37...Reference clock generator Applicant Pioneer Corporation

Claims (4)

[Claims] (1) A reading means for obtaining a read signal from a recording disk carrying a sampled video signal, a spindle servo means for controlling rotation of a spindle motor that drives the recording disk, and demodulating the sampled video signal from the read signal. a demodulating means, a storage means for storing sample data obtained by sampling the demodulated sampled video signal in synchronization with a variable timing signal, and reading out the stored sample data in synchronization with a reference signal; a synchronization signal detection means that generates a synchronization signal when detecting a synchronization signal in a video signal; and a phase difference detection means that detects a phase difference between the synchronization signal and the variable timing signal and generates a phase difference signal representing the phase difference. and phase control means for controlling the phase of the variable timing signal according to the phase difference. (2) The sampled video signal recording disk performance device according to claim 1, wherein the sampled video signal is a MUSE signal, and the synchronization signal is a horizontal synchronization signal. (3) reading means for obtaining a read signal from a recording disk that carries a sampled video signal; spindle servo means for controlling the rotation of a spindle motor that drives the recording disk; and demodulating the sampled video signal from the read signal. a demodulating means, a storage means for storing sample data obtained by sampling the demodulated sampled video signal in synchronization with a variable timing signal, and reading out the stored sample data in synchronization with a reference signal; a synchronization signal detection means that generates a synchronization signal when detecting a synchronization signal in a video signal; and a phase difference detection means that detects a phase difference between the synchronization signal and the variable timing signal and generates a phase difference signal representing the phase difference. means for detecting a frequency difference between the variable timing signal and the reference signal to generate a frequency difference signal representing the frequency difference; 1. A sampled video signal recording disk performance device comprising: angle control means for controlling the angle of a timing signal. (4) The sampled video signal recording disk performance device according to claim 3, wherein the sampled video signal is a MUSE signal, and the synchronization signal is a horizontal synchronization signal.