JPH01287930A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01287930A JPH01287930A JP11742288A JP11742288A JPH01287930A JP H01287930 A JPH01287930 A JP H01287930A JP 11742288 A JP11742288 A JP 11742288A JP 11742288 A JP11742288 A JP 11742288A JP H01287930 A JPH01287930 A JP H01287930A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- layer
- wiring layer
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 16
- 229910052698 phosphorus Inorganic materials 0.000 claims description 8
- 239000011574 phosphorus Substances 0.000 claims description 8
- -1 phosphorus nitride Chemical class 0.000 claims description 8
- 238000002161 passivation Methods 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 13
- 239000002356 single layer Substances 0.000 description 7
- 230000008021 deposition Effects 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910018557 Si O Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体装置のバシベーシぢン膜に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a bass basin film for a semiconductor device.
〔発明の概要]
本発明は半導体装置のパシベーション膜において、窒化
リン膜あるいはホスロン膜を用いることにより、耐湿性
にすぐれた信頼性の高い半導体装置を提供する。[Summary of the Invention] The present invention provides a highly reliable semiconductor device with excellent moisture resistance by using a phosphorus nitride film or a phothrone film in a passivation film of the semiconductor device.
〔従来の技術]
半導体装置のパシベーション膜は従来、例えばIEDM
Tech、Digest 1987209〜21
2に示されているような、CVD酸化膜、CVD窒化膜
、及びポリイミド膜との積層膜やCVD酸化膜の単層膜
やCVD窒化膜の単層膜が用いられて来た。[Prior Art] A passivation film for a semiconductor device has conventionally been formed using, for example, an IEDM.
Tech, Digest 1987209-21
2, a laminated film of a CVD oxide film, a CVD nitride film, and a polyimide film, a single-layer film of a CVD oxide film, and a single-layer film of a CVD nitride film have been used.
[発明が解決しようとする課題]
上述の従来技術ではCVD酸化膜として5i02膜が、
CVD窒化膜としてはS i z N 4膜が広く用い
られている。このうちSiO□膜は耐湿性が十分でなく
単層膜で用いようとすると膜厚を1μm以上に厚くしな
ければならない、この場合、堆積のための時間が長くな
り、下地のAg配線層にヒロックやボイドを発生させ半
導体装置の耐湿性や配線層の信頼性を低下させる。また
、Si、N4膜を単層膜で用いようとすると、膜ストレ
スが高く下地AI2配線層にボイドやノツチを発生させ
てその信頼性を低下させる。また積層膜で用いたとして
も堆積に要する時間は長くなり、上記と同様の課題を有
し、新たにスルーブツトの低下という課題も生じる。そ
こで本発明はこのような課題を解決するもので、その目
的とするところは、耐湿性にすぐれた信頼性の高い半導
体装置を提供するところにある。[Problem to be solved by the invention] In the above-mentioned conventional technology, the 5i02 film is used as the CVD oxide film.
A S iz N 4 film is widely used as a CVD nitride film. Among these, the SiO□ film does not have sufficient moisture resistance, and if it is to be used as a single layer film, the film thickness must be increased to 1 μm or more. In this case, the deposition time is longer and the underlying Ag wiring layer is Hillocks and voids are generated, reducing the moisture resistance of semiconductor devices and the reliability of wiring layers. Furthermore, if an attempt is made to use a single-layer Si or N4 film, the film stress will be high and will cause voids and notches in the underlying AI2 wiring layer, reducing its reliability. Moreover, even if it is used in a laminated film, the time required for deposition becomes long, which causes the same problem as above, and a new problem of a decrease in throughput arises. SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to provide a highly reliable semiconductor device with excellent moisture resistance.
〔課題を解決するための手段1
本発明の半導体装置は、半導体装置のパシベーション膜
として、窒化リン膜あるいはホスロン膜を用いたことを
特徴とする。[Means for Solving the Problems 1] The semiconductor device of the present invention is characterized in that a phosphorus nitride film or a phothrone film is used as a passivation film of the semiconductor device.
[実 施 例1
本発明の一実施例を図面に沿って説明する。第1図は本
発明の一実施例を示す主要断面図である。下地のAg配
線11103’がSi基板上絶縁膜102の上にパター
ニングされ、その上部にパシベーション膜として、窒化
リン(PxNy)IIIあるいはホスロン(PxNyO
z)膜104が形成されている。これらの膜の堆積温度
は400℃〜900℃で変太ることができる。500℃
以上ならどの温度においても膜の絶縁破壊電界はIOM
V / c m以上を有し、非常に緻密な膜となる。こ
の場合膜厚は1000Å以下でも絶縁破壊電界は10M
V/cm以上あり、CV D S i Oz IIIや
Si、N、膜より良質なため、薄膜化が可能である。膜
の堆積速度はCV D S i O*膜やS 1sN4
膜より大きいため短時間で堆積可能であり、スルーブツ
トの向上と共に下地のA2配線層にヒロックやボイドも
出にくくなる。その結果、高い信頼性を有する半導体装
置を得ることができる。[Example 1 An example of the present invention will be described along with the drawings. FIG. 1 is a main sectional view showing one embodiment of the present invention. The underlying Ag wiring 11103' is patterned on the insulating film 102 on the Si substrate, and a passivation film of phosphorus nitride (PxNy) III or phosphron (PxNyO) is formed on top of it as a passivation film.
z) A film 104 is formed. The deposition temperature of these films can vary from 400°C to 900°C. 500℃
If above, the dielectric breakdown electric field of the film at any temperature is IOM
V/cm or more, resulting in a very dense film. In this case, even if the film thickness is less than 1000 Å, the breakdown electric field is 10 M.
V/cm or more, and is of better quality than CV D Si Oz III, Si, N, and films, so it is possible to make the film thinner. The deposition rate of the film is CV D Si O * film and S 1sN4
Since it is larger than a film, it can be deposited in a short time, and as well as improving throughput, hillocks and voids are less likely to appear in the underlying A2 wiring layer. As a result, a highly reliable semiconductor device can be obtained.
堆積温度は前記の如く変えることが可能だがAfi配線
層の融点以下の温度でできるだけ低温で堆積するのが望
ましい。Although the deposition temperature can be varied as described above, it is desirable to deposit at a temperature as low as possible, below the melting point of the Afi wiring layer.
本発明の上記実施例では窒化リン膜あるいはホスロン膜
を単層膜で用いたが、第2図のようにCV D S i
Ox膜201と2層膜の構造にしても上記単層膜の物
と同等の信頼性を得る。またこの場合は、膜ストレスは
単層膜の物より小さくなり、AJ2配線層202のボイ
ドも低減され、より高信頼性な半導体装置の提供が可能
となる。2層膜にした場合のCVD5 i O2膜との
膜厚比は任意で良(、窒化リン膜またはホスロン1i2
03の方が厚い場合は、耐湿性がより向上し、その方が
薄い場合膜ストレスを低減して下地、l配線層のボイド
発生を抑制するというそれぞれの効果を有する。In the above embodiments of the present invention, a single-layer phosphorus nitride film or phosthrone film was used, but as shown in FIG.
Even with the structure of the Ox film 201 and the two-layer film, reliability equivalent to that of the single-layer film described above can be obtained. Further, in this case, the film stress is smaller than that of a single layer film, and voids in the AJ2 wiring layer 202 are also reduced, making it possible to provide a more reliable semiconductor device. In the case of a two-layer film, the film thickness ratio with the CVD5 i O2 film can be set arbitrarily.
When 03 is thicker, the moisture resistance is further improved, and when it is thinner, film stress is reduced and void generation in the underlying layer and l wiring layer is suppressed.
[発明の効果]
以上述べたように本発明によれば、半導体装置のパシベ
ーション膜として窒化リン膜あるいはホスロン膜を用い
ることにより、耐湿性が高く、下地A4配線層のボイド
の発生を低減した信頼性の高い半導体装置の提供が可能
になる。[Effects of the Invention] As described above, according to the present invention, by using a phosphorus nitride film or a phosphron film as a passivation film of a semiconductor device, it is highly moisture resistant and reliable, reducing the occurrence of voids in the underlying A4 wiring layer. This makes it possible to provide semiconductor devices with high performance.
第1図及び第2図は本発明の一実施例を示す半導体装置
の主要断面図。
101・・・シリコン基板
102・・・絶縁膜
103・・・A2配線層
104・・・窒化リン膜あるいはホスロン膜201・・
・CV D S i Os膜202・・・AI2配線層
203・・・窒化リン膜あるいはホスロン膜以上
出願人 セイコーエプソン株式会社1 and 2 are main sectional views of a semiconductor device showing an embodiment of the present invention. 101... Silicon substrate 102... Insulating film 103... A2 wiring layer 104... Phosphorus nitride film or Phosuron film 201...
・CV D Si Os film 202...AI2 wiring layer 203...Phosphorus nitride film or phothrone film Applicant: Seiko Epson Corporation
Claims (1)
るいはホスロン膜を用いたことを特徴とする半導体装置
。A semiconductor device characterized in that a phosphorus nitride film or a phothrone film is used as a passivation film of the semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11742288A JPH01287930A (en) | 1988-05-13 | 1988-05-13 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11742288A JPH01287930A (en) | 1988-05-13 | 1988-05-13 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01287930A true JPH01287930A (en) | 1989-11-20 |
Family
ID=14711253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11742288A Pending JPH01287930A (en) | 1988-05-13 | 1988-05-13 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01287930A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905298A (en) * | 1996-10-03 | 1999-05-18 | Fujitsu Limited | Semiconductor device having an insulation film of low permittivity and a fabrication process thereof |
-
1988
- 1988-05-13 JP JP11742288A patent/JPH01287930A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905298A (en) * | 1996-10-03 | 1999-05-18 | Fujitsu Limited | Semiconductor device having an insulation film of low permittivity and a fabrication process thereof |
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