JPH01291429A - Electrolytic etching of semiconductor substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to an electrolytic etching method for selectively etching a semiconductor substrate such as a silicon substrate.

B. Prior Art Conventional electrolytic etching of a semiconductor substrate is performed by immersing the semiconductor substrate, such as a silicon substrate and a counter electrode, facing each other in an electrolytic solution as an etching solution filled in an etching tank. It will be done. These silicon substrates and counter electrodes are each connected to an external power source and a voltage is applied thereto. Further, a reference electrode is provided in the electrolyte in the etching bath to detect the potential of the silicon substrate.

In such a conventional electrolytic etching method, the result of electrolytically etching a silicon substrate as a semiconductor substrate using, for example, a KOH aqueous solution as an electrolyte is 0re.
st J, Glenbocki and Robert
tE, 5tahlbush, “Bias-Depe
ndent Etching ofSilicon i
n Aqueous KOH,” J, Electr
ochem.

Reported in Soc, P., 145 Jan, 1985.

In this document, (100> direction and (111)
The relationship between applied voltage and current in N-type and P-type silicon is shown graphically. For example, (1
In N-type silicon in the 00> direction, when the voltage applied to the reference electrode is approximately −1.0 V or less, the current increases as the applied voltage increases, that is, electrolytic etching of the N-type silicon progresses, and the applied voltage decreases to approximately −1.0 V or less. 1.OV
The current shows a maximum value at , and the applied voltage is approximately -1
, 0V or more, the current drops rapidly, that is, an oxide film grows on the surface of the N-type silicon, and etching of the N-type silicon stops.

The value of the applied voltage at which the current reaches its maximum value is called the passivation potential. Similarly, for example, in P-type silicon in the <100> direction, etching of the P-type silicon progresses when the voltage applied to the reference electrode is approximately -0.8V or less, and when the applied voltage is approximately -0.8V, the current decreases. When the applied voltage reaches a maximum value of approximately -0.8 V or more, an oxide film grows on the surface of the P-type silicon, and etching of the P-type silicon stops.

Next, a conventional electrolytic etching method for selectively etching a semiconductor substrate having a P-wall region and an N-type region using the KOH aqueous solution disclosed in the above-mentioned document as an electrolyte will be described. The semiconductor substrate to be electrolytically etched at this time is, for example, a silicon substrate in which an N-type epitaxial layer is formed on a P-type substrate, a metal film is formed on this N-type epitaxial layer, and this metal film is connected to a power source. Use as a substrate. Further, at this time, the potential of the silicon substrate with respect to the reference electrode is set to -0.8V to -0.9V based on the data reported in the above literature. That is, the potential is such that etching of N-type silicon stops and etching of P-type silicon proceeds.

When the silicon substrate is electrolytically etched under such conditions, the P-type substrate is electrolytically etched first. When this P-type substrate is removed by etching, the N-type epitaxial layer is exposed, and an oxidation current flows due to anodization of the surface of this N-type epitaxial layer, but after that, the current value rapidly decreases to almost O. Become. This is because an oxide film is formed on the N-type epitaxial layer, and this oxide film serves as a mask to stop etching.

In this way, when the electrolytic etching finishes electrolytically etching a given P-type substrate and reaches the N-type epitaxial layer, the etching stops there.

In this way, conventional electrolytic etching methods selectively etch the P-wall regions of the semiconductor substrate.

C0 Problems to be Solved by the Invention However, in the conventional electrolytic etching method described above, when the current supply is stopped after electrolytic etching of a predetermined P wall region is completed, the oxide film formed on the surface of the exposed N type region is removed. It is extremely thin, with a thickness of less than 30 Å, and is porous, so it is quickly removed by electrolyte.
There is a problem in that the etching of the N-type region proceeds again during the time from when the current supply is stopped until the semiconductor substrate is taken out from the electrolytic solution.

The present invention has been made in view of these conventional problems, and provides a semiconductor substrate that prevents etching of a second conductivity type region from proceeding after electrolytic etching of a first conductivity type region is completed. An object of the present invention is to provide an electrolytic etching method.

Means for Solving the D0 Problem The present invention involves immersing a semiconductor substrate having two regions of opposite conductivity types together with a counter electrode in an electrolytic solution, and applying a predetermined voltage between the counter electrode and the semiconductor substrate. This method is applied to a method of etching either one of the conductive regions.

The above-mentioned problem is that when a first voltage is applied to etch one of the regions, the etching of one region exposes the other region, and then a second voltage is applied to the exposed region. The problem is solved by anodizing the surface of the

86 action The first voltage is applied until the surface of one conductivity type region is exposed to etch the other conductivity type region. Once one conductivity type region is exposed, a second voltage is applied to anodize the exposed surface of the one conductivity type region. The formation of the oxide film prevents the progress of etching on one of the exposed regions until the semiconductor substrate is taken out of the electrolytic solution and washed with water after etching.

F. Examples Hereinafter, the method for electrolytically etching a semiconductor substrate according to the present invention will be described in detail based on examples illustrating the method.

FIG. 1 shows a first electrolytic etching apparatus used in an electrolytic etching method according to an embodiment of the present invention.

In FIG. 1, an etching tank 1 is filled with saturated hydrazine 2 as an etching solution.

A semiconductor substrate such as a silicon substrate 3 and a counter electrode 4 are immersed in the saturated hydrazine 2 so as to face each other. These silicon substrate 3 and counter electrode 4 are
Each is connected to an external power source 5 and voltage is applied thereto.

Further, in order to detect the potential of the silicon substrate 3, a silver-silver chloride (Ag/AgC1) electrode 6 is provided as a reference electrode in the saturated hydrazine 2 in the etching bath 1, and is connected to a power source 5. Note that this power source 5 is provided with a variable mechanism that changes the applied voltage as necessary.

Next, FIG. 2 shows an electrolytic emitter according to an embodiment of the present invention.
- This second electrolytic etching apparatus is a second electrolytic etching apparatus used in the etching method, in addition to each structure of the first electrolytic etching apparatus shown in FIG. A current detector 7 is provided between the silicon substrate 3 and the power supply 5 in order to monitor the current flowing between the silicon substrate 3 and the power supply 5. Further, a controller 8 for controlling the output voltage value of the power source 5 is connected to the power source 5.

Note that this power source 5 includes a potentiostat for maintaining the potential difference between the silicon substrate 3 and the silver-silver chloride electrode 6 at a predetermined value. In this way, the current detector 7
By providing the controller 8, the second electrolytic etching apparatus can continuously perform a series of operations for electrolytically etching the semiconductor substrate.

Next, FIG. 3 shows a silicon substrate 3 that is electrolytically etched in either the first or second electrolytic etching apparatus.
The relationship between potential and current and the relationship between potential and etching rate are shown in graphs. In FIG. 3, a silicon substrate 3
is an N-type silicon substrate, N with respect to the silver-silver chloride electrode 6
In a range where the potential of the silicon substrate is approximately −1.0 V or less, the current increases as the potential increases. When the potential of the N-type silicon substrate becomes approximately -1, Ov, the current shows a maximum value, and the potential of the N-type silicon substrate becomes approximately -1.0V.
When the voltage exceeds 1,000 volts, the current decreases rapidly and becomes almost 0 near -0,8 volts. That is, the passivation potential of N-type silicon is approximately -1.OV.

The etching rate also changes depending on the relationship between the potential and current of the N-type silicon substrate.

In other words, the potential of the N-type silicon substrate is approximately -0.9V.
In the following range, the etching rate increases as the potential increases, and etching of the N-type silicon substrate progresses. When the potential of the N-type silicon substrate becomes approximately -0.0V or higher, the etching rate rapidly decreases, and the etching of the N-type silicon substrate stops when the current value reaches 0, around -0.8V. This is because when the passivation potential of N-type silicon reaches approximately -1.0V or higher, an oxide film begins to grow on the surface of the N-type silicon substrate, impeding the progress of electrolytic etching. This is because the etching speed becomes so fast that the etching finally comes to a halt.

Similarly, when the silicon substrate 3 is a P-type silicon substrate, the potential of the P-type silicon with respect to the silver-silver chloride electrode 6 is approximately -0.75V or less.

As the potential increases, the current also increases. When the potential of the P-type silicon substrate reaches approximately 10.75V, the current reaches its maximum value, and the potential of the P-type silicon substrate reaches approximately -0.75V.
When the voltage exceeds 75V, the current decreases rapidly and reaches approximately 0 around -0, 5V.

That is, the passivation potential of P-type silicon is approximately -0.75V.

Similarly, the etching rate also changes depending on the relationship between the potential of the P-type silicon substrate and the current. That is, when the potential of the P-type silicon substrate is approximately -1.0 V or less, the etching speed increases as the potential increases, and the etching of the P-type silicon substrate progresses. When the potential of the P-type silicon substrate becomes approximately -1.0 V or more, the etching speed decreases rapidly, and the etching of the P-type silicon substrate stops when the current value reaches 0, around 10.5 V.

This is approximately - which is the passivation potential of P-type silicon.
This is because when the voltage exceeds 0.75 V, an oxide film begins to grow on the surface of the P-type silicon substrate, impeding the progress of electrolytic etching, and the growth of this oxide film becomes faster as the potential becomes higher, until etching is finally stopped.

Next, the manner in which the silicon substrate 3 is electrolytically etched will be explained using FIG. The silicon substrate 3 to be electrolytically etched has an N-type epitaxial layer 10 formed on a P-type substrate 9, as shown in FIG. 4(a).
A metal film 11 is formed on the mold epitaxial layer 10. Further, on the back surface of the P-type substrate 9, a silicon oxide film 12 is formed which is patterned into a predetermined shape.

Using either the first or second electrolytic etching apparatus, the metal film 11 of the silicon substrate 3 shown in FIG. 4(a) is etched.
is connected to the power source 5 to perform electrolytic etching. At this time, the potential of the silicon substrate 3 with respect to the silver-silver chloride electrode 6 is:
Based on the data shown in Figure 3, -0,75V~-
It is set to a predetermined value in the range of 1, Ov, for example -0,9v. That is, the potential is such that etching of N-type silicon stops and etching of P-type silicon proceeds. Under these conditions, when the silicon substrate 3 is electrolytically etched by maintaining the set potential while monitoring the current value, as shown in FIG. 4(b), the patterned silicon oxide film 12 is used as a mask. The P-type substrate 9 is selectively etched, and the etching stops when the N-type epitaxial layer 10 is reached.

Next, FIG. 5 is a graph showing temporal changes in current value during selective etching of the P-type substrate 9. As shown in FIG. In FIG. 5, the current, which had been kept at a substantially constant value since the etching of the P-type substrate 9 was started, suddenly increased at a certain point, and then rapidly decreased again to almost zero. This sudden increase in current at a certain point is caused by the fact that the P-type substrate 9 is etched away and the N-type epitaxial layer 10 is exposed, and the oxidation current accompanying the anodic oxidation of the surface of the exposed N-type epitaxial layer 10 flows. This is because of this. The subsequent rapid decrease in current is due to the formation of an oxide film on the surface of the N-type epitaxial layer 10 due to the oxidation current. This oxide film serves as a mask, and the etching that reaches the surface of the N-type epitaxial layer 10 is stopped there.

However, if the current is turned off in this state, as mentioned above, the oxide film formed on the surface of the exposed N-type epitaxial layer 10 is very thin, less than 30 Å thick, and porous, so it is quickly absorbed by the electrolyte. After removal, etching of the N-type epitaxial layer 10 begins again.

Therefore, without stopping the power supply here, the silicon substrate 3
The potential is maintained at a potential higher than the passivation potential, and an oxide film is actively formed by anodic oxidation.

Next, FIG. 6 is a graph showing the relationship between the thickness of the oxide film formed by such anodic oxidation and the potential of the silicon substrate. In FIG. 6, as the potential of the silicon substrate increases, the thickness of the oxide film formed over a certain period of time becomes thicker. Now, for example, +4. Give Ov electric & 1o
After a minute of anodization, an oxide layer of approximately 50 mL is formed on the N-type epitaxial layer 10. On the other hand, the etching rate of this anodized oxide film with saturated hydrazine 2 is 2 to 10 people/min at a liquid temperature of 90°C, so after stopping the electricity supply, the film was left immersed in saturated hydrazine 2. However, there is a margin of approximately 5 minutes until the oxide film on the N-type epitaxial layer 10 is completely removed. Therefore, even if there is a time delay due to equipment constraints after etching is stopped and before post-processing such as washing with water is started, the N-type epitaxial layer 10 will not be etched.

Note that when performing electrolytic etching using the second electrolytic etching apparatus shown in FIG. 2, the time change in the current value shown in FIG. When the etching is completed and the current value becomes approximately O, the controller 8 controls the power supply 5 to set the potential of the silicon substrate 3 relative to the silver-silver chloride electrode 6 to, for example, +4. Ov
Set it to . In this way, a series of electrolytic etching operations can be performed continuously.

In this way, in the electrolytic etching of the silicon substrate 3, after the etching of the P-required region is completed, the silicon substrate 3 is continuously maintained at a potential higher than the passivation potential, and an oxide film is formed by anodic oxidation on the N-type region. By forming
Etching in the N-type region can be prevented from proceeding even if the device is left in a non-energized state during post-processing after etching.

Therefore, selective electrolytic etching of the silicon substrate 3 can be performed without impairing processing accuracy.

The present invention can also be applied to the case where an anodic oxide film is formed on the surface of the P-required region when etching the N-type region.

G1 Effects of the Invention As described above, according to the present invention, in electrolytic etching of a semiconductor substrate, after a predetermined selective etching is completed,
Good processing accuracy is achieved by continuously maintaining the semiconductor substrate at a potential higher than the passivation potential and forming an insulating film on the semiconductor substrate by anodic oxidation to prevent etching of the semiconductor substrate from proceeding beyond a predetermined level. can be obtained.

[Brief explanation of the drawing]

1 and 2 are schematic configuration diagrams showing an electrolytic etching apparatus used in an electrolytic etching method according to an embodiment of the present invention, and FIGS. 3 to 6 respectively show an electrolytic etching apparatus according to an embodiment of the present invention. FIG. 3 is a diagram for explaining the method. 1: Etching tank 2: Saturated hydrazine 3: Silicon substrate 4: Counter electrode 5: Electrode 6: Silver-silver chloride electrode 7: Current detector 8: Controller 9: P-type substrate 10: N-type epitaxial layer 11: Metal film 12 :Silicon oxide film patent applicant Nissan Motor Co., Ltd.

Claims (1)

[Scope of Claims] 1) A semiconductor substrate having two regions of opposite conductivity type is immersed together with a counter electrode in an electrolytic solution, and a predetermined voltage is applied between the counter electrode and the semiconductor substrate to form one of the two regions. When etching the conductive regions of , a first voltage is applied to etch one of the regions, and after the etching of one region exposes the other region, a second voltage is applied to expose the other region. A method for electrolytically etching a semiconductor substrate, comprising anodizing the surface of the region.