JPH0139301B2 - - Google Patents

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Publication number
JPH0139301B2
JPH0139301B2 JP15346782A JP15346782A JPH0139301B2 JP H0139301 B2 JPH0139301 B2 JP H0139301B2 JP 15346782 A JP15346782 A JP 15346782A JP 15346782 A JP15346782 A JP 15346782A JP H0139301 B2 JPH0139301 B2 JP H0139301B2
Authority
JP
Japan
Prior art keywords
phase
voltage
ground fault
zero
voltages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15346782A
Other languages
Japanese (ja)
Other versions
JPS5944927A (en
Inventor
Koichi Endo
Naoki Masuda
Hiroaki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Tokyo Electric Power Co Holdings Inc
Original Assignee
Tokyo Electric Power Co Inc
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Power Co Inc, Mitsubishi Electric Corp filed Critical Tokyo Electric Power Co Inc
Priority to JP15346782A priority Critical patent/JPS5944927A/en
Publication of JPS5944927A publication Critical patent/JPS5944927A/en
Publication of JPH0139301B2 publication Critical patent/JPH0139301B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 この発明は、非接地系の配電線における地絡相
を検出する装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for detecting a ground fault phase in an ungrounded power distribution line.

従来、この種の装置として第1図に示すものが
あつた。図中1a,1b,1cは3相平衡の電
源、2a,2b,2cは電圧ea,eb,ecを有する
電源1a,1b,1cに接続されたa,b,c相
の配電線、3a,3b,3cは配電線2a,2
b,2cと大地間に存在する静電容量、4は抵抗
Rgと共に接地事故の発生を等価的に示すスイツ
チ、5a,5b,5cはコンデンサよりなり、配
電線2a,2b,2cの電圧を分圧する分圧器、
6a,6b,6cは分圧器5a,5b,5cの電
圧va,vb,vcの2電圧につき加算をする加算器、
7は電源1a,1b,1cの中性点を接地する抵
抗値RMの抵抗である。
Conventionally, there has been a device of this type as shown in FIG. In the figure, 1a, 1b, 1c are three-phase balanced power supplies, and 2a, 2b, 2c are a, b , c -phase distribution lines connected to power supplies 1a, 1b, 1c with voltages e a , e b , e c. , 3a, 3b, 3c are distribution lines 2a, 2
Capacitance existing between b, 2c and the ground, 4 is resistance
Switches 5a, 5b, and 5c that equivalently indicate the occurrence of a grounding fault along with Rg are capacitors, and voltage dividers that divide the voltages of the distribution lines 2a, 2b, and 2c;
6a, 6b, 6c are adders that add the two voltages v a , v b , v c of the voltage dividers 5 a, 5 b, 5 c;
7 is a resistor with a resistance value R M that grounds the neutral points of the power supplies 1a, 1b, and 1c.

次に動作について説明する。分圧器5a,5
b,5cの電圧va,vb,vcは加算器6a,6b,6c
に対で入力され、これらの出力端には次式のよう
な電圧v1,v2,v3が発生する。
Next, the operation will be explained. Voltage divider 5a, 5
The voltages v a , v b , v c of b, 5 c are applied to the adders 6 a , 6 b , 6 c
are input in pairs, and voltages v 1 , v 2 , and v 3 as shown in the following equations are generated at their output terminals.

v1=va+vb/2、v2=vb+vc/2、 v3=vc+va/2 スイツチ1が投入され、a相の配電線2aが、
地絡すると、静電容量3a,3b,3c及び抵抗
Rgの値が変化して、第2図のベクトル図で示す
ように、ベクトルの中心0が円8に沿つて0′に移
動し、事故相の電圧v1は、電圧v2,v3より小さく
なり、|v1|<|ea|<|v2|又は|v3|となる。
この関係は、図示なしの論理回路により検出さ
れ、事故ありに対応される。
v 1 = v a + v b /2, v 2 = v b + v c /2, v 3 = v c + v a /2 Switch 1 is turned on, and the a-phase distribution line 2a is
When a ground fault occurs, the capacitance 3a, 3b, 3c and resistance
As the value of Rg changes, the center of the vector moves to 0' along the circle 8, as shown in the vector diagram in Figure 2, and the voltage v 1 of the fault phase becomes smaller than the voltages v 2 and v 3 . becomes smaller, and becomes |v 1 |<|e a |<|v 2 | or |v 3 |.
This relationship is detected by a logic circuit (not shown), and a response is taken if an accident occurs.

従来の地絡相検出装置は、以上述べたように事
故発生前後において各相の対地電圧の絶対値が変
化するのを検出し、それらの間の大小関係から地
絡相を判定していた。しかし、事故時に配電線が
有する静電容量及び地絡抵抗が共に大きい場合は
健全時のものとの差が顕著なものとならず、検出
の精度が低下する。検出感度を高めるためには、
分圧器の分圧比及び加算器の動作が高度に安定し
ていることが必要である。例えこのような安定化
が達成できたとしても接続部分に接触不良等によ
り欠相が生じていることまで判別はできない。
As described above, the conventional ground fault phase detection device detects changes in the absolute value of the ground voltage of each phase before and after an accident occurs, and determines a ground fault phase from the magnitude relationship between them. However, if both the capacitance and the ground fault resistance of the power distribution line are large at the time of an accident, the difference between the line and the line when it is healthy is not significant, and the detection accuracy decreases. To increase detection sensitivity,
It is necessary that the voltage divider ratio and the operation of the adder be highly stable. Even if such stabilization could be achieved, it would not be possible to determine that an open phase has occurred due to poor contact or the like in the connected portion.

この発明は、上記のような従来のものの欠点を
除去するためになされたもので、地絡による事故
電流の比例して発生する零相電圧を検出し、この
零相電圧と交流系統の各相の電圧に基づく信号と
の論理積をとり、更に積分し、最後に基準電圧と
比較することにより、地絡相を判別できる地絡相
検出装置を提供することを目的とする。
This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it detects the zero-sequence voltage generated in proportion to the fault current due to a ground fault, and compares this zero-sequence voltage with each phase of the AC system. It is an object of the present invention to provide a ground fault phase detection device that can discriminate a ground fault phase by performing a logical product with a signal based on the voltage of , further integrating, and finally comparing with a reference voltage.

以下、この発明の一実施例を図について説明す
る。第3図はこの発明の地絡相検出装置のブロツ
ク図である。図中、9は配電線2a,2b,2c
にコンデンサ9a,9b,9cの一端を接続し、
他端をコンデンサ9dを介して接地し、コンデン
サ9a〜9dの接続点より零相の電圧v0を得る分
圧器(零相電圧検出器)、10は配電線2a,2
b,2cにデルタ接続された巻線10aと、星形
に接続され、電圧ea,eb,ecより角度α0だけ進相
の参照電圧である電圧ua0,ub0,uc0を発生する巻
線10bとを有し、移相器の機能をもつ変圧器
(参照電圧発生器)、11a,11b,11cは変
圧器10の電圧ua0,ub0,uc0を角度α1がけ移相し
た電圧ua1,ub1,uc1を発生する移相回路、12
a,12b,12cは電圧ua0,ub0,uc0を角度α2
だけ移相した電圧ua2,ub2,uc2を発生する移相回
路、13a〜13fは電圧v0と電圧ua1,ub1
uc1,ua2,ub2,uc2との積をとり信号wa1,wb1
wc1,wa2,wb2,wc2を発生する掛算器、14a
〜14fは掛算器13a〜13fの信号wa1
wc1,wa2〜wc2を積分して信号Wa1,Wb1,Wc1
Wa2,Wb2,Wc2を発生する積分器、15a〜1
5fは積分器14a〜14fの信号Wa1〜Wc1
Wa2〜Wc2が基準電圧−Wtとなつたときに地絡を
示す信号a〜c,a′〜c′を出力する比較器であ
る。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram of the ground fault phase detection device of the present invention. In the figure, 9 is the distribution line 2a, 2b, 2c
Connect one end of capacitors 9a, 9b, 9c to
A voltage divider (zero-phase voltage detector) whose other end is grounded via a capacitor 9d and obtains a zero-phase voltage v 0 from the connection point of the capacitors 9a to 9d, 10 is a power distribution line 2a, 2
The windings 10a are connected in delta to windings 10a and 2c, and the voltages u a0 , u b0 , u c0 are connected in a star pattern and are reference voltages leading by an angle α 0 than the voltages e a , e b , e c . A transformer (reference voltage generator) having a winding 10b and a function of a phase shifter, 11a, 11b, and 11c are voltages u a0 , u b0 , u c0 of the transformer 10 multiplied by an angle α 1. Phase shift circuit that generates phase shifted voltages u a1 , u b1 , u c1 12
a, 12b, 12c are voltages u a0 , u b0 , u c0 at angle α 2
The phase shift circuits 13a to 13f generate voltages u a2 , u b2 , u c2 phase-shifted by the voltage v 0 and the voltages u a1 , u b1 ,
Take the product of u c1 , u a2 , u b2 , u c2 and get the signals w a1 , w b1 ,
Multiplier for generating w c1 , w a2 , w b2 , w c2 14a
~14f is the signal w a1 of the multipliers 13a~13f ~
By integrating w c1 , w a2 ~ w c2 , the signals W a1 , W b1 , W c1 ,
Integrators that generate W a2 , W b2 , W c2 , 15a-1
5f is the signal W a1 to W c1 of the integrators 14a to 14f,
This comparator outputs signals a to c and a' to c' indicating a ground fault when W a2 to W c2 reach the reference voltage -W t .

次にこの発明の動作について説明する。電源1
a,1b,1cの電圧ea,eb,ecは次式で表示さ
れる。
Next, the operation of this invention will be explained. Power supply 1
The voltages e a , e b , and e c of a, 1 b , and 1 c are expressed by the following equations.

従つて、これらを角度α0だけ移相した変圧器1
0の電圧ua0,ub0,uc0は次式のようになる。
Therefore, transformer 1 whose phase is shifted by angle α 0
The zero voltages u a0 , u b0 , and u c0 are expressed as follows.

電圧ua0〜uc0は、線間電圧に関係しているの
で、スイツチ4の投入で示すようなa相のみ、非
衡接地の事故点が発生しても変化がない。従つ
て、電圧ua0〜uc0、を用い、電圧ea,eb,ecより
角度α1だけ遅れた位相の電圧ua1,ub1,uc1は次の
ようになる。
Since the voltages u a0 to u c0 are related to the line voltage, there is no change even if an unbalanced ground fault point occurs only in the a phase as shown by turning on the switch 4. Therefore, using the voltages u a0 to u c0 , the voltages u a1 , u b1 , u c1 having a phase delayed by the angle α 1 from the voltages e a , e b , e c are as follows.

同様にして電圧ea,eb,ecより角度α2だけ遅れ
た電圧ua2,ub2,uc2は次式のようになる。
Similarly, the voltages u a2 , u b2 , u c2 that are delayed by the angle α 2 from the voltages e a , e b , e c are given by the following equations.

これらの電圧ua2〜uc2も線間電圧として関連し
ているため、地絡事故が発生しても変化しない。
a相で抵抗Rgの地絡事故が発生すると、この3
相回路の中性点の電位が変動し、零相の電圧v0
分圧器9の出力端に現われる。電圧v0は、静電容
量C0、抵抗RNと次式のような関係にある。
Since these voltages u a2 to u c2 are also related as line voltages, they do not change even if a ground fault occurs.
If a ground fault occurs in resistor Rg on phase a, these three
The potential at the neutral point of the phase circuit changes, and a zero-sequence voltage v 0 appears at the output of the voltage divider 9. The voltage v 0 has a relationship with the capacitance C 0 and the resistance R N as shown in the following equation.

v0=−V0・sin(ωt−θ) ただし、 第4図は、地絡事故のa相に関係する電圧la,
ua0,ua1及びua2のベクトル関係を示すベクトル図
である。抵抗Rgの値が変化すると、電圧v0は円
8の上を移動する。
v 0 = −V 0・sin(ωt−θ) However, Figure 4 shows the voltages la,
FIG. 2 is a vector diagram showing the vector relationship among u a0 , u a1 and u a2 . When the value of the resistance R g changes, the voltage v 0 moves on the circle 8.

電圧v0,ua1,ub1,uc1,ua2,ub2,uc2を入力し
た掛算器13a〜13fは、次式で表わす信号
wa1,wb1,wc1,wa2,wb2,wc2を出力する。
The multipliers 13a to 13f to which the voltages v 0 , u a1 , u b1 , u c1 , u a2 , u b2 , and u c2 are input, generate a signal expressed by the following equation.
Output w a1 , w b1 , w c1 , w a2 , w b2 , w c2 .

wa1=v0・ua1=−1/2V0・E{cos(θ−α1
)−cos(2ωt−θ−α1)} wb1=v0・ub1=−1/2V0・E{cos(θ−α1
−2/3π)−cos(2ωt−θ−α1−2/3π)} wc1=v0・uc1=−1/2V・E{cos(θ−α1
−4/3π)−cos(2ωt−θ−α1−4/3π)} 上式において、右辺第1項は直流分であり、第
2項は電源eaの2倍の周波数で変化する交流分で
ある。しかし、事故相に関する情報は直流分に含
まれており、第2項の交流分は事故相を判定する
ためには消去されるべきである。
w a1 =v 0・u a1 =−1/2V 0・E{cos(θ−α 1
)−cos(2ωt−θ−α 1 )} w b1 =v 0・u b1 =−1/2V 0・E{cos(θ−α 1
−2/3π)−cos(2ωt−θ−α 1 −2/3π)} w c1 =v 0・u c1 =−1/2V・E{cos(θ−α 1
−4/3π)−cos(2ωt−θ−α 1 −4/3π)} In the above equation, the first term on the right side is the DC component, and the second term is the AC component that changes at twice the frequency of the power source e a . However, information regarding the fault phase is included in the DC component, and the AC component in the second term should be deleted in order to determine the fault phase.

第4図のベクトル図から明らかなように、a相
で地絡が生じた場合、電圧v0のベクトルの足が円
8の上に来るので、角度α1,α2を0゜〜90゜の間の
適当な値に選んでおけば、電圧v0とua1(ua2)と
はほぼ反対向きとなり、信号wa1,wa2の直流分
は負となり、地絡相でない信号wb1,wc1,wb2
wc2の直流分は正又は小さな負の値となる。
As is clear from the vector diagram in Figure 4, if a ground fault occurs in phase a, the foot of the vector of voltage v 0 will be on circle 8, so the angles α 1 and α 2 can be changed from 0° to 90°. If an appropriate value is selected between them, the voltages v 0 and u a1 (u a2 ) will be in almost opposite directions, the DC components of the signals w a1 and w a2 will be negative, and the signals w b1 , which are not ground fault phases will be negative. w c1 , w b2 ,
The DC component of w c2 is a positive or small negative value.

積分器14a〜14fは、このような信号
wa1,wb1,wc1,wa2,wb2,wc2を次式のように
積分して信号wa1,wb1,wc1,wa2,wb2,wc2
得る。
Integrators 14a to 14f handle such signals.
Signals w a1 , w b1 , w c1 , w a2 , w b2 , w c2 are obtained by integrating w a1 , w b1 , w c1 , w a2 , w b2 , w c2 as shown in the following equation.

なお、t=tgは事故が発生した時刻とする。 Note that t=t g is the time when the accident occurred.

Wa1=∫t tgwa1dt=−1/2V0・E〔cos(θ−α1)(
t−tg)−1/2ω{sin2ωt−θ−α1)−sin(2ωtg
−θ−α1)}〕 Wb1=∫t tgwb1dt=−1/2V0・E〔cos(θ−α
1−2/3π)(t−tg) −1/2ω{sin(2ωt−θ−α1−2/3π)−s
in(ωtg−θ−α1−2/3π)}〕 Wc1=∫t tgwa1dt=−1/2V0・E〔cos(θ−α
1−4/3π)(t−tg) −1/2ω{sin(2ωt−θ−α1−4/3π)−s
in(ωtg−θ−α1−4/3π)}〕 Wa2=∫t tgwa2dt=−1/2V0・E〔cos(θ−α
2)(t−tg) −1/2ω{sin(2ωt−θ−α2)−sin(2ωtg
−θ−α2)}〕 Wb2=∫t tgwb2dt=−1/2V0・E〔cos(θ−α
2−2/3π)(t−tg) −1/2ω{sin(2ωt−θ−α2−2/3π)−s
in(2ωtg−θ−α2−2/3π)}〕 Wc2=∫t tgwc2dt=−1/2V0・E〔cos(θ−α
2−4/3π)(t−tg) −1/2ω{sin(2ωt−θ−α2−4/3π)−s
in(2ωtg−θ−α2−4/3π)}〕 上式において、信号Wa1,Wa2は事故相のもの
であり、2ωで振動しながら負の方向に増加する
が、その傾きは信号wa1,wa2の直立分によつて
決まる。従つて、信号Wa1,Wa2間の傾きの差は
cos(θ−α1)とcos(θ−α2)によつて決まる。い
ま、第4図に示すように、角度α1,α2を選んでお
いて、地絡事故により発生する電圧v0のベクトル
の足が、 |θ−α1|>|θ−α2| となる位置に来ると、 cos(θ−α1)<cos(θ−α2) となり、信号Wa2が信号Wa1より急速に負の方向
へ増加する。
W a1 =∫ t tg w a1 dt=-1/2V 0・E [cos(θ−α 1 )(
t-tg)-1/2ω{sin2ωt-θ-α 1 )-sin(2ωt g
−θ−α 1 )}] W b1 =∫ t tg w b1 dt=−1/2V 0・E[cos(θ−α
1 −2/3π) (t−tg) −1/2ω{sin(2ωt−θ−α 1 −2/3π)−s
in(ωt g −θ−α 1 −2/3π)}] W c1 =∫ t tg w a1 dt=−1/2V 0・E[cos(θ−α
1 −4/3π) (t−tg) −1/2ω{sin(2ωt−θ−α 1 −4/3π)−s
in(ωt g −θ−α 1 −4/3π)}] W a2 =∫ t tg w a2 dt=−1/2V 0・E[cos(θ−α
2 ) (t−tg) −1/2ω{sin(2ωt−θ−α 2 )−sin(2ωt g
−θ−α 2 )}] W b2 =∫ t tg w b2 dt=−1/2V 0・E[cos(θ−α
2 −2/3π) (t−tg) −1/2ω{sin(2ωt−θ−α 2 −2/3π)−s
in(2ωt g −θ−α 2 −2/3π)}] W c2 =∫ t tg w c2 dt=−1/2V 0・E[cos(θ−α
2 −4/3π) (t−tg) −1/2ω{sin(2ωt−θ−α 2 −4/3π)−s
in(2ωt g −θ−α 2 −4/3π)}] In the above equation, the signals W a1 and W a2 are from the accident phase and increase in the negative direction while oscillating at 2ω, but the slope is It is determined by the vertical components of the signals w a1 and w a2 . Therefore, the difference in slope between signals W a1 and W a2 is
It is determined by cos(θ−α 1 ) and cos(θ−α 2 ). Now, as shown in Fig. 4, by selecting angles α 1 and α 2 , the foot of the vector of voltage v 0 caused by a ground fault is |θ−α 1 |>|θ−α 2 | When reaching the position where , cos(θ−α 1 )<cos(θ−α 2 ), the signal W a2 increases more rapidly in the negative direction than the signal W a1 .

第5図は地絡事故がが発生した時刻tg前後にお
ける信号Wa1〜Wc1,Wa2〜Wc2の波形図である。
図中のように、事故相に関連する信号Wa1,Wa2
が基準電圧−Wtを超え、負方向へ増加して行く
のに対し、事故のない相の信号Wb1,Wb2,Wc1
Wc2は正方向へ増加又はほとんど変化しない。
FIG. 5 is a waveform diagram of the signals W a1 to W c1 and W a2 to W c2 before and after the time t g when the ground fault occurred.
As shown in the figure, signals W a1 and W a2 related to the accident phase
exceeds the reference voltage −Wt and increases in the negative direction, whereas the signals W b1 , W b2 , W c1 , of the phases without faults
W c2 increases in the positive direction or hardly changes.

従つて、比較器15a〜15fは、信号Wa1
Wc1,Wa2〜Wc2が基準値−Wt以下となると、地
絡したことを示す信号a〜c,a′〜c′を出力す
る。この場合、地絡相はa相なので、信号a,
a′が出力される。
Therefore, the comparators 15a to 15f output the signals W a1 to
When W c1 , W a2 to W c2 become less than the reference value -W t , signals a to c and a' to c' indicating that a ground fault has occurred are output. In this case, the ground fault phase is the a phase, so the signals a,
a′ is output.

なお、上記実施例では、参照電圧の遅れ角がα1
とα2の2個の場合であるが、それより多くする
と、零相電圧のベクトルの足は、|θ−αi|、(i
=1、2、…n)がより小さい値となるような位
置に来るため、検出時間を更に速くすることがで
きる。
Note that in the above embodiment, the delay angle of the reference voltage is α 1
and α 2 , but if there are more than that, the legs of the zero-sequence voltage vector become |θ−α i |, (i
=1, 2, .

また、上記実施例では積分器14a〜14fが
完全な時間積分を行なう場合を説明したが。掛算
器13a〜13fの演算精度などが原因で、少し
でも直流分があれば、これが蓄積する。このため
積分器14a〜14fの特性を適当な時定数をも
つ積分、即ち一次遅れ要素の伝達関数1/1+STと なるようにすることが必要となる。この積分の時
定数Tは検出すべき地絡事故の現象に比較して長
くしておけば上記実施例と同様な効果を奏する。
Further, in the above embodiment, a case has been described in which the integrators 14a to 14f perform complete time integration. Due to the calculation precision of the multipliers 13a to 13f, if there is even a small amount of direct current, this will accumulate. For this reason, it is necessary to set the characteristics of the integrators 14a to 14f so that the integration has an appropriate time constant, that is, the transfer function of the first-order lag element is 1/1+ST. If the time constant T of this integration is made longer than the ground fault phenomenon to be detected, the same effect as in the above embodiment can be obtained.

また、上記実施例では電圧ua1,ub1,uc1,ua2
ub2,uc2を正弦波として用いたが、これらを波形
変換回路により正弦波と同位相で振幅一定の矩形
波に波形変換しても上記実施例と同様の効果を奏
する。このような場合の動作の波形を第6図及び
第7図に示す。第6図において、aは電圧、ea
bは電圧ua1の矩形波信号、cは電圧ua2の矩形波
信号、dは零相の電圧v0、eは電圧v0,ua1の積
の信号wa1、fは電圧v0,ua2の積の信号wa2を示
す。
In addition, in the above embodiment, the voltages u a1 , u b1 , u c1 , u a2 ,
Although u b2 and u c2 are used as sine waves, the same effect as in the above embodiment can be obtained even if these are converted into rectangular waves having the same phase and constant amplitude as the sine wave using a waveform conversion circuit. The waveforms of the operation in such a case are shown in FIGS. 6 and 7. In Figure 6, a is the voltage, e a ,
b is a rectangular wave signal of voltage u a1 , c is a rectangular wave signal of voltage u a2 , d is zero-phase voltage v 0 , e is signal w a1 of the product of voltage v 0 and u a1 , f is voltage v 0 , Indicates the signal w a2 of the product of u a2 .

第7図は、第6図に示す信号wa1を積分した信
号wa1及び第7図に示す信号wa2を積分した信号
wa2の波形図である。信号Wa1,Wa2は第5図の
ものに比較して振動成分が多いが、基準値−Wt
との比較により事故相の判定が上記実施例と同じ
ようにできる。
Fig. 7 shows a signal w a1 which is obtained by integrating the signal w a1 shown in Fig. 6, and a signal which is obtained by integrating the signal w a2 shown in Fig. 7.
It is a waveform diagram of w a2 . The signals W a1 and W a2 have more vibration components than those in Fig. 5, but the reference value −W t
The accident phase can be determined in the same manner as in the above embodiment by comparing with the above.

また、上記実施例では、零相電圧を正弦波とし
たが、電圧v0,v0′を一定振幅の矩形波に成形し
て掛算器に入力しても上記実施例と同様の効果を
奏する。
Further, in the above embodiment, the zero-phase voltage is a sine wave, but the same effect as in the above embodiment can be obtained even if the voltages v 0 and v 0 ' are shaped into a rectangular wave of constant amplitude and input to the multiplier. .

また、零相電圧の検出感度を上げて地絡相の検
出を行なつた場合、演算回路のダイナミツク・レ
ンジの制約から零相電圧の信号に飽和が生じるこ
とがあるが、零相電圧の位相の情報は保持される
ので、地絡相の検出は可能である。
Additionally, when detecting a ground fault phase by increasing the detection sensitivity of the zero-sequence voltage, saturation may occur in the zero-sequence voltage signal due to the dynamic range constraints of the arithmetic circuit. Since this information is retained, it is possible to detect a ground fault phase.

上記実施例では系統のわずかな不平衡とか検出
器の不平衡などにより、正常時にもわずかに生じ
る零相電圧による誤動作を防ぐため、積分回路に
時定数をもたせている。従つて、不平衡が原因で
生じるわずかな直流分が積分器で積分されること
はないが、この直流分により積分器の出力が地絡
発生以前からそれぞれ値の異なる直流のベースを
有するので、これが閾値による地絡相検出に悪影
響を与える。
In the embodiment described above, the integrating circuit is provided with a time constant in order to prevent malfunctions caused by zero-sequence voltages that slightly occur even in normal conditions due to slight unbalance of the system or unbalance of the detector. Therefore, the slight DC component caused by unbalance is not integrated by the integrator, but because of this DC component, the output of the integrator has a DC base with a different value even before the ground fault occurs. This adversely affects ground fault phase detection using threshold values.

第8図は、このような悪影響を除去するため、
積分器(時定数Tの一次遅れ要素)の出力をコン
デンサCを介して取り出すようにした回路図であ
る。この場合、時定数CRの値は、積分の時定数
と同様に、予想される地絡現象及び常時の系統の
擾乱の程度を勘案して選ぶようにする。CRの回
路と積分回路の位置を前後に入れ替えても動作は
同じである。
Figure 8 shows that in order to eliminate such adverse effects,
2 is a circuit diagram in which the output of an integrator (first-order lag element with time constant T) is taken out via a capacitor C. FIG. In this case, the value of the time constant CR, like the time constant for integration, is selected in consideration of the expected ground fault phenomenon and the degree of regular system disturbance. The operation is the same even if the positions of the CR circuit and the integrating circuit are swapped back and forth.

また、上記実施例では、電圧ua0,ub0,uc0を導
出するのに、3相の移相変圧器を利用したが、容
量分圧器を利用してこれらを導出してもよい。第
9図は、このような他の実施例の回路図であり、
位相α=30゜の場合を示す。分圧器5a,5b,
5cの出力は加算器6a,6b,6cに入力さ
れ、電圧ua0,ub0,uc0を導出している。
Further, in the above embodiment, a three-phase phase shift transformer is used to derive the voltages u a0 , u b0 , and u c0 , but a capacitive voltage divider may be used to derive these. FIG. 9 is a circuit diagram of such another embodiment,
The case where the phase α=30° is shown. Voltage dividers 5a, 5b,
The output of 5c is input to adders 6a, 6b, and 6c, and voltages u a0 , u b0 , and u c0 are derived.

以上のように、この発明によれば、系統の零相
電圧の信号と、移相された系統の参照電圧との積
ととり、更に積分し、最後に基準電圧とレベルに
つき比較判定をすることにより、事故相の判別を
するようにしたので、雑音による影響を少なくす
ることができ、安定に動作する装置が得られる効
果がある。
As described above, according to the present invention, the product of the zero-sequence voltage signal of the system and the phase-shifted reference voltage of the system is taken, further integrated, and finally, the level is compared and determined with the reference voltage. Since the fault phase is determined based on the above, the influence of noise can be reduced and a device that operates stably can be obtained.

また、この発明は各相の星形相電圧より所定角
度だけ進相の参照電圧を所定位相だけ移相させて
複数の参照電圧とし、上記零相電圧との位相角が
小さいものに対応する積分量によつて事故相を検
出する構成であるから、地絡相の検出速度が事故
によつて発生する零相電圧とあらかじめ設定され
ている参照電圧との位相角に依存し、この位相角
が事故の状況(地絡抵抗、配電線の対地容量)に
よつて変わつても、事故相を安定、かつ、高速に
検出することが可能となり、大幅な性能向上が得
られるという効果がある。
Further, the present invention provides a plurality of reference voltages by shifting a reference voltage that is a predetermined angle ahead of the star-shaped phase voltage of each phase by a predetermined phase, and an integral amount corresponding to a reference voltage having a small phase angle with the zero-phase voltage. Since the fault phase is detected by Even if the current situation changes (ground fault resistance, ground capacity of the distribution line), it is possible to detect the fault phase stably and quickly, resulting in a significant performance improvement.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の地絡相検出装置の回路図、第2
図は地絡相発生時の各相及び零相電圧のベクトル
図、第3図はこの発明の一実施例による地絡相検
出装置の回路図、第4図は第3図に示す装置に入
力される電圧のベクトル図、第5図は第3図に示
す装置の動作の波形図、第6図及び第7図はこの
発明の他の実施例による地絡相検出装置の動作の
波形図、第8図及び第9図はこの発明の他の実施
例による地絡相検出装置の回路図である。 3a〜3b,9a〜9d,c……コンデンサ、
4……スイツチ、6a〜6c……加算器、9……
分圧器、10……変圧器、11a〜11c,12
a〜12c……移相回路、13a〜13f……掛
算器、14a〜14c……積分器、15a〜15
f……比較器。なお、図中、同一符号は同一部分
を示す。
Figure 1 is a circuit diagram of a conventional ground fault phase detection device, Figure 2
The figure is a vector diagram of each phase and zero-sequence voltage when a ground fault occurs, Fig. 3 is a circuit diagram of a ground fault phase detection device according to an embodiment of the present invention, and Fig. 4 is an input to the device shown in Fig. 3. 5 is a waveform diagram of the operation of the device shown in FIG. 3, FIGS. 6 and 7 are waveform diagrams of the operation of the ground fault phase detection device according to other embodiments of the present invention, 8 and 9 are circuit diagrams of a ground fault phase detection device according to another embodiment of the present invention. 3a-3b, 9a-9d, c...capacitor,
4...Switch, 6a-6c...Adder, 9...
Voltage divider, 10...Transformer, 11a to 11c, 12
a to 12c...phase shift circuit, 13a to 13f...multiplier, 14a to 14c...integrator, 15a to 15
f... Comparator. In addition, in the figures, the same reference numerals indicate the same parts.

Claims (1)

【特許請求の範囲】 1 交流系統の各相の対地電圧から零相電圧を検
出する零相電圧検出器と、前記各相の星形相電圧
より所定角度だけ進相の参照電圧を発生させる参
照電圧発生器と、前記参照電圧を所定位相だけ移
相する複数の移送回路と、前記零相電圧と前記移
送回路の出力電圧をそれぞれ掛算する複数の掛算
器と、前記換算器の出力信号を積分する複数の積
分器と、前記積分器の出力信号が所定の負の基準
電圧以下となつたときに事故の検出を示す信号を
発生する複数の比較器とを備えた地絡相検出装
置。 2 各移送回路の出力信号を一定振幅の矩形波に
変換する波形変換回路を備え、零相電圧と掛算す
べく上記矩形波を掛算器に供給するようにしたこ
とを特徴とする特許請求の範囲第1項記載の地絡
相検出装置。 3 零電圧を一定振幅の矩形波に変換する波形変
換回路を備え、移相回路の出力信号と掛算すべく
上記矩形波を掛算器に供給するようにしたことを
特徴とする特許請求の範囲第1項記載の地絡相検
出装置。 4 積分器に直流遮断用のコンデンサを直列接続
したことを特徴とする特許請求の範囲第1項乃至
第3項のいずれかに記載の地絡相検出装置。
[Scope of Claims] 1. A zero-phase voltage detector that detects a zero-phase voltage from the ground voltage of each phase of an AC system, and a reference voltage that generates a reference voltage that is advanced by a predetermined angle from the star-shaped phase voltage of each phase. a generator, a plurality of transfer circuits that shift the reference voltage by a predetermined phase, a plurality of multipliers that multiply the zero-sequence voltage and the output voltage of the transfer circuit, respectively, and an output signal of the converter that is integrated. A ground fault phase detection device comprising a plurality of integrators and a plurality of comparators that generate a signal indicating the detection of an accident when the output signal of the integrator falls below a predetermined negative reference voltage. 2. Claims characterized by comprising a waveform conversion circuit that converts the output signal of each transfer circuit into a rectangular wave of constant amplitude, and supplying the rectangular wave to a multiplier for multiplication by a zero-phase voltage. The ground fault phase detection device according to item 1. 3. Claim No. 3, comprising a waveform conversion circuit for converting zero voltage into a rectangular wave of constant amplitude, and supplying the rectangular wave to a multiplier to be multiplied by the output signal of the phase shift circuit. The ground fault phase detection device according to item 1. 4. The ground fault phase detection device according to any one of claims 1 to 3, characterized in that a DC interrupting capacitor is connected in series to the integrator.
JP15346782A 1982-09-03 1982-09-03 Ground-fault phase detector Granted JPS5944927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15346782A JPS5944927A (en) 1982-09-03 1982-09-03 Ground-fault phase detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15346782A JPS5944927A (en) 1982-09-03 1982-09-03 Ground-fault phase detector

Publications (2)

Publication Number Publication Date
JPS5944927A JPS5944927A (en) 1984-03-13
JPH0139301B2 true JPH0139301B2 (en) 1989-08-21

Family

ID=15563197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15346782A Granted JPS5944927A (en) 1982-09-03 1982-09-03 Ground-fault phase detector

Country Status (1)

Country Link
JP (1) JPS5944927A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63238908A (en) * 1987-03-27 1988-10-05 Sumitomo Metal Ind Ltd Method for piercing rolling

Also Published As

Publication number Publication date
JPS5944927A (en) 1984-03-13

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