JPH0141246B2 - - Google Patents

Info

Publication number
JPH0141246B2
JPH0141246B2 JP58076429A JP7642983A JPH0141246B2 JP H0141246 B2 JPH0141246 B2 JP H0141246B2 JP 58076429 A JP58076429 A JP 58076429A JP 7642983 A JP7642983 A JP 7642983A JP H0141246 B2 JPH0141246 B2 JP H0141246B2
Authority
JP
Japan
Prior art keywords
mask
dimension
exposure time
measuring means
dev
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58076429A
Other languages
Japanese (ja)
Other versions
JPS59201418A (en
Inventor
Hatsuo Nakamura
Chiharu Kato
Toshio Yonezawa
Kenichi Nitsuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58076429A priority Critical patent/JPS59201418A/en
Publication of JPS59201418A publication Critical patent/JPS59201418A/en
Publication of JPH0141246B2 publication Critical patent/JPH0141246B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/7055Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
    • G03F7/70558Dose control, i.e. achievement of a desired dose
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

〔発明の技術分野〕 この発明はマスク寸法の設計値からのずれ量を
現像後のフオトレジストの寸法が設計寸法に等し
くなるように露光時間を調節することにより制御
している露光装置に関する。 〔発明の技術分野〕 従来、フオトリソグラフイ工程においてはネガ
タイプフオトレジストが主に使用されている。し
かし、最近の超高集積回路化に伴ない、解像寸法
が2〜3μmのフオトリソグラフイ技術が要求され
るようになり、フオトレジストもネガタイプのも
のからポジタイプに置き換わりつつある。また、
解像寸法が微細化されるにつれてフオトマスクも
従来のエマルジヨンタイプのものから金属とその
酸化物からなるハードマスクと呼ばれるものに変
化してきている。このようにフオトマスクがハー
ドマスクに変わつていく理由は、従来のエマルジ
ヨンタイプのマスクでは解像寸法精度が良くない
ということに起因している。このように、微細パ
ターン化されるにつれ、解像寸法精度に対しても
精度の良いものが要求されてきている。現在、マ
スク精度はフオトリソグラフイ工程で使用される
もので±0.2〜±0.5μm(3σの値)程度である。ま
た、微細パターン化されるにつれて当然のことな
がら転写精度、つまりフオトマスクから半導体基
板上に塗布されたフオトレジストに転写するとき
の精度に対してもマスク自体の精度と同様に正確
なものが要求されている。 〔背景技術の問題点〕 ところが、フオトリソグラフイ工程において特
に出来上がつたマスクを使つてレジスト上にパタ
ーンを転写する工程においてはマスクの精度がそ
のままフオトレジスト上に転写されるため、どん
なに精度良く転写したとしてもマスク以上の精度
は得られない。現実にはこれよりも多少悪くな
る。ここで、フオトマスクのパターンをフオトレ
ジストに転写する場合の総合転写精度をσtptalとす
ると、 σtptal=(σnask 2+σtra 21/2 ここでσnaskはマスク精度、σtraは転写精度であ
る。 このように総合転写精度はマスク精度と転写精
度により決まるわけであるが、従来マスク精度を
良くした場合でも転写精度が悪いと総合転写精度
は悪くなるという欠点があつた。このような転写
精度を悪くする原因としてマスクアライナの照度
の変動、現像液の変動、レジスト膜厚の変動等が
ある。 〔発明の目的〕 この発明は上記の点に鑑みてなされたもので、
その目的はマスクの転写精度に影響するマスクア
ライナの照度の変動、現像液の変動、レジスト膜
厚の変動等の影響を露光時間を調節することによ
りなくして転写精度を改善し、総合転写精度を向
上させることができる露光装置を提供することに
ある。 〔発明の概要〕 マスクの転写精度に影響するマスクアライナの
照度の変動、現像液の変動、レジスト膜厚の変動
等の影響を露光時間を最適な時間に調節すること
によりなくして総合転写精度を向上させている。 〔発明の実施例〕 以下、図面を参照してこの考案の一実施例に係
る露光装置について説明する。第1図に示すよう
に、ポジタイプのフオトレジスト11をマスク1
2により露光現像する場合において、マスク12
のパターン寸法をWとし、照射エネルギーをEi
すると、フオトレジスト11に転写されたパター
ンの寸法とマスク12のパターン寸法との差ΔW
は次式の如く表わされる。また、このようすは第
2図に示しておく。 ΔW=A(lnEi−B) ……(1) ここで、定数A,Bはフオトリソグラフイ工程
の現像液の変動、塗布膜厚の変動により変化する
パラメータである。ここで、上記したようにΔW
=WDEV−WMASKである。現像後の寸法としてはマ
スクの設計値と同じ値を得たいので、WDEVとし
てマスクの設計値を代入し、WMASKとして実際に
出来上がつたマスク寸法の平均値を代入する。こ
こで、第1式を変形すると、 Ei=EXP(B+(WDEV-WWASK)/A) ……(2) ここで、露光エネルギEiは照度Iと露光時間tと
の積であるため、第2式を変形して露光時間tを
算出すると、 t=EXP〔B−lnI+(WDEV-WMASK)/A〕 ……(3) 第3式に示すように現像後の寸法とマスクの設
計値とのずれΔWは露光時間を適当に調節するこ
とにより修正することができる。つまり、フオト
リソグラフイ工程の工程パラメータA,Bを実験
的に決めておくことによりリソグラフイ工程にお
ける現像液の変動、塗布膜厚の変動による影響を
受けなくすることができる。 次に、工程パラメータA,Bを算出する場合に
ついて具体的に説明する。SiO2膜の工程パラメ
ータA,Bを算出する場合について説明する。ま
ず、シリコンウエハを1100℃の酸化性雰囲気で熱
処理を施し、約5000Åのシリコン酸化膜を形成す
る。次に、シリコン酸化膜上にポジタイプフオト
レジストをスピンコーターで約1.5μm厚に塗布
し、その後105℃の熱板で90秒間熱処理する。次
に、このウエハを露光装置で、30μmの抜きパタ
ーンを持つハードマスクを使用して露光時間を変
えて露光する。(このときの照度は502mW/cm2
ある。)その後、スプレータイプのフオトレジス
ト現像液で現像したのち、測微計を利用して現像
された寸法を測定する。このとき得られた実験結
果を第2図に示しておく。この場合において、露
光時間を変えることにより異なつた露光エネルギ
でのパターン寸法を得ている。以下最小2乗法に
よりパラメータA,Bを算出する。この結果、A
=0.64、B=9.63となる。 ところで、SiO2だけではなく、Si3N4、ポリシ
リコン、Al等においても同様にパラメータを算
出することができる。その様子を下表に示す。
[Technical Field of the Invention] The present invention relates to an exposure apparatus that controls the amount of deviation of mask dimensions from design values by adjusting exposure time so that the dimensions of a photoresist after development become equal to the design dimensions. [Technical Field of the Invention] Conventionally, negative type photoresists have been mainly used in photolithography processes. However, with the recent trend toward ultra-high integration, photolithography technology with a resolution of 2 to 3 μm has come to be required, and negative-type photoresists are being replaced by positive-type photoresists. Also,
As resolution dimensions have become finer, photomasks have also changed from conventional emulsion-type ones to so-called hard masks made of metals and their oxides. The reason why photomasks are being replaced by hard masks is that conventional emulsion-type masks do not have good resolution and dimensional accuracy. As described above, as patterns become finer, higher resolution and dimensional accuracy are required. Currently, the accuracy of masks used in the photolithography process is approximately ±0.2 to ±0.5 μm (value of 3σ). Furthermore, as patterns become finer, it is natural that the transfer accuracy, that is, the accuracy when transferring from the photomask to the photoresist coated on the semiconductor substrate, must be as accurate as the accuracy of the mask itself. ing. [Problems in the Background Art] However, in the photolithography process, especially in the process of transferring a pattern onto a resist using a completed mask, the precision of the mask is transferred directly onto the photoresist, so no matter how accurate it is, Even if it is transferred, it will not be as accurate as a mask. In reality, it's a little worse than this. Here, if the total transfer accuracy when transferring the photomask pattern to the photoresist is σ tptal , then σ tptal = (σ nask 2 + σ tra 2 ) 1/2 where σ nask is the mask accuracy and σ tra is the transfer accuracy. It is. In this way, the overall transfer accuracy is determined by the mask accuracy and the transfer accuracy, but conventionally, even if the mask accuracy is improved, if the transfer accuracy is poor, the overall transfer accuracy is deteriorated. Causes of such deterioration of transfer accuracy include variations in the illuminance of the mask aligner, variations in the developer, and variations in the resist film thickness. [Object of the invention] This invention was made in view of the above points,
The purpose of this is to improve transfer accuracy by adjusting the exposure time to eliminate the effects of changes in mask aligner illuminance, developer changes, resist film thickness, etc. that affect mask transfer accuracy, and improve overall transfer accuracy. The object of the present invention is to provide an exposure apparatus that can be improved. [Summary of the Invention] Overall transfer accuracy is improved by adjusting the exposure time to an optimal time to eliminate the effects of changes in mask aligner illuminance, developer changes, resist film thickness, etc. that affect mask transfer accuracy. Improving. [Embodiment of the Invention] An exposure apparatus according to an embodiment of the invention will be described below with reference to the drawings. As shown in FIG.
2, in the case of exposure and development using mask 12
Let W be the pattern size of
is expressed as the following equation. This situation is shown in Figure 2. ΔW=A(lnE i −B) (1) Here, the constants A and B are parameters that change due to fluctuations in the developer in the photolithography process and fluctuations in the coating film thickness. Here, as mentioned above, ΔW
= W DEV − W MASK . Since we want to obtain the same value as the design value of the mask as the dimension after development, we substitute the design value of the mask as W DEV and the average value of the actually completed mask dimensions as W MASK . Here, if we transform the first equation, E i =EXP(B+(W DEV -W WASK )/A)...(2) Here, the exposure energy E i is the product of the illuminance I and the exposure time t. Therefore, when calculating the exposure time t by modifying the second equation, t=EXP[B-lnI+(W DEV -W MASK )/A]...(3) As shown in the third equation, the dimensions after development and The deviation ΔW from the mask design value can be corrected by appropriately adjusting the exposure time. That is, by determining the process parameters A and B of the photolithography process experimentally, it is possible to eliminate the effects of variations in the developer and coating film thickness in the lithography process. Next, a case in which process parameters A and B are calculated will be specifically explained. The case of calculating the process parameters A and B of the SiO 2 film will be explained. First, a silicon wafer is heat-treated in an oxidizing atmosphere at 1,100°C to form a silicon oxide film with a thickness of about 5,000 Å. Next, a positive type photoresist is applied on the silicon oxide film to a thickness of about 1.5 μm using a spin coater, and then heat treated on a hot plate at 105° C. for 90 seconds. Next, this wafer is exposed using an exposure device using a hard mask with a 30 μm cutout pattern and varying the exposure time. (The illumination intensity at this time is 502 mW/cm 2 .) Thereafter, after developing with a spray type photoresist developer, the developed dimensions are measured using a micrometer. The experimental results obtained at this time are shown in FIG. In this case, pattern dimensions with different exposure energies are obtained by changing the exposure time. Parameters A and B are calculated below using the least squares method. As a result, A
= 0.64, B = 9.63. By the way, parameters can be similarly calculated not only for SiO 2 but also for Si 3 N 4 , polysilicon, Al, etc. The situation is shown in the table below.

〔発明の効果〕〔Effect of the invention〕

以上詳述したようにこの発明によれば、マスク
の転写精度に影響するマスクアライナの照度の変
動、レジスト膜厚等の影響を露光時間を調節する
ことによりなくしたので、転写精度の良い露光装
置を提供することができる。
As detailed above, according to the present invention, the effects of fluctuations in mask aligner illumination, resist film thickness, etc. that affect mask transfer accuracy are eliminated by adjusting the exposure time, so an exposure device with high transfer accuracy can be used. can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はフオトレジストとマスクとの関係を示
す図、第2図は露光エネルギとパターン寸法を示
す図、第3図はこの発明の一実施例に係る露光装
置を示す図である。 211,212……マスクアライナ、25……
シヤツタ、27……ウエハ、281,282……
シヤツタ駆動回路、31……マスク寸法測定器、
32……現像寸法測定器。
FIG. 1 is a diagram showing the relationship between a photoresist and a mask, FIG. 2 is a diagram showing exposure energy and pattern dimensions, and FIG. 3 is a diagram showing an exposure apparatus according to an embodiment of the present invention. 211, 212...mask aligner, 25...
Shutter, 27...Wafer, 281,282...
Shutter drive circuit, 31...mask size measuring device,
32... Development size measuring device.

Claims (1)

【特許請求の範囲】[Claims] 1 露光時間を調節するシヤツタの開閉を制御す
るシヤツタ駆動回路と、マスクの寸法W
MASKを測定するマスク寸法測定手段と、フオ
トレジストの現像後の寸法W DEVを測定する
現像寸法測定手段と、工程パラメータA,Bを算
出する工程パラメータ測定手段と、上記マスク寸
法測定手段により測定されたマスクの寸法W
MASKと上記現像寸法測定手段により測定され
たフオトレジストの寸法W DEVと上記工程パ
ラメータA,B及び照度よりフオトレジストの
現像後の寸法がマスク設計寸法に等しくなるよう
な露光時間t=EXP[B―lnI+(W DEV―W
MASK)/A]を算出する露光時間算出手段と、
上記露光時間算出手段により算出された露光時間
tをもとに上記シヤツタ駆動回路を駆動する手段
とを具備したことを特徴とする露光装置。
1 Shutter drive circuit that controls the opening and closing of the shutter that adjusts the exposure time and the mask dimension W
A mask dimension measuring means for measuring MASK, a developed dimension measuring means for measuring the developed dimension W DEV of the photoresist, a process parameter measuring means for calculating process parameters A and B, and a mask dimension measuring means for measuring the mask dimension measuring means. Dimensions of mask W
Based on MASK, the photoresist dimension W DEV measured by the developed dimension measuring means, the process parameters A, B, and illumination intensity, the exposure time t = EXP [B -lnI+(W DEV-W
MASK)/A];
An exposure apparatus comprising means for driving the shutter drive circuit based on the exposure time t calculated by the exposure time calculation means.
JP58076429A 1983-04-30 1983-04-30 Exposing apparatus Granted JPS59201418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58076429A JPS59201418A (en) 1983-04-30 1983-04-30 Exposing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58076429A JPS59201418A (en) 1983-04-30 1983-04-30 Exposing apparatus

Publications (2)

Publication Number Publication Date
JPS59201418A JPS59201418A (en) 1984-11-15
JPH0141246B2 true JPH0141246B2 (en) 1989-09-04

Family

ID=13604917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58076429A Granted JPS59201418A (en) 1983-04-30 1983-04-30 Exposing apparatus

Country Status (1)

Country Link
JP (1) JPS59201418A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03246920A (en) * 1990-02-26 1991-11-05 Fujitsu Ltd Manufacture of semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5277725A (en) * 1975-12-24 1977-06-30 Hitachi Ltd Automatic exposure circuit
JPS5453864A (en) * 1977-10-05 1979-04-27 Sanyo Electric Co Ltd Monitoring method of line widths
JPS57118639A (en) * 1981-01-16 1982-07-23 Toshiba Corp Process control of semiconductor photo-etching

Also Published As

Publication number Publication date
JPS59201418A (en) 1984-11-15

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