JPH0143749Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a vertical deflection circuit for a cathode ray tube display device.

Display devices are widely used mainly in the information processing field, and cathode ray tube display devices in particular have high utility value due to their relatively excellent display quality and long life.

When using a cathode ray tube display device for industrial use,
It is desired that the display screen be clear and provide accurate information with little display distortion.

[Conventional technology]

FIG. 2a is a diagram showing the main part of a conventional vertical deflection circuit. A vertical synchronizing signal shown in FIG. 1B is inputted from the synchronizing signal generating circuit T to the base of the transistor Q via the resistor _R1 .

When vertical synchronization pulses P ₁ , P ₂ , P ₃ are input, transistor Q becomes conductive, and the input potential to operational amplifier A becomes zero potential. However, during vertical deflection periods K ₁ and K ₂ , charging from power supply H As a result, the potential at the connection point M between the resistor R ₂ and the capacitor C increases, and a sawtooth voltage waveform as shown in c in the figure is obtained.

[Problem that the invention attempts to solve]

As is well known, in a cathode ray tube display device, flyback pulses F ₁ to F ₅ as shown in FIG. 4D are applied to a flyback transformer in order to obtain a deflection voltage.

These flyback pulses F ₁ to _{F 5} are applied to the flyback transformer in synchronization with the rising and falling edges of the vertical synchronizing pulse for each frame, but if these flyback pulses are input to the vertical deflection circuit as a noise signal, , resistor R ₂ and capacitor C
The potential at the connection point of , that is, the output voltage level of the sawtooth wave generation circuit fluctuates as shown by the chain line in Figure 2c, and therefore the normal scanning shown in Figure 3a is not performed, and the scanning in period _K2 . As shown by broken lines in FIG. 1B, deviations occur at scanning line positions S ₂ , S ₄ , S ₆ .

Such positional deviation of the scanning line causes distortion on both sides of the display device. Note that in FIG. 2a, Z is a Zener diode.

[Means for solving problems]

The present invention has been devised in view of the above, and provides a cathode ray tube display device that can prevent display screen distortion caused by flyback voltage pulses. , a series connection circuit of a resistor and a capacitor, and a voltage obtained by charging the capacitor is used as a sawtooth wave voltage for vertical deflection. This is achieved by a vertical deflection circuit for a cathode ray tube display device characterized in that a resistor is provided between the portion and the collector (or emitter) of the transistor.

[Effect]

The vertical deflection circuit described above uses a newly provided resistor to attenuate the noise voltage caused by the flyback pulse voltage inputted from the outside, thereby reducing the distortion of the sawtooth wave voltage.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and the same parts as in FIG. 2a are given the same reference numerals.

In FIG. 1, _R3 is an input resistance provided between the collector of input transistor Q and the input terminal of operational amplifier A.

When the vertical synchronization pulses P ₁ and P ₂ output from the control signal generation circuit T are input to the base of the transistor Q, the charge stored in the capacitor C is determined by R ₃ C via the transistor Q which is in a conductive state. Discharged in number of time points.

Due to this time constant, the amount of charge charged in the capacitor C at the fall of the vertical synchronizing pulses P ₁ and P ₂ input to the base of the transistor Q is as shown in FIG. 2e, where the potential at the connection point M becomes Vn.

The sawtooth voltage thus obtained is input to the vertical deflection amplifier L, and is used to vertically deflect an electron beam of a cathode ray tube (not shown).

By the way, even if the flyback pulse enters the vertical deflection circuit as a noise signal, the rate of increase in the potential at the connection point M is slow due to the time constant CR ₃ caused by the input resistor R ₃ and the capacitor C, and it is not used for deflecting the electron beam of the cathode ray tube. This does not affect the voltage value of the sawtooth wave voltage during the periods K ₁ and K ₂ , and the screen distortion described in connection with FIG. 3b does not occur.

[Effect of idea]

As described above, the vertical deflection circuit for a cathode ray tube display device according to the present invention has little variation in the sawtooth wave voltage level for vertical deflection even if a noise voltage due to the flyback voltage pulse is input, and a stable deflection effect is possible.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram of an embodiment of the present invention, Figure 2a is a configuration diagram of a conventional vertical deflection circuit, Figures 2b to e are voltage waveform diagrams for explaining circuit operation, and Figures 3a and b are FIG. 3 is a diagram showing the positions of scanning lines. T...Synchronization signal generation circuit, Q...Transistor, A...Operation amplifier, _R1 , _R2 , _R3 ...Resistance,
C...Capacitor.

Claims (1)

[Scope of utility model registration request] A cathode wire comprising a transistor that performs a switching operation based on a vertical deflection synchronizing pulse signal, and a series connection circuit of a resistor and a capacitor, and the voltage obtained by charging the capacitor is used as a sawtooth wave voltage for vertical deflection. 1. A vertical deflection circuit for a cathode ray tube display device, characterized in that a resistor is provided between a connection point between the capacitor and the resistor and a collector (or emitter) of the transistor.