JPH0148563B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] This invention relates to an arithmetic device diagnostic method that can diagnose a device without affecting the arithmetic speed and improve its reliability. For the purpose of improving reliability, each arithmetic unit is connected to the central processing unit via a single shared bus and has its own microprogram or control program, and the central processing unit exercises control over each arithmetic unit. In this state, each time an instruction is issued via the shared bus, the instruction is a first instruction for the arithmetic unit.
or a second state that is an instruction to an arithmetic device other than the arithmetic device; a control unit that starts a diagnostic program of the device and terminates the diagnostic program when the second state changes to the first state; and a diagnostic target unit that is diagnosed by the diagnostic program and outputs the results. a flag setting means for setting an error flag when abnormal operation information is output from the part to be diagnosed; and generating an interrupt to the central processing unit in response to the set error flag when the arithmetic unit is started up. The diagnosis for each arithmetic unit is performed asynchronously with the operation of each arithmetic unit other than the central processing unit and the arithmetic unit being diagnosed.

[Industrial application field]

The present invention relates to an arithmetic device diagnostic method, and particularly relates to an arithmetic device diagnostic method that diagnoses a device without affecting the calculation speed and improves its reliability.

The arithmetic unit of the central processing unit is diagnosed to check whether its arithmetic operations are being performed normally.

There are various types of diagnosis depending on the need, but due to the relationship with the data and programs used for diagnosis, diagnosis cannot be performed in a timely manner, and depending on the format, system performance may deteriorate. There is still room for improvement, and this is becoming more noticeable as the number of arithmetic units increases.

[Conventional technology]

Diagnosis of conventional arithmetic units includes initial diagnosis when power is turned on, and program loading.
Diagnosis during IPL, patrol diagnosis during program execution, etc. These diagnoses always check the data of the calculation results for uniform data with a small amount of data.

[Problem to be solved by the invention]

In this conventional diagnosis, since the diagnostic data is uniform, it is not possible to perform a diagnosis based on different data, and the diagnostic range is limited due to the small amount of data. Furthermore, once the program is executed, as the number of processing units increases, timely patrol diagnosis for the processing units becomes difficult, and if you try to increase the number of patrol diagnosis,
Conventional methods have drawbacks such as deterioration of system performance.

The present invention was devised in view of the drawbacks of the conventional diagnostic methods as described above, and provides a processing device diagnostic method that can diagnose multiple processing devices without reducing the processing speed and improve system reliability. Its purpose is to provide.

[Means to solve the problem]

FIG. 1 shows a block diagram of the principle of the present invention. 1st
As shown in the figure, the present invention comprises arithmetic units 2i (i=1, 2, ..., N) connected to the central processing unit 1 via a single shared bus 30 and equipped with their own microprograms or control programs. In each case, the following components are provided to diagnose each arithmetic unit. Each component is configured such that each time a command is issued via the shared bus 30 in a state where the central processing unit 1 is controlling each calculation unit 2i, the command is a command to the calculation unit 2i. A state holding unit 32i that holds either a first state or a second state that is an instruction to a calculation device other than the calculation device 2i, and when the held content changes from the first state to the second state. a control means 34i that starts a diagnostic program of the arithmetic unit 2i only when the second state changes to the first state, and terminates the diagnostic program when the second state changes to the first state;
, a part to be diagnosed 36i that is diagnosed by the diagnostic program and outputs the result, and a flag setting means 3 that sets an error flag when abnormal operation information is output from the part to be diagnosed 36i.
8i, and an interrupt means 40i that issues an interrupt to the central processing unit 1 in response to the error flag set when the arithmetic unit 2i is started, and the diagnosis for each of the arithmetic units 2i is performed by the central processing unit 40i. The processing is performed asynchronously with the operations of the processing device 1 and each arithmetic device other than the arithmetic device being diagnosed.

[Effect]

In each computing unit 2i, a single shared bus 30
When the command given from the central processing unit 1 via
is set to the second state. In response to this setting to the second state, the control means 34i starts a diagnostic program. At that time, the arithmetic unit to which the instruction has been given performs processing corresponding to the instruction in parallel with the arithmetic unit that is causing the activation of the diagnosis.

At the time of startup, the flag setting means 38i is referred to, and if the error flag is set, the interrupt means 40i sends a message to the central processing unit 1.
An interrupt is placed on the error flag to take appropriate action on the fault that caused the error flag to be set.

If the error flag is not set, the diagnostic target section 36i is diagnosed by the activated diagnostic program.

In the diagnosis, when operational abnormality information is output from the part to be diagnosed 36i, the error flag setting means 38i sets an error flag and finishes the diagnosis that has been started. The end of the diagnosis also occurs when the state holding section 32i is set to the first state by a command addressed to the device itself.

The above-described diagnosis does not reduce the calculation speed of each calculation device. In other words, system performance is not sacrificed in order to improve the reliability of the arithmetic unit.

〔Example〕

FIG. 2 shows a schematic configuration of an embodiment of the present invention, and FIG.
The figure shows an arithmetic unit 2i (i=1, 2,
..., N) is a detailed diagram. In FIG. 2, 1 indicates a central processing unit, 2 ₁ , 2 ₂ ..., 2 _N ,
are various arithmetic devices such as floating point arithmetic devices, decimal arithmetic devices, function arithmetic devices, etc.

The details will be explained with reference to FIG. 3, but the explanation will be made without specifying the different arithmetic units.
Reference numerals 3, 4, and 5 are a control storage device, a control register, and a program counter, respectively, which control the arithmetic unit, and their activation is caused by a microprogram or a diagnostic control register 6. register 6
Stores command information, status display, and error information related to idle time diagnosis.

The arithmetic section of the arithmetic device is composed of an arithmetic register 7, a multiplier 8, and an arithmetic unit 9. The input of the arithmetic register 7 is connected via the multiprocessor 10 to the arithmetic bus 11 connected to the central processing unit 1 (see FIG. 2) or to the output of the arithmetic unit 9. A parity check circuit 12 is connected to the arithmetic bus 11. 13 and 14 are internal operation buses.

A condition code generator 15 is connected to the arithmetic unit 9, and its output is connected to the AND gate 16 together with the check bit (CK bit) output of the control register 4. The output of the AND gate 16 is the error flag (bit 2 in FIG. 4) of the diagnostic control register 6 and the error number (bit 3 in FIG. 4).
~7) are connected to the set inputs.

17 is an output bus, and 18 is a parity generator for adding parity bits to the data on the output bus 17. 19 is a central processing unit side calculation bus.

The setting position for the diagnostic flag of the diagnostic control register 6 shown in FIG. 3 is set in the state holding section 3 of FIG.
2 (similar to FIG. 3, the reference numbers are shown without indicating the type of arithmetic unit), the control storage device 3, the control register 4, the program counter 5, and the diagnostic program in the control storage device 3 are Corresponding to the control means 34 in FIG. 1, the arithmetic register 7, multiplier 8, arithmetic unit 9, and internal buses 13 and 14 correspond to the part to be diagnosed 36 in FIG. Set position for check bit of control register 4, condition code generator 1
5 corresponds to the flag setting means 38 in FIG. Corresponding to the interrupt means 40, the operational buses 11 and 19 correspond to the shared bus 30 in FIG.

Next, a diagnosis aspect of the arithmetic device according to the present invention will be explained.

As shown in FIG. 5, the operations of the central processing unit 1 are repeated in the following order: reading an instruction (Fetch), decoding the instruction (Decode), calculating operands, reading data (Read), and executing the instruction.

During such an operation, the central processing unit decodes the instruction at the timing of decode in FIG. 5, and if the instruction is for an arithmetic unit, it notifies the related arithmetic unit. If the instruction is related to its own device at the timing of decode in FIG. 5, the arithmetic device sets the diagnostic flag (bit 1) of the diagnostic control register 6 to "0" and enters a state of waiting for activation by the central processing unit. Then, when activated by the central processing unit, that arithmetic unit executes the specified arithmetic instruction (the program is read from the control storage device 3).
Execute.

At the timing of decode in FIG. 5, if the instruction is not related to the own arithmetic unit, the diagnostic flag (bit 1) of the diagnostic control register 6 is set to "1". In response to the diagnosis flag changing from "0" to "1", the arithmetic unit sets the diagnosis program start address in the program counter 5, and reads out the idle time diagnosis program as shown in FIG. 6 from the control storage device 3. and start its execution.

Prior to this execution, an initial value or a previous calculation result is stored in the calculation register (a), and the diagnosis is proceeded based on the contents.

When the CK bit of the control register 4 is "1", the result of the operation of the arithmetic unit 9 is checked by determining whether or not the condition code generated based on the result of the operation matches the expected value. If so, the diagnostic program is executed sequentially, and when the series of diagnostics is completed, 1 is added to the contents of (a) of the calculation register 1, and the same diagnosis as described above is repeated.

In such a normal diagnosis, if the instruction is an instruction related to its own arithmetic unit at the timing of decode in FIG.
The process ends when bit 1) in the figure changes from "1" to "0".

If the condition code described above does not match the expected value, set the error flag (bit 2 in Fig. 4) and error number (bits 3 to 7 in Fig. 4) in the diagnostic control register 6, and perform the diagnosis. Interrupt the command.

When an arithmetic instruction is activated for an arithmetic unit in such a state, the error flag in the diagnostic control register 6 is set to "1", so the arithmetic instruction is not executed and an interrupt is sent to the central processing unit 1. is applied. The central processing unit 1 analyzes the contents of the interrupt, performs retry processing, execution by firmware, disconnection processing of the arithmetic unit, etc.

Note that the above-mentioned arithmetic device includes not only the above-mentioned example but also a processor in a channel device connected to a central processing unit.

〔Effect of the invention〕

As described above, according to the present invention, diagnosis can be performed without reducing the calculation speed of the arithmetic device, so that effects such as improved reliability of the arithmetic device can be obtained without deteriorating system performance.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a schematic configuration diagram of an embodiment of the present invention, Fig. 3 is a detailed diagram of the arithmetic unit of the embodiment of Fig. 2, and Fig. 4 is a diagram of the configuration set in the diagnostic control register. FIG. 5 is a processing flowchart of the central processing unit, and FIG. 6 is a calculation flowchart of the diagnostic program. Figure 1,
In Figures 2 and 3, 1 is the central processing unit, 2i (i = 1, 2, ..., N)
is an arithmetic unit, 30 is a shared bus (arithmetic buses 11, 1
9), 32i is a state holding unit (diagnostic control register 6
(setting position for the diagnostic flag of unit 8, computing unit 9, internal computing bus 13,
14), 38i is a flag setting means (set position for error flag of diagnostic control register 6, set position for check bit of control register 4, condition code generator 15), 40i
is an interrupt means (control storage device 3, control register 4, program counter 5, interrupt processing part in the diagnostic program in the control storage device 3, and arithmetic bus 19).

Claims (1)

[Claims] 1. Arithmetic unit 2i (i=1, 2,
..., N), in a state where the central processing unit 1 is controlling each arithmetic unit 2i, each time a command is issued via the shared bus 30, the command is an instruction to the arithmetic unit 2i. Some first state,
or a second state that is an instruction to a computing device other than the computing device 2i.
i, activating the diagnostic program of the arithmetic unit 2i only when the retained content changes from the first state to the second state, and starting the diagnostic program of the arithmetic unit 2i when the held content changes from the second state to the first state; A control means 34i for terminating the diagnosis, a part to be diagnosed 36i that is diagnosed by the diagnostic program and outputs the result, and a flag set for setting an error flag when abnormal operation information is output from the part to be diagnosed 36i. means 38i; and means for controlling the central processing unit 1 in response to the error flag set when the arithmetic unit 2i is activated.
and an interrupt means 40i that issues an interrupt to the processing unit 2i, and performs diagnosis for each processing unit 2i asynchronously with the operation of each processing unit other than the central processing unit 1 and the processing unit being diagnosed. Characteristic arithmetic unit diagnostic method.