JPH0149063B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a remote monitoring device.

FIG. 1 is a block diagram showing a schematic configuration of a conventional remote monitoring and control device.A large number of terminal devices 2 are connected to a pair of signal lines 3a and 3b connected to a main operation panel 1. 1 and each terminal 2 to perform remote monitoring and control. Each terminal device 2 has a unique address set, and since the address identifies each terminal device 2, originally it is not possible to connect terminal devices 2 with the same address into one device. There isn't.
However, if the address setting switch of the terminal device 2 is operated incorrectly during construction, the same address may be set to two or more terminal devices 2, and in such a case, the timing of the return signal from the terminal device 2 may be incorrect. Because of the duplication, the main operation panel 1 could not correctly identify the return signal, and there was a problem in that it was not easy to tell whether there was an error in the address setting of the terminal device 2. That is, the transmission signal V _S sent from the main operation panel 1 includes a start signal ST consisting of wide pulses and an address signal AD transmitting address data for calling the terminal device 2, as shown in FIG.
and a load connected to terminal device 2 (not shown)
It consists of a control signal CD that transmits the control data of the terminal 2, and a long pulse signal WP for waiting for a return signal that sets the waiting period for the return signal _VB from the terminal device 2, and is designed to be sent cyclically to each address. .
The transmission signal V _S is transmitted as a bipolar signal (AC signal), and the bit value "1" is a wide pulse.
This is a pulse width modulation signal in which the bit value "0" is a narrow pulse.

The configuration of the main operation panel 1 is as shown in FIG. 3, with reference numeral 10 a transmission signal generation unit that generates a transmission signal V _S , and 11 amplifying the power of the output of the transmission signal generation unit 10 and connecting signal lines 3a and 3b. a driver section, 12, which sends out data to
is the voltage V _r across the resistor r for current detection and the reference voltage
A returned signal discriminator 13 is a received signal processor, which is composed of a comparator that compares V _f .

On the other hand, as shown in the figure, the terminal device 2 has an address match detection function that outputs an address match signal when the address data of the transmission signal V _S matches its own address set by the address setting switch S _A. a load control section 21 that takes in the control data of the transmission signal V _S when an address matching signal is obtained and outputs the load control signal V _O ; a return unit 22 that short-circuits the signal lines 3a and 3b via an impedance element R as appropriate during the period of the long pulse signal WP for waiting for the return _{of S} , and sends out a return signal _VB as a current signal to return monitoring data; It is formed of. In the figure, reference numeral 23 denotes a return signal generation unit that generates a return signal V _B for returning monitoring data based on the monitoring input _Vi , Q is a switching transistor, and DB is a full-wave rectifier diode bridge.

Now, the transmission signal V _S sent out from the main operation panel 1
The called terminal 2 whose address data matches its own address receives a load control signal from the load control unit 21 based on the control data of the transmission signal V _S.
In addition to outputting V _O , a return signal V _B for returning monitoring data (6 bits including parity bits in the actual column) formed based on the monitoring input Vi is transmitted as a transmission signal V _B as shown in Fig. 2b _. During the period of the long pulse signal WP for waiting for the return of the signal (during the “H” level period)
Then, it is sent to signal lines 3a and 3b as a current signal.
Next, on the main operation panel 1, the voltage V _r across the current detection resistor r is input to the return signal discriminator 12, as shown in FIG.
As shown in , when the voltage V _r at both ends is higher than the reference voltage V _f , the signal lines 3 a and 3 b are short-circuited via the impedance element R, and the signal lines 3 a and 3 are short-circuited through the impedance element R.
“H” when a large current exceeding a specified value flows through b.
The level is outputted, and the output V _B of the returned signal discriminator 12 is output to the received signal processor 13.
The state of the monitoring input V _i of the terminal device 2 is recognized on the main operation panel 1 by determining whether the data value is “1” or “0” depending on the length or shortness of the “H” level section. become.

By the way, in such a conventional example, originally,
If the addresses of two or more terminal devices 2 that should be set to different addresses are set to the same address due to a mistake in the operation of the address setting switch S _A , the main operation panel 1
When two or more terminal devices 2 simultaneously respond to a call from the terminal device 2, for example, as _shown in _FIG .
V _B12 will be returned. In this case, since the return signal discriminator 12 only uses a comparator to determine whether the voltage V _r across the current detection resistor r is greater than or equal to the reference voltage V _f , the return signals from the two terminals 2 Even though V _B1 and V _B2 are returned in a superimposed manner, the main operation panel 1 recognizes it as the return signal V _B from one terminal device 2, and the same address is set to two or more terminal devices 2. The problem was that I didn't know what was going on. Note that FIG. 4b shows a case where the return signals V _B1 and V _B2 that return the same monitoring data from each terminal 2 are superimposed, and since the terminals 2 are not synchronized, each pulse Although the rising and falling edges of the signal are slightly different, it is recognized as the return signal V _B1 or V _B2 from one terminal 2, but the return signals V _B1 and V return different monitoring data. Needless to say, if _B2 is superimposed and returned, the monitoring data of both return signals V _B1 and V _B2 will be incorrectly recognized.
The present invention has been made in view of the above points,
The purpose is to provide a remote monitoring device that can easily detect from a main operation panel that the addresses of two or more terminal devices are set to overlap.

Examples will be described below using figures. FIG. 5 shows a circuit diagram of a main part of an embodiment of the present invention, and 14 is a malfunction determination unit that detects the current change point of the return signal V _B and determines whether a plurality of return signals V _B are superimposed. A current transformer Ti that outputs a voltage proportional to the change (di/dt) in the signal current flowing through the signal line 3b, an operational amplifier OP ₁ for signal inversion, an output V _a of the current transformer Ti, and an operational amplifier OP ₁ . Comparators CP ₁ and CP ₂ each detect whether the output V _b is higher than a predetermined voltage;
An operational amplifier OP ₂ that adds the outputs V _c and V _d of both comparators CP ₁ and CP ₂ , a counter CO that is reset by the start signal ST and counts the output V _e of the operational amplifier OP ₂ , and a counter CO output V _f . The address duplication detection circuit 15 outputs an address duplication signal DA when the value exceeds a preset value (13 in the embodiment).

6 shows the operation of the embodiment shown in FIG. 5. FIG. 6a shows the case where there is no duplicate address of the terminal devices 2, and FIG. 6b shows the return signals V _B1 , Each output when V _B2 is returned at the same time
It shows V _a to V _e . Now, in the case where the addresses of the terminal devices 2 do not overlap, the timing of change in the signal current flowing through the signal line 3b corresponds to the rising and falling timings of the pulse signal that returns each bit of the monitoring data of the return signal _VB . In this embodiment, since the monitoring data is 6 bits, the number of pulses output from the operational amplifier _OP2 , that is, the number of change points, is 12. On the other hand, when the addresses of two terminal devices 2 overlap, the time point at which the signal current changes is determined by the return signal sent back from each terminal device 2.
It corresponds to the rising and falling of V _B1 and V _B2 ,
In the embodiment, the number of change points is 24. Therefore, when the output V _CO of the counter CO becomes 13 or more, the address duplication detection circuit 15 outputs an address duplication signal.
DA is now being output. As described above, in the embodiment shown in FIG. 5, when the number of current change points of the return signal _VB becomes more than twice the number of bits of the monitoring data, the address duplication signal DA is output from the malfunction determination section 14, and the return signal is output. It is designed to notify that the signals V _B1 and V _B2 are superimposed, so that duplication of addresses of terminal devices 2 can be easily detected on the main operation panel 1 side, and malfunctions can be prevented.

FIG. 7 shows another embodiment, in which the return signal
The clock is the output V _e of the operational amplifier OP ₂ , which outputs a pulse corresponding to the current change point of V _B , and the voltage V _r across the current detection resistor r is input to the data input terminal.
A shift register SR inputting the current level signal V _g whose waveform has been shaped by the waveform shaping circuit SW is provided in place of the counter CO in the embodiment of FIG. 5, and the first and second bits of the shift register SR output V _h are It is equipped with an exclusive NOR circuit EN for input, and the _first ,
When both of the second bits are "1", the address duplication signal DA is output from the exclusive NOR circuit EN. That is, in the embodiment of FIG. 7, the current level signal V _g at the time of current change is sequentially sampled and stored in the shift register SR,
As shown in Figure 8a, if the sampling value of the current level signal V _g is alternately at the "H" level and the data read into the shift register SR is a repetition of "1" and "0", address duplication occurs. As shown in Figure _8b , the sampled value of the current level signal V _g is continuously “H”.
If the data read into the shift register SR at the level is "1" continuously, the addresses of two or more terminal devices 2 are duplicated, and the superimposed return signal V _B12 is returned. It has become possible to distinguish between _OP3 to _OP6 in FIG. 7 are operational amplifiers.

The present invention is configured as described above, and a transmission signal comprising an address signal for transmitting address data for calling a terminal and a long pulse signal for waiting for a return is sent cyclically from the main operation panel to each address, and In a remote monitoring device that sends out a return signal for returning monitoring data as a current signal during a period of a long pulse signal for return standby from a calling terminal, it detects the point at which the current of the return signal changes and sends out multiple return signals. This system is equipped with a malfunction determination section that determines whether multiple return signals are superimposed. This has the advantage that the main operation panel can easily detect that the addresses of two or more terminal devices are set in duplicate.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a schematic configuration of a remote monitoring device according to the present invention, FIG. 2 is a diagram showing the same transmission signal and return signal, and FIG. 3 is a block circuit diagram of a conventional example.
4 is an explanatory diagram of the same operation as above, FIG. 5 is a main circuit diagram of an embodiment of the present invention, and FIG. 6 is an explanatory diagram of the same as above,
FIG. 7 is a circuit diagram of a main part of another embodiment, and FIG. 8 is an explanatory diagram of the same operation. 1 is a main operation panel, 2 is a terminal device, 3a and 3b are signal lines, 14 is a malfunction determination section, 20 is an address match detection section, and 22 is a reply section.

Claims (1)

[Claims] 1 Connect the main operation panel and multiple terminal devices with a pair of signal lines, and send a transmission signal from the main operation panel that includes an address signal that transmits address data for calling the terminal device and a long pulse signal for waiting for a return. an address match detection unit that cyclically sends to each address and outputs an address match signal to the terminal device when the address data of the transmission signal and its own address match;
When an address matching signal is obtained, the signal lines are appropriately short-circuited via an impedance element during the period of the long pulse signal for waiting for the return of the transmission signal, and a return signal for returning the monitoring data is sent out as a current signal. A remote monitoring device equipped with a reply unit configured as described above is characterized in that a malfunction determination unit is provided on the main operation panel for detecting the point at which the current of the return signal changes and determining whether or not multiple return signals are superimposed. remote monitoring equipment.