JPH0152115B2 - - Google Patents
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- Publication number
- JPH0152115B2 JPH0152115B2 JP5206580A JP5206580A JPH0152115B2 JP H0152115 B2 JPH0152115 B2 JP H0152115B2 JP 5206580 A JP5206580 A JP 5206580A JP 5206580 A JP5206580 A JP 5206580A JP H0152115 B2 JPH0152115 B2 JP H0152115B2
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- JP
- Japan
- Prior art keywords
- welding
- voltage
- chip
- cycle
- detected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000003466 welding Methods 0.000 claims description 75
- 238000000034 method Methods 0.000 claims description 4
- 238000001514 detection method Methods 0.000 description 19
- 239000000523 sample Substances 0.000 description 6
- 230000007423 decrease Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 229910001209 Low-carbon steel Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000275 quality assurance Methods 0.000 description 1
Landscapes
- Arc Welding Control (AREA)
Description
【発明の詳細な説明】
本発明は、抵抗溶接、特にスポツト溶接の溶接
品質をモニタリングする場合や品質を一定に制御
する場合に有効な制御因子としての溶接電極間電
圧(以後これをチツプ間電圧とよぶ)の検出方法
の改善に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention uses welding electrode voltage (hereinafter referred to as inter-chip voltage) as an effective control factor when monitoring the welding quality of resistance welding, especially spot welding, and when controlling the quality to a constant level. related to the improvement of the detection method.
チツプ間電圧を監視することが、スポツト溶接
品質の管理にきわめて有効な手段であることは周
知の事実である。(例えば、文献として、抵抗溶
接研究委員会資料「スポツト溶接品質保証方法」
大阪大学、仲田周次他著昭和52年12月9日溶接学
会発行)。ところで、チツプ間電圧の検出は被溶
接物の形状等の制約から、第1図のように、検出
位置は溶接電極(チツプ)の先端からかなりはな
れた位置A,B点にとられ、またその検出プルー
ブは、溶接機の腕にそわせて引き出される。ここ
で、1は溶接電極(チツプ)、2は被溶接物、3
は検出プルーブ、4は溶接機本体、Vtは電圧計
である。 It is a well-known fact that monitoring the inter-chip voltage is an extremely effective means of controlling spot welding quality. (For example, as a document, resistance welding research committee material "Spot welding quality assurance method"
Osaka University, Shuji Nakata et al., published by the Welding Society of Japan, December 9, 1975). By the way, due to constraints such as the shape of the object to be welded when detecting the inter-chip voltage, the detection positions are set at points A and B, which are quite far from the tip of the welding electrode (chip), as shown in Figure 1. The detection probe is pulled out along the arm of the welder. Here, 1 is the welding electrode (chip), 2 is the object to be welded, and 3
is the detection probe, 4 is the welding machine body, and Vt is the voltmeter.
さて、実際に検出されるチツプ間電圧(Vt)
は、第2図のA,B間の抵抗ドロツプ分(V1+
V2+V3+V4+V5)と、溶接電流による誘起電圧
分(Kdi/dt)(但しK:誘起電圧係数、i:溶接電
流、t:時間)との和として与えられる。このう
ち溶接品値に関係するのは、抵抗ドロツプ分のう
ちの被溶接物と被溶接物との間の電圧(V3)で
ある。 Now, the actual detected chip-to-chip voltage (Vt)
is the resistance drop (V 1 +
V 2 +V 3 +V 4 +V 5 ) and the induced voltage component (Kdi/dt) due to the welding current (K: induced voltage coefficient, i: welding current, t: time). Of these, the voltage (V 3 ) between the objects to be welded, which is part of the resistance drop, is related to the value of the welded product.
したがつて、実際に検出されるチツプ間電圧
(Vt)から、まず溶接電流による誘起電圧分(K
di/dt)を除去し、抵抗ドロツプ分を求め、次にチ
ツプ内の抵抗ドロツプ分(V1+V5)、チツプと被
溶接物間の抵抗ドロツプ分(V2+V4)を差し引
いて、被溶接物間の抵抗ドロツプ分(V3)のみ
を抽出することができれば、最も精度よく溶接品
質を監視することができるわけである。 Therefore, from the actually detected inter-chip voltage (Vt), first calculate the induced voltage (K) due to the welding current.
di/dt), find the resistance drop, then subtract the resistance drop within the chip (V 1 + V 5 ) and the resistance drop between the chip and the workpiece (V 2 + V 4 ) to find the resistance drop. If only the resistance drop (V 3 ) between welded objects can be extracted, welding quality can be monitored with the highest accuracy.
ところが従来においては、誘起電圧分を除去す
る程度で、チツプ内の抵抗ドロツプ分等の除去は
なされていないのが現状であり、S/N比的にも
この検出精度は十分なものとはいえず、したがつ
て結果的にはチツプ間電圧を利用した溶接品質の
監視も決して満足すべきものではなかつた。 However, in the past, only the induced voltage component was removed, but the resistance drop within the chip was not removed, and although this detection accuracy was sufficient in terms of S/N ratio, Therefore, as a result, monitoring of welding quality using inter-chip voltage was by no means satisfactory.
本発明の検出方法は、以上の従来例に鑑み、誘
起電圧分とチツプ内抵抗ドロツプの除去を同時に
効率よく行い、溶接品質に直接関係する被溶接物
間の抵抗ドロツプ分をより精度よく検出しようと
するものである。 In view of the above conventional examples, the detection method of the present invention efficiently removes the induced voltage component and the resistance drop inside the chip at the same time, and more accurately detects the resistance drop between the objects to be welded, which is directly related to welding quality. That is.
すなわち、従来例の誘起電圧分に加えて、チツ
プ内抵抗ドロツプ分の除去も行えるようにしたも
のである。なお、説明の便宜上、チツプ短絡時の
溶接電流と実溶接時の溶接電流が等しいとして説
明する。本発明は第3図に示すように、通電時限
の指定したサイクル(C1)から指定したサイク
ル(Co)までの各通電サイクル毎のチツプ短絡
時におけるチツプ間電圧(V′ti)を順次V′t1、
V′t2、……V′tnとして検出しメモリに記憶する。
ここで、V′ti=(V1+V6+V5)iである。ただ
し、iは通電サイクル、(V1+V5)はチツプ内抵
抗ドロツプ分、V6はチツプ間の抵抗ドロツプ分
である。なお、誘起電圧分Kdi/dtが削除されてい
るのは交流検出回路を検出に用いるためで、理由
は後述する。 That is, in addition to the induced voltage component of the conventional example, it is also possible to remove the internal resistance drop component. For convenience of explanation, the welding current during chip short-circuiting and the welding current during actual welding are assumed to be equal. As shown in FIG. 3, the present invention sequentially calculates the chip-to-chip voltage (V'ti) when the chip is short-circuited for each energization cycle from the designated cycle (C 1 ) to the designated cycle (C o ) of the energization time limit. V′t 1 ,
Detected as V′t 2 , ...V′tn and stored in memory.
Here, V′ti=(V 1 +V 6 +V 5 )i. Here, i is the energization cycle, (V 1 +V 5 ) is the resistance drop within the chip, and V 6 is the resistance drop between the chips. Note that the induced voltage component Kdi/dt is deleted because the AC detection circuit is used for detection, and the reason will be described later.
次に実溶接に際して、通電時限の指定したサイ
クル(C1)から指定したサイクル(Co)までの
各通電サイクル毎のチツプ間電圧(Vti)を検出
し、例えば、通電サイクル(C1)の場合の検出
値Vt1から前記記憶値V′t1を引き算して、その差
分値を(Vt1−V′t1)として決め、これを通電サ
イクル(C1)のチツプ間電圧とする。以下、順
次、(Vt2−V′t2)、(Vt3−V′t3)……、(Vtn−
V′tn)のように各サイクル毎に差分値を求めて、
これを各サイクルのチツプ間電圧とする。ここ
で、Vti=(V1+V2+V3+V4+V5)iである。
ただし、誘起電圧分Kdi/dtが削除されているのは
交流積分回路を検出に用いているためで、理由は
後述する。 Next, during actual welding, the inter-chip voltage (Vti) is detected for each energization cycle from the specified cycle (C 1 ) to the specified cycle (C o ) of the energization time limit, and the The stored value V't 1 is subtracted from the detected value Vt 1 of the case, and the difference value is determined as (Vt 1 −V't 1 ), and this is taken as the inter-chip voltage of the energization cycle (C 1 ). Below, (Vt 2 −V′t 2 ), (Vt 3 −V′t 3 )..., (Vtn−
Find the difference value for each cycle like V′tn),
This is taken as the inter-chip voltage for each cycle. Here, Vti=(V 1 +V 2 +V 3 +V 4 +V 5 )i.
However, the induced voltage component Kdi/dt is deleted because an AC integrating circuit is used for detection, and the reason will be explained later.
故に、Vti−V′ti=(V2+V3+V4−V6)iとな
り、少なくともチツプ内の抵抗ドロツプ分であ
る。(V1+V5)および誘起電圧分(Kdi/dt)が除
去できるので、従来のような誘起電圧分(Kdi/dt)
のみを除去したものに比べ、より溶接品質に関係
の深い電圧V3の検出精度が高められたことにな
る。 Therefore, Vti-V'ti=( V2 + V3 + V4 - V6 )i, which is at least the resistance drop within the chip. (V 1 +V 5 ) and the induced voltage component (Kdi/dt) can be removed, so compared to the conventional method where only the induced voltage component (Kdi/dt) is removed, the voltage V 3 , which is more closely related to welding quality, can be removed. This means that the detection accuracy has been improved.
更に本発明は、チツプ間電圧の検出に際して、
検出プルーブからの信号を交流積分回路に入力し
て、その出力電圧のうち、溶接電流が流れ始める
時点の電圧から溶接電流が流れ終つた時点の電圧
を引き算して、その絶対値をとることにより誘起
電圧の除去を行なうものである。 Furthermore, in the present invention, when detecting the inter-chip voltage,
By inputting the signal from the detection probe into an AC integrating circuit, and subtracting the voltage at the point when the welding current stops flowing from the voltage at the point when the welding current starts flowing from the output voltage, and taking the absolute value. This removes induced voltage.
なお、上記溶接電流は、例えば、板厚1mmの軟
鋼板2枚を溶接する場合、8000Aが適当である。
また、チツプ短絡時の溶接電流と実溶接時の溶接
電流が異なる場合には、チツプ短絡時のチツプ間
電圧にある一定定数を乗算した値をもつて、チツ
プ短絡時のチツプ間電圧として記憶すればよい。 Note that, for example, when welding two mild steel plates with a thickness of 1 mm, the appropriate welding current is 8000 A.
In addition, if the welding current at the time of a chip short circuit and the welding current during actual welding are different, the voltage between chips at the time of a chip short circuit multiplied by a certain constant should be stored as the inter-chip voltage at the time of a chip short circuit. Bye.
第4図は、本発明の検出方法を実施するための
検出回路の一実施例を示したものである。図にお
いて、チツプ間電圧は交流積分回路に入力さ
れ、さらにサンプルホールド回路、A/D変換
回路を介してマイクロコンピユータに入力さ
れる。一方、溶接電流は変流器を介してゼロ点
検出回路に入力され、溶接電流が流れ始める時
点や流れ終える時点を検知し、マイクロコンピユ
ータに入力する。回路は検出されたチツプ間
電圧がチツプ短絡時のチツプ間電圧か実溶接時の
チツプ間電圧なのかを指示するスイツチ回路であ
る。 FIG. 4 shows an embodiment of a detection circuit for carrying out the detection method of the present invention. In the figure, the inter-chip voltage is input to an AC integration circuit, and further input to a microcomputer via a sample-and-hold circuit and an A/D conversion circuit. On the other hand, the welding current is input to a zero point detection circuit via a current transformer, which detects the point at which the welding current begins to flow and the point at which it stops flowing, and inputs it to the microcomputer. The circuit is a switch circuit that indicates whether the detected inter-chip voltage is the inter-chip voltage at the time of a chip short circuit or the inter-chip voltage during actual welding.
さて、交流積分回路を介してチツプ間電圧
は、第5図に示すような積分波形となる。ここで
イには、溶接電圧と溶接電流の波形を示してい
る。 Now, the inter-chip voltage via the AC integrating circuit has an integrated waveform as shown in FIG. Here, A shows the waveforms of the welding voltage and welding current.
通常、抵抗溶接の溶接電流の制御は、通電電流
制御素子として、逆並列に配置されたサイリスタ
の点弧角(電流導通角度)を制御することによつ
て行う。この例では第3図イに示すように溶接電
圧のC、E点でサイリスタに点弧し、通電した例
を示している。抵抗溶接では、リアクタンスによ
り、溶接電圧より電流が遅れるので、第3図イの
ように溶接電圧と電流の位相は、少しズレたもの
になる。またDE間はサイリスタが点弧していな
いので、この間は溶接電流が流れることなくゼロ
となる。 Normally, the welding current in resistance welding is controlled by controlling the firing angle (current conduction angle) of thyristors arranged in antiparallel as current-carrying current control elements. In this example, as shown in FIG. 3A, the thyristor is ignited and energized at points C and E of the welding voltage. In resistance welding, the current lags behind the welding voltage due to reactance, so the welding voltage and current are slightly out of phase, as shown in Figure 3A. Also, since the thyristor is not firing between DE, the welding current does not flow during this period and becomes zero.
次に第5図ロは交流積分回路を介して得たチツ
プ間電圧(Vti)または(V′ti)を示している。
ここで、交流積分回路は、オペアンプを反転増幅
器として利用するような回路構成にしているの
で、第5図イの溶接電流に対する信号が入力され
た時、その信号の入力と出力は、符号が反転した
ものになる。つまり、負側のCDに対応する信号
により交流積分回路は正側に充電される。この充
電値は誘起電圧分(Kdi/dt)と抵抗ドロツプ分の
和となる。 Next, FIG. 5B shows the inter-chip voltage (Vti) or (V'ti) obtained through the AC integrating circuit.
Here, the AC integrating circuit has a circuit configuration that uses an operational amplifier as an inverting amplifier, so when the signal for the welding current shown in Figure 5 A is input, the input and output of that signal have reversed signs. It becomes what it is. In other words, the AC integrating circuit is charged to the positive side by the signal corresponding to the negative CD. This charging value is the sum of the induced voltage (Kdi/dt) and the resistance drop.
さて、di/dtは、溶接電流の増加中は正となり、
減少中は負となり、ちようどCDのピークのとこ
ろで零となる。 Now, di/dt is positive when the welding current is increasing, negative when it is decreasing, and becomes zero just at the peak of CD.
対応する交流積分回路の出力は、VtCから上昇
し、CDのピークのところでピーク値をとり、そ
れ以降はdi/dtが負になるので減少し、D点に対応
するところで溶接電流がゼロになり、交流積分回
路出力はVtDになる。 The output of the corresponding AC integrating circuit rises from Vt C , takes a peak value at the peak of CD, and after that decreases as di/dt becomes negative, and the welding current becomes zero at the point corresponding to D. Therefore, the output of the AC integrating circuit becomes Vt D.
また、DE間は、溶接電流がゼロであるので、
この交流積分回路の出力は保持される。しかし、
実際はわずかな放電がおこるので、次の通電開始
点での交流積分回路出力値VtEとVtDは等しくな
らない。 Also, since the welding current is zero between DE,
The output of this AC integrating circuit is held. but,
In reality, a slight discharge occurs, so the AC integrating circuit output values Vt E and Vt D at the next energization start point are not equal.
同様に、次の通電が、サイリスタの点弧により
E点でおこると、溶接電流波形がCDとは逆に正
側であるので交流積分回路出力はVtEから下がり
はじめ、EFのピークのところで下側のピークに
なり、ここから誘起電圧分Kdi/dtのdi/dtの符号が反
転するので、正方向に充電されはじめ、溶接電流
が零になるF点でVtFという値をとることにな
る。 Similarly, when the next energization occurs at point E due to ignition of the thyristor, the welding current waveform is on the positive side, contrary to CD, so the AC integrator output starts to decrease from Vt E and decreases at the peak of EF. The sign of di/dt of the induced voltage Kdi/dt reverses from here, so charging begins in the positive direction, and the welding current takes the value Vt F at point F where it becomes zero. .
この電通サイクル毎の溶接電流が流れ始める時
点(例えばC、E点)の交流積分回路出力
(VtC、VtE)と流れ終わる時点(D、F点)の値
(VtD、VtF)をサンプルホールドして、A/D変
換して、マイクロコンピユータ内にとり込み、通
電サイクル毎に、溶接電流が流れ始めるときの交
流積分回路の出力値から、流れ終つた時点の交流
積分回路の出力値を引き算し、その絶対値をとる
演算(例えばVt1=|VtC−VtD|、Vt2=|VtE−
VtF|、……)をマイクロコンピユータで行な
う。この絶対値は、誘起電圧分Edi/dtが除去され
たものとなる。何故ならば、すでに述べたように
溶接電流の通電波形は凸形となり、このdi/dtは山
のピークを界にして正、負の符号をとり、1サイ
クル通電全体について積分することにより正、負
相殺されて、Edi/dtはゼロになるからである。こ
のようにして求めた、抵抗ドロツプ分のみのチツ
プ間電圧をもとにして、既に述べたように、チツ
プ短絡時のチツプ間電圧(V′ti)を指定したサイ
クル(C1)からサイクル(Co)まで客サイクル
毎に第4図に示す手段で検出し、それをメモリに
V′t1、V′t2、……V′toのように記憶する。 The AC integrating circuit output (Vt C , Vt E ) at the point when the welding current starts flowing (for example, points C and E ) and the values (Vt D , Vt F ) at the point when the welding current stops flowing (points D and F ) in each current cycle are calculated. The sample is held, A/D converted, and taken into a microcomputer, and for each energization cycle, the output value of the AC integrator circuit is calculated from the output value of the AC integrator circuit when the welding current begins to flow, and the output value of the AC integrator circuit when the welding current ends. Operations that subtract and take the absolute value (for example, Vt 1 = |Vt C −Vt D |, Vt 2 = |Vt E −
Vt F |,...) is performed by a microcomputer. This absolute value is obtained by removing the induced voltage Edi/dt. This is because, as already mentioned, the welding current waveform has a convex shape, and this di/dt takes positive and negative signs with the peak of the mountain as the boundary, and by integrating over one cycle of current, it becomes positive and negative. This is because Edi/dt becomes zero due to negative cancellation. Based on the chip-to-chip voltage corresponding to only the resistance drop obtained in this way, the chip-to-chip voltage (V′ti) at the time of a chip short circuit is calculated from the specified cycle (C 1 ) to the cycle ( C o ) is detected every customer cycle by the means shown in Figure 4, and it is stored in memory.
Store them as V′t 1 , V′t 2 , ...V′t o .
そして実溶接時のチツプ間電圧(Vti)を同様
に第4図に示す手段で検出し、指定したサイクル
(C1)の検出値Vt1からメモリ内の記憶値V′t1を引
き算して、これをサイクル(C1)のチツプ間電
圧とする。このようにして順次サイクル(C1)
から(Co)まで同様の手順で引き算を行ない、
各サイクルのチツプ間電圧を求めるものである。 Then, the inter-chip voltage (Vti) during actual welding is similarly detected by the means shown in Figure 4, and the stored value V′t 1 in the memory is subtracted from the detected value Vt 1 of the specified cycle (C 1 ). , this is the chip-to-chip voltage of the cycle (C 1 ). In this way sequential cycles (C 1 )
Subtract from to (C o ) in the same way,
This is to find the inter-chip voltage for each cycle.
サイクル(C1)、(Co)の指定については、各
種考えられるが、ここではマイクロコンピユータ
のROM内に指定値を記憶させる方法を取つた。
通常は、サイクル(C1)が1でサイクル(Co)
は、通電時限となるように設定されている。 There are various ways to designate the cycles (C 1 ) and (C o ), but here we have taken a method of storing the designated values in the ROM of the microcomputer.
Usually, the cycle (C 1 ) is 1 and the cycle (C o )
is set to be the energization time limit.
以上のような、本発明の検出方法を用いれば、
チツプ間電圧のうち、従来ノイズ成分とみなされ
除去されていた誘起電圧分のみならずチツプ内抵
抗ドロツプ分をも除去できるので、溶接品質に関
係する被溶接物間の抵抗ドロツプ分をより高精度
に検出可能となり、チツプ間電圧を利用した抵抗
溶接の品質向上にきわめて大なる効果がある。 If the detection method of the present invention as described above is used,
Of the inter-chip voltage, it is possible to remove not only the induced voltage, which was conventionally considered a noise component and removed, but also the internal resistance drop within the chip, making it possible to more accurately measure the resistance drop between the objects to be welded, which is related to welding quality. This has an extremely large effect on improving the quality of resistance welding using chip-to-chip voltage.
第1図はチツプ間電圧の検出方法を実施してい
る溶接機の側面図、第2図は実溶接時のチツプ間
電圧を示すチツプ部分の拡大側面図、第3図はチ
ツプ短絡時のチツプ間電圧を示すチツプ部分の拡
大側面図、第4図は本発明の検出方法を実施する
ための検出回路の一ブロツク図、第5図イ,ロは
チツプ間電圧検出例を示す溶接電流とチツプ間電
圧の交流積分値の波形図である。
1……溶接電極(チツプ)、2……被溶接物、
3……検出プルーブ、4……溶接機本体、……
交流積分回路、……サンプルホールド回路、
……A/D変換回路、……マイクロコンピユー
タ、……交流器、……ゼロ点検出回路、…
…スイツチ回路。
Figure 1 is a side view of a welding machine implementing the method for detecting the voltage between chips, Figure 2 is an enlarged side view of the chip section showing the voltage between chips during actual welding, and Figure 3 is a side view of the welding machine that implements the method for detecting the voltage between chips. FIG. 4 is a block diagram of a detection circuit for carrying out the detection method of the present invention, and FIGS. FIG. 3 is a waveform diagram of an AC integral value of the voltage between the two terminals. 1... Welding electrode (chip), 2... Work to be welded,
3...Detection probe, 4...Welding machine body,...
AC integrator circuit, sample hold circuit,
...A/D conversion circuit, ...microcomputer, ...alternator, ...zero point detection circuit, ...
...Switch circuit.
Claims (1)
交流積分回路を介して検出し、通電サイクル毎の
溶接電流の流れ始める時点の前記交流積分回路の
出力と流れ終わる時点の前記交流積分回路の出力
の差の絶対値を各通電サイクル毎の溶接電極間電
圧とし、溶接電極を短絡して通電した時の指定し
た通電サイクル(C1)から指定した通電サイク
ル(Co)までの各通電サイクル毎の溶接電極間
電圧(V′ti)を検出して順次V′t1、V′t2、……
V′toとして記憶し、実溶接に際して、前記指定し
た通電サイクル(C1)から(Co)までの各サイ
クル毎の溶接電極間電圧(Vti)を検出し、前記
指定した通電サイクル(C1)から(Co)までの
各通電サイクル毎に、前記溶接電極間電圧
(Vti)から記憶してある前記溶接電極間電圧
(V′ti)を引き算して得た差分値を溶接電極間電
圧とすることを特徴とする溶接電極間電圧の検出
方法。1 In detecting the voltage between welding electrodes in resistance welding,
The absolute value of the difference between the output of the AC integrating circuit at the time when the welding current starts flowing and the output of the AC integrating circuit when the welding current stops flowing is detected via the AC integrating circuit, and the absolute value of the difference between the output of the AC integrating circuit at the time when the welding current starts flowing for each energization cycle and the output from the AC integrating circuit when the welding current ends is detected as the welding electrode for each energizing cycle. The voltage between the welding electrodes (V′ti) is detected for each energization cycle from the specified energization cycle (C 1 ) to the specified energization cycle (C o ) when the welding electrodes are short-circuited and energized. and sequentially V′t 1 , V′t 2 ,...
During actual welding , the welding electrode voltage (Vti) is detected for each cycle from the specified energization cycle (C 1 ) to (C o ), and For each energization cycle from 1 ) to (C o ), the difference value obtained by subtracting the memorized welding electrode voltage (V'ti) from the welding electrode voltage (Vti) is calculated as the welding electrode voltage. A method for detecting voltage between welding electrodes, characterized in that the voltage is detected as a voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5206580A JPS56148483A (en) | 1980-04-18 | 1980-04-18 | Detection of voltage between welding electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5206580A JPS56148483A (en) | 1980-04-18 | 1980-04-18 | Detection of voltage between welding electrodes |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58101139A Division JPS5910480A (en) | 1983-06-06 | 1983-06-06 | Welding electrode voltage detection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56148483A JPS56148483A (en) | 1981-11-17 |
| JPH0152115B2 true JPH0152115B2 (en) | 1989-11-07 |
Family
ID=12904403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5206580A Granted JPS56148483A (en) | 1980-04-18 | 1980-04-18 | Detection of voltage between welding electrodes |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56148483A (en) |
-
1980
- 1980-04-18 JP JP5206580A patent/JPS56148483A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56148483A (en) | 1981-11-17 |
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