JPH0152979B2 - - Google Patents

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Publication number
JPH0152979B2
JPH0152979B2 JP57195862A JP19586282A JPH0152979B2 JP H0152979 B2 JPH0152979 B2 JP H0152979B2 JP 57195862 A JP57195862 A JP 57195862A JP 19586282 A JP19586282 A JP 19586282A JP H0152979 B2 JPH0152979 B2 JP H0152979B2
Authority
JP
Japan
Prior art keywords
terminal
information
current
circuit
cbx
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57195862A
Other languages
Japanese (ja)
Other versions
JPS5986414A (en
Inventor
Yasuhiro Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57195862A priority Critical patent/JPS5986414A/en
Publication of JPS5986414A publication Critical patent/JPS5986414A/en
Publication of JPH0152979B2 publication Critical patent/JPH0152979B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、電力系統の各端子から取込む電流情
報、休止端情報を用い適確な電力系統の保護を行
う電流差動継電装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a current differential relay device that appropriately protects a power system using current information and idle end information taken in from each terminal of the power system.

〔発明の技術的背景〕[Technical background of the invention]

近年、超高圧系統の重要幹線においても多端子
系統が計画され、それらを保護する保護継電装置
にも電流差動原理を用いるデジタル電流差動リレ
ー装置、FM電流差動リレー装置等が開発されて
きている。このような装置は多端子の電流情報の
伝送方式こそ異なるがいずれも各端子毎に得られ
た電流、電圧量を相互に伝送し合うかあるいは1
つの端子に集めて差動判定を行うものである。
In recent years, multi-terminal systems have been planned for important trunk lines of ultra-high voltage systems, and digital current differential relay devices, FM current differential relay devices, etc. that use the current differential principle have been developed as protective relay devices to protect them. It's coming. Although these devices differ in the method of transmitting current information from multiple terminals, they either mutually transmit the amount of current and voltage obtained from each terminal, or
The signals are collected at one terminal and differential judgment is performed.

ここで、系統運用上各端子(2端子以上)のど
の端子かでしや断器等の停止を伴う操作が必要と
なる場合がある。この場合、適確な差動判定を行
うため該端子を休止端子として扱うことを他の端
子に知らせる必要がある。以下この点について詳
述する。
Here, in order to operate the system, it may be necessary to perform an operation that involves shutting down any of the terminals (two or more terminals) or disconnecting the terminal. In this case, in order to perform accurate differential determination, it is necessary to notify other terminals that the terminal is to be treated as a rest terminal. This point will be explained in detail below.

第1図は2端子系統を保護する場合の電流差動
リレー装置のシステム構成図を示す。送電線1の
両端子A,Bの電流変成器2A,2Bより送電線
1に流れる電流iA,iBが各端子の電流差動リレ
ー装置3A,3Bに取込まれる。取込まれた電流
情報iA,iBから差動流idを作り、所定のレベル
に達すると電流差動リレー装置が動作する。ま
た、送電線1のしや断器5A,5Bの開、閉状態
の情報も同時に電流差動リレー装置3A,3Bに
取込まれる。A端子、B端子の電流iA,iB、及
びしや断器5A,5B情報は伝送装置4A,4B
を介して互いに送られる。第2図は、第1図の電
流差動リレー装置3A,3B、及び伝送装置4
A,4Bの構成をデジタル電流差動リレー装置の
例で示したブロツク構成図である。電流差動リレ
ー装置30Aは下記の回路で構成される。電流変
成器2Aを介して取込まれる電流情報iAは、所
定の変換比で電圧量に変換する入力変換器301
Aを介してフイルター302Aに入力され、不要
な周波数成分を除去してサンプリングホールド回
路303Aに取込まれる。サンプリングホールド
回路303Aの出力は、A/D変換器304Aを
介してデジタル信号に変換されてデータメモリ
(RAM)306Aに書き込まれ、同時に直並列
データを並、直列データに変換するデータ変換回
路305Aを介してB端子へ送信される。一方、
このデータ変換回路305Aを介してB端子から
送信される電流精報iBやしや断器開閉等の論理
信号がデータメモリ306Aに書き込まれる。こ
のデータリモリ306Aに書き込まれた情報デー
タを用いて、プログラムメモリー(ROM)30
8Aに記憶されている所定の処理プログラムを中
央演算制御装置307Aにて実行する。更に、イ
ンターフエース部31Aから整定値などの入力情
報を取込むためのインターフエース回路309A
からなる。
FIG. 1 shows a system configuration diagram of a current differential relay device for protecting a two-terminal system. Currents iA and iB flowing into the power transmission line 1 from current transformers 2A and 2B at both terminals A and B of the power transmission line 1 are taken into current differential relay devices 3A and 3B at each terminal. A differential current id is created from the captured current information iA and iB, and when it reaches a predetermined level, the current differential relay device operates. Further, information on the open and closed states of the power line breakers 5A and 5B of the power transmission line 1 is also simultaneously taken into the current differential relay devices 3A and 3B. The current iA, iB of the A terminal and B terminal, and the information on the disconnectors 5A and 5B are transmitted by the transmission devices 4A and 4B.
sent to each other via. FIG. 2 shows the current differential relay devices 3A, 3B and the transmission device 4 of FIG.
FIG. 4 is a block configuration diagram showing the configuration of A and 4B as an example of a digital current differential relay device. The current differential relay device 30A is composed of the following circuit. Current information iA taken in through the current transformer 2A is input to an input converter 301 that converts it into a voltage amount at a predetermined conversion ratio.
The signal is inputted to a filter 302A via A, removes unnecessary frequency components, and is taken into a sampling and hold circuit 303A. The output of the sampling hold circuit 303A is converted into a digital signal via an A/D converter 304A and written into a data memory (RAM) 306A, and at the same time a data conversion circuit 305A is sent to convert serial/parallel data into parallel and serial data. It is sent to the B terminal via the on the other hand,
Logic signals such as the current signal iB and disconnector opening/closing signals transmitted from the B terminal via the data conversion circuit 305A are written into the data memory 306A. Using the information data written in this data memory 306A, the program memory (ROM) 30
A predetermined processing program stored in 8A is executed by central processing control unit 307A. Further, an interface circuit 309A for receiving input information such as a setting value from the interface section 31A.
Consisting of

次に、相手端子へ送信されるしや断器情報や制
御電源異常情報により休止端検出する電流差動リ
レー装置30Aについて、第3図、第4図を用い
て説明する。第3図は、しや断器5Aの開閉状態
および制御電源異常の情報検出を行う構成図であ
る。駆動電源P,Nは補助リレーCBX−1,
CBX−2,CBX−3を駆動させるなど比較的高
いレベルの電源であり、電流差動リレー装置30
Aにも電源供給している。電流差動リレー装置3
0Aの内部電子回路等は比較的低いレベルの電源
で駆動できるので、電源P,Nと絶縁し所定のレ
ベルに変換する制御電源装置20Aより得られる
制御電源ZP,ZNを用いる。
Next, the current differential relay device 30A, which detects the end of rest based on the short circuit disconnection information and control power supply abnormality information transmitted to the partner terminal, will be described with reference to FIGS. 3 and 4. FIG. 3 is a configuration diagram for detecting information on the open/closed state of the shield breaker 5A and abnormality in the control power supply. Drive power supplies P and N are auxiliary relays CBX-1,
It is a relatively high level power supply that drives CBX-2 and CBX-3, and the current differential relay device 30.
Power is also supplied to A. Current differential relay device 3
Since the internal electronic circuits and the like of 0A can be driven with a relatively low level power supply, the control power supplies ZP and ZN obtained from the control power supply device 20A which is insulated from the power supplies P and N and converted to a predetermined level are used.

先ず、しや断器5Aの開閉状態の検知について
述べる。しや断器5Aの各3相の開閉と連動して
開閉する接点5A′と補助リレーCBX−1,CBX
−2,CBX−3を駆動電源P,Nに接続し、こ
れら補助リレーの動作・不動作を示す情報は電流
差動リレー装置30Aのバツフア回路22Aに取
込まれ、しや断器の開閉情報を示す論理信号
CBX−1LA,CBX−2LA,CBX−3LAとな
る。この信号CBX−1LA,CBX−2LA,CBX
−3LAは、各々の相のしや断器が開状態のとき
「1」、閉状態のとき「0」となる。
First, detection of the open/closed state of the shield breaker 5A will be described. Contact 5A' and auxiliary relays CBX-1, CBX that open and close in conjunction with the opening and closing of each of the three phases of shield breaker 5A
-2, CBX-3 is connected to drive power supplies P and N, and information indicating the operation/non-operation of these auxiliary relays is taken into the buffer circuit 22A of the current differential relay device 30A, and the opening/closing information of the circuit breaker is A logical signal indicating
CBX-1LA, CBX-2LA, CBX-3LA. This signal CBX-1LA, CBX-2LA, CBX
-3LA is "1" when the line breakers of each phase are open, and "0" when they are closed.

次に、制御電源異常の検知について述べる。制
御電源が異常となり変動したり断となるとリレー
装置の動作判定は信頼できないものになるので、
電源異常検出回路21Aを設け制御電源ZP,ZN
の異常検知を行つている。この電源異常検出回路
21Aの出力Lは異常検出のとき「1」となる。
Next, detection of control power supply abnormality will be described. If the control power supply becomes abnormal and fluctuates or is disconnected, the operation judgment of the relay device will become unreliable.
Equipped with power supply abnormality detection circuit 21A for control power supply ZP, ZN
Anomaly detection is performed. The output L of this power supply abnormality detection circuit 21A becomes "1" when an abnormality is detected.

そして、このしや断器開閉信号CBX−1LA,
CBX−2LA,CBX−3LAおよび異常検出信号
Lの情報は電流情報iAとともに伝送装置4Aを
介し相手端子に伝送される。
And, Konoshiya disconnector opening/closing signal CBX-1LA,
Information on CBX-2LA, CBX-3LA and abnormality detection signal L is transmitted to the other terminal via transmission device 4A together with current information iA.

このA端子から伝送された情報により、A端子
が休止端子か否かを第4図の休止端検出回路の処
理にて検出していた。図において、4aはインヒ
ビツト回路、4bはオア回路、4cはフリツプフ
ロツプ回路、4dはアンド回路で、S=「1」、R
=「0」のときQ=「1」、S=「0」、R=「1」の
ときQ=「0」となる。
Based on the information transmitted from the A terminal, whether or not the A terminal is a rest terminal is detected by the processing of the rest end detection circuit shown in FIG. In the figure, 4a is an inhibit circuit, 4b is an OR circuit, 4c is a flip-flop circuit, 4d is an AND circuit, S=“1”, R
When = "0", Q = "1", S = "0", and when R = "1", Q = "0".

インヒビツト回路4aの入力Lが「1」の場
合、即ち電源異常を検出している場合は、例えA
端子のしや断器情報CBX−1LA,2LA,3LA
が3相共に開で「1」となるアンド回路4dの出
力が「1」であつてもインヒビツト回路4aの出
力は「1」とはならず、フリツプフロツプ4cの
出力(=Q)は「1」とはならない。即ち、電源
異常を検出しているときは休止検出には至らな
い。従つて異常検出していない場合にのみ休止検
出する。
When the input L of the inhibit circuit 4a is "1", that is, when a power supply abnormality is detected, for example, A
Terminal and disconnection information CBX-1LA, 2LA, 3LA
is "1" when all three phases are open.Even if the output of the AND circuit 4d is "1", the output of the inhibit circuit 4a is not "1", and the output (=Q) of the flip-flop 4c is "1". It is not. In other words, when a power supply abnormality is being detected, the suspension will not be detected. Therefore, suspension is detected only when no abnormality is detected.

また、休止検出した後に異常検出した場合は、
フリツプフロツプのS入力は「0」となり、オア
回路4bの出力「1」もノツト回路4eによつて
「0」となるので、フリツプフロツプの出力(=
Q)は「1」のままで休止検出信号は復帰しな
い。
Also, if an abnormality is detected after detecting a pause,
The S input of the flip-flop becomes "0", and the output "1" of the OR circuit 4b also becomes "0" by the NOT circuit 4e, so the output of the flip-flop (=
Q) remains at "1" and the pause detection signal does not return.

〔背景技術の問題点〕[Problems with background technology]

このような回路において、電源P,Nが脱落し
た場合、電源P,Nの脱落のタイミングと制御電
源装置20Aの出力ZPの立下りとの協調如何に
よつて、異常検出信号Lが「1」になる前に休止
条件が成立して、実際は休止端子ではないにもか
かわらず該端子を休止と扱つてしまうことが生じ
る。第5図にその例を示す。t=t0で駆動電源
P,Nが脱落した場合、制御電源ZP,ZNの出力
レベルは制御電源装置20Aの構造的特性により
緩やかに減衰し、t=t1で電源異常検出回路21
Aの検出レベルに達する。従つて、t=t1で異常
検出信号Lが「1」となる。一方、電源P,Nで
駆動される補助リレーの動作によるしや断器情報
はt=t0から補助リレーの復帰時間後に開とな
る。従つて、相手端子にはしや断器情報が先に伝
送され、異常検出信号Lが受信される前にフリツ
プフロツプ4cのS入力が「1」となり出力Qも
「1」となるのでA端子を休止端とみてしまうこ
とになる。これにより、A端子からの電流情報は
零と扱われ、受信端子の電流差動リレーはその動
作を阻止されることになり、第6図に示すよう
に、A,B端子間に潮流iLが流れている場合、一
端流入状態と判定し、系統事故がなくとも誤動作
に至る可能性がある。また、区間外に事故が発生
した場合にはB端子が誤しや断に至ることにな
る。即ち、電力系統の複数の端子の電流情報を用
いて、電力系統を保護することを目的とした電流
差動保護継電装置において、いずれかの端子の電
源活殺時にリレー阻止情報としや断器情報の時間
協調不足により他の端子では不要な休止検出を行
なつてしまい、電力系統が正常に運用されている
にも拘わらず、差電流分が発生し電流差動リレー
装置の誤動作を招く可能性があつた。
In such a circuit, when the power supplies P and N are disconnected, the abnormality detection signal L becomes "1" depending on the timing of the disconnection of the power supplies P and N and the fall of the output ZP of the control power supply device 20A. In some cases, a dormant condition is satisfied before the terminal becomes dormant, and the terminal is treated as dormant even though it is not actually a dormant terminal. An example is shown in FIG. When the drive power supplies P and N are dropped at t=t 0 , the output levels of the control power supplies ZP and ZN are gradually attenuated due to the structural characteristics of the control power supply device 20A, and the power supply abnormality detection circuit 21 is dropped at t=t 1 .
A detection level is reached. Therefore, the abnormality detection signal L becomes "1" at t= t1 . On the other hand, the breaker information due to the operation of the auxiliary relay driven by the power supplies P and N is opened after the auxiliary relay's recovery time from t= t0 . Therefore, the disconnection information is transmitted to the other terminal first, and before the abnormality detection signal L is received, the S input of the flip-flop 4c becomes "1" and the output Q also becomes "1", so that the A terminal is not connected. This can be seen as a resting end. As a result, the current information from the A terminal is treated as zero, and the current differential relay at the receiving terminal is prevented from operating, and as shown in Figure 6, the current information between the A and B terminals is reduced . If it is flowing, it is determined that there is an inflow, which may lead to malfunction even if there is no system fault. Furthermore, if an accident occurs outside the section, the B terminal may become erroneous or disconnected. In other words, in a current differential protection relay device that aims to protect the power system by using current information of multiple terminals of the power system, relay blocking information and disconnection information are generated when the power supply of any terminal is activated or deactivated. Due to lack of time coordination, other terminals may perform unnecessary stoppage detection, and even though the power system is operating normally, a differential current may occur, leading to malfunction of the current differential relay device. It was hot.

〔発明の目的〕[Purpose of the invention]

本発明は上記問題点を解決することを目的とし
てなされたものであり、電源活殺端子の電源P,
N間の脱落を高速度に検出することにより、適確
に休止検出を行う信頼性の高い電流差動継電装置
を提供することを目的としている。
The present invention was made with the aim of solving the above-mentioned problems, and the present invention has been made with the aim of solving the above-mentioned problems.
It is an object of the present invention to provide a highly reliable current differential relay device that accurately detects stoppage by detecting disconnection between N and N at high speed.

〔発明の概要〕[Summary of the invention]

本発明では、しや断器が開となつた場合にその
端子を休止端子と検出し、且つ該当端子の電源異
常検出時に休止端子検出を阻止するように構成さ
れた電流差動継電装置において、該当端子の電源
脱落を検出できる第2の補助リレーをしや断器の
開閉状態に応動する補助リレーと同じ駆動電源に
設けることによつて、電源脱落時に電源の異常検
出する時間としや断器開を検出する時間とを同時
期に行え相手端子の休止端の誤検出を確実に阻止
できるようにしようとするものである。
The present invention provides a current differential relay device configured to detect a terminal as a dormant terminal when a breaker is opened, and to prevent detection of a dormant terminal when an abnormality in the power supply of the corresponding terminal is detected. By installing a second auxiliary relay that can detect power loss at the corresponding terminal on the same drive power source as the auxiliary relay that responds to the opening/closing status of the disconnector, the time required to detect a power failure when the power source is disconnected can be reduced. The purpose is to detect the opening of the device at the same time as possible, thereby reliably preventing erroneous detection of the rest end of the mating terminal.

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照して実施例を説明する。第7図
に示すように、しや断器の開閉状態を示す補助リ
レーCBX−1,CBX−2,CBX−3が接続され
る駆動電源P,Nの間に電圧が印加されていると
きに励磁される補助リレー70を設け、この補助
リレー70に連動する接点70aの情報をバツフ
ア回路に取込む。この補助リレー70の接点情報
は、補助リレー70が励磁されているとき「1」
となる。そして、インヒビツト回路71を設け、
電源異常検出回路21Aが制御電源の異常を検出
してないとき(異常検出信号Lが「0」のとき)、
補助リレー70の接点情報「1」をLXとして相
手端に伝送させる。
Examples will be described below with reference to the drawings. As shown in Fig. 7, when voltage is applied between drive power supplies P and N to which auxiliary relays CBX-1, CBX-2, and CBX-3 are connected, which indicate the open/close status of the circuit breaker. An energized auxiliary relay 70 is provided, and information of a contact 70a interlocked with this auxiliary relay 70 is taken into a buffer circuit. The contact information of this auxiliary relay 70 is "1" when the auxiliary relay 70 is excited.
becomes. Then, an inhibit circuit 71 is provided,
When the power supply abnormality detection circuit 21A does not detect any abnormality in the control power supply (when the abnormality detection signal L is "0"),
The contact information "1" of the auxiliary relay 70 is transmitted to the other end as LX.

このように、電源異常の情報LXを従来の異常
検出信号Lにかえて相手端に伝送することによ
り、補助リレーCBX−1,CBX−2,CBX−3
と補助リレー70との電源P,N脱落時の協調を
とることができ、相手端子において不要な休止検
出を行なうことが防止でき、電流差動リレー装置
の誤動作を阻止できる。そのタイミングチヤート
を第8図に示す。即ち、第8図においてt=t0
駆動電源P,Nが脱落した場合、制御電源ZP,
ZNの出力レベルが緩やかに減衰して、t=t1
電源異常検出回路21Aの検出レベルに達する。
従つて、異常検出信号Lが「1」となる。一方、
電源P,N間で駆動される補助リレーCBX−1,
CBX−2,CBX−3の動作によるしや断器情報
は、t=t0から補助リレーの復帰時間後に開とな
る。同じ電源P,N間に駆動される補助リレー7
0もこれと同時に開となる。従つて、相手端子に
はしや断器情報と電源異常情報を示す異常検出信
号LXとがほぼ同時に「0」となる。よつて、第
9図に示す休止端検出回路のように、休止検出時
間を少々遅らせるためにインヒビツト回路4aの
出力のオンデイレータイマー80を挿入すること
によつて確実に不要な休止検出をすることを防止
できる。
In this way, by transmitting power supply abnormality information LX to the other end instead of the conventional abnormality detection signal L, auxiliary relays CBX-1, CBX-2, CBX-3
It is possible to coordinate the power supplies P and N with the auxiliary relay 70 when the power supplies P and N are disconnected, and it is possible to prevent unnecessary stop detection at the mating terminal, thereby preventing malfunction of the current differential relay device. The timing chart is shown in FIG. That is, in FIG. 8, if the drive power supplies P and N are dropped at t= t0 , the control power supplies ZP and
The output level of ZN gradually attenuates and reaches the detection level of the power supply abnormality detection circuit 21A at t= t1 .
Therefore, the abnormality detection signal L becomes "1". on the other hand,
Auxiliary relay CBX-1 driven between power supplies P and N,
The breaker information due to the operation of CBX-2 and CBX-3 is opened after the recovery time of the auxiliary relay from t= t0 . Auxiliary relay 7 driven between the same power supplies P and N
0 becomes open at the same time. Therefore, the abnormality detection signal LX indicating the disconnection information and the power abnormality information at the other terminal become "0" almost simultaneously. Therefore, by inserting an on-delay timer 80 for the output of the inhibit circuit 4a to slightly delay the pause detection time, as in the pause end detection circuit shown in FIG. 9, unnecessary pauses can be detected reliably. This can be prevented.

つまり、電源P,Nが脱落した場合、異常検出
信号LXとしや断器情報の論理信号CBX−1LA,
CBX−2LA,CBX−3LAはほぼ同時に伝送さ
れるので、インヒビツト回路4aの出力は成立せ
ず、フリツプフロツプ4cのS入力は「1」とな
らずA端子を誤つて休止端とみてしまうことがな
い。また、例えわずかにしや断器情報が早く伝送
されインヒビツト回路4aの出力が成立したとし
ても、オンデイレータイマー80により伝送差を
吸収するのでフリツプフロツプ4cのS入力は
「1」とならず誤つた休止端検出を行うことはな
い。
In other words, if the power supplies P and N are disconnected, the abnormality detection signal LX and the disconnection information logic signal CBX-1LA,
Since CBX-2LA and CBX-3LA are transmitted almost simultaneously, the output of the inhibit circuit 4a is not established, and the S input of the flip-flop 4c does not become "1", preventing the A terminal from being mistakenly regarded as the rest end. . Furthermore, even if the disconnection information is transmitted slightly earlier and the output of the inhibit circuit 4a is established, the transmission difference is absorbed by the on-delay timer 80, so the S input of the flip-flop 4c does not become "1" and an error occurs. No rest edge detection is performed.

以上の説明では休止検出を相手端子で行なうこ
とを説明したが、自端子で休止検出して電流iA
を零に制御して相手端子へ送信するようにしても
実施可能であることは言うまでもない。更に、上
記実施例では2端子系で説明したが、3端子以上
の多端子系統にも適用できることは勿論である。
In the above explanation, we explained that the pause detection is performed at the other terminal, but when the pause is detected at the own terminal, the current iA
It goes without saying that it is also possible to control the signal to zero and transmit it to the other party's terminal. Furthermore, although the above embodiments have been explained using a two-terminal system, it is of course applicable to a multi-terminal system having three or more terminals.

〔発明の効果〕〔Effect of the invention〕

本発明によればほぼ同時期に伝送したしや断器
の開閉情報と電源異常検出情報とを用い休止検出
するので、誤つた休止端の扱いを防ぎ動作信頼性
の高い電流差動継電装置を得ることができる。
According to the present invention, the shutdown is detected using the opening/closing information of the disconnector and the power supply abnormality detection information transmitted at approximately the same time, so the current differential relay device prevents incorrect handling of the shutdown end and has high operational reliability. can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は電流差動リレー装置のシステム構成
図、第2図はデジタル電流差動リレー装置のブロ
ツク構成図、第3図は従来の情報検出の構成図、
第4図は従来の休止端検出回路の回路図、第5図
は従来の休止端検出回路の動作を示すタイミング
チヤート、第6図は電流差動リレー装置を適用す
る電力系統図、第7図は本発明の情報検出の構成
図、第8図は本発明の休止端検出回路の動作を示
すタイミングチヤート、第9図は本発明の休止端
検出回路の回路図である。 1……送電線、2A,2B……電流変成器、3
A,3B……電流差動リレー装置、4A,4B…
…伝送装置、5A,5B……しや断器、20A…
…制御電源装置、21A……電源異常時検出回
路、22A……バツフア回路、CBX−1,2,
3,70……補助リレー、71,4a……インヒ
ビツト回路、4b……オア回路、4c……フリツ
プフロツプ回路、4d……アンド回路、4e……
ノツト回路、80……オンデイレータイマー。
Figure 1 is a system configuration diagram of a current differential relay device, Figure 2 is a block diagram of a digital current differential relay device, and Figure 3 is a configuration diagram of a conventional information detection system.
Figure 4 is a circuit diagram of a conventional idle end detection circuit, Figure 5 is a timing chart showing the operation of the conventional idle edge detection circuit, Figure 6 is a power system diagram to which a current differential relay device is applied, and Figure 7. 8 is a timing chart showing the operation of the rest edge detection circuit of the invention, and FIG. 9 is a circuit diagram of the rest edge detection circuit of the invention. 1...Power transmission line, 2A, 2B...Current transformer, 3
A, 3B...Current differential relay device, 4A, 4B...
...Transmission device, 5A, 5B...Shiya disconnector, 20A...
...Control power supply device, 21A...Power supply abnormality detection circuit, 22A...Buffer circuit, CBX-1, 2,
3, 70... Auxiliary relay, 71, 4a... Inhibit circuit, 4b... OR circuit, 4c... Flip-flop circuit, 4d... AND circuit, 4e...
Note circuit, 80...on-delay timer.

Claims (1)

【特許請求の範囲】 1 電力系統の各端子から取込む電流情報、しや
断器の開閉状態を示すしや断器情報及び電源の異
常検出情報を端子相互間で伝送し合うかあるいは
特定の端子に集め、電源異常でないときのしや断
器情報により休止端子を検出し、前記電流情報を
基に電流差動演算を行う電流差動継電装置におい
て、 前記しや断器情報を得るしや断器の開閉状態に
応動する補助リレーと同じ駆動電源に接続される
第2の補助リレーを設け、この第2の補助リレー
の動作状態に対応する異常検出情報を入力し、電
源脱落時の前記異常検出情報の遅れによる休止端
子の誤検出を阻止する休止端検出回路を具備する
ことを特徴とする電流差動継電装置。
[Scope of Claims] 1. Current information taken from each terminal of the power system, breaker information indicating the opening/closing status of the breaker, and abnormality detection information of the power supply are transmitted between the terminals or a specific In a current differential relay device that collects current at a terminal, detects a dormant terminal based on the current information when there is no power abnormality, and performs current differential calculation based on the current information, the current information is obtained. A second auxiliary relay connected to the same drive power source as the auxiliary relay that responds to the opening/closing status of the disconnector is installed, and abnormality detection information corresponding to the operating status of this second auxiliary relay is input, and the abnormality detection information corresponding to the operating status of the second auxiliary relay is input. A current differential relay device comprising a rest end detection circuit that prevents erroneous detection of a rest terminal due to a delay in the abnormality detection information.
JP57195862A 1982-11-10 1982-11-10 Current differential relay unit Granted JPS5986414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57195862A JPS5986414A (en) 1982-11-10 1982-11-10 Current differential relay unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57195862A JPS5986414A (en) 1982-11-10 1982-11-10 Current differential relay unit

Publications (2)

Publication Number Publication Date
JPS5986414A JPS5986414A (en) 1984-05-18
JPH0152979B2 true JPH0152979B2 (en) 1989-11-10

Family

ID=16348218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57195862A Granted JPS5986414A (en) 1982-11-10 1982-11-10 Current differential relay unit

Country Status (1)

Country Link
JP (1) JPS5986414A (en)

Also Published As

Publication number Publication date
JPS5986414A (en) 1984-05-18

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