JPH0154856B2 - - Google Patents

Info

Publication number
JPH0154856B2
JPH0154856B2 JP56005284A JP528481A JPH0154856B2 JP H0154856 B2 JPH0154856 B2 JP H0154856B2 JP 56005284 A JP56005284 A JP 56005284A JP 528481 A JP528481 A JP 528481A JP H0154856 B2 JPH0154856 B2 JP H0154856B2
Authority
JP
Japan
Prior art keywords
mask
polycrystalline silicon
laser light
grain size
annealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56005284A
Other languages
Japanese (ja)
Other versions
JPS57118648A (en
Inventor
Juji Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP56005284A priority Critical patent/JPS57118648A/en
Publication of JPS57118648A publication Critical patent/JPS57118648A/en
Publication of JPH0154856B2 publication Critical patent/JPH0154856B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing

Landscapes

  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法に関し、レーザ
ー光を用いて多結晶半導体層の一部に選択的なア
ニールを行い結晶化し、結晶化の程度の相違によ
るエツチング速度の差異を利用して結晶化の進ん
だ領域のみを選択的に残す半導体装置の製造方法
を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, in which a portion of a polycrystalline semiconductor layer is selectively annealed and crystallized using a laser beam, and etching rates differ due to differences in the degree of crystallization. The present invention provides a method for manufacturing a semiconductor device that selectively leaves only regions with advanced crystallization.

従来、多結晶シリコンをレーザー光でアニール
し粒径を大型化又は単結晶化するには、シリコン
窒化膜(以下Si3N4と略す)又はシリコン酸化膜
(以下SiO2と略す)上へ多結晶シリコンを化学的
に気相成長させ、その上からレーザー光を数回照
射する方法が採られている。このとき多結晶シリ
コン薄膜の全面をアニールすると薄膜全面が結晶
化すると同時に、この多結晶シリコン薄膜下の
Si3N4膜又はSiO2膜の下地基板も加熱される不都
合を生じ、結晶化シリコンの一部の領域を選択的
に形成するには更にレジスト・マスクを用いた選
択的な結晶化シリコン膜のエツチングが必要とな
る。
Conventionally, polycrystalline silicon is annealed with laser light to increase the grain size or make it a single crystal. The method used is to chemically grow crystalline silicon in a vapor phase and then irradiate it with laser light several times. At this time, when the entire surface of the polycrystalline silicon thin film is annealed, the entire surface of the thin film is crystallized, and at the same time, the area under this polycrystalline silicon thin film is
The base substrate of the Si 3 N 4 film or SiO 2 film is also heated, which causes the inconvenience that a selective crystallized silicon film using a resist mask is required to selectively form a part of the crystallized silicon. Etching is required.

このような問題に鑑み、たとえば試料の一部の
みをレーザー光で照射し試料を局部分に結晶化す
ることも考えられるが、この方法ではアニールす
る幅を決めるレーザー・ビーム径の寸法精度や走
査機械系の位置精度を高め、望みの領域外にレー
ザー光が照射されるのを防ぐ必要がある。このた
め光学系や走査系が複雑となる欠点がある。
In view of these problems, it is conceivable to irradiate only a part of the sample with laser light to crystallize the sample locally, but this method requires the dimensional accuracy of the laser beam diameter that determines the annealing width, and the scanning It is necessary to improve the positional accuracy of the mechanical system and prevent the laser beam from irradiating outside the desired area. This has the disadvantage that the optical system and scanning system are complicated.

ところで、かかるレーザアニールによる結晶化
の技術は半導体集積回路内に作り込まれるトラン
ジスタなどの回路要素の誘電体分離や多層化の技
術として有用なものであり、このためレーザー光
によるアニールで一部の領域の多結晶シリコンを
結晶化しその領域のみを選択的に残す簡単な方法
が望まれている。
Incidentally, such crystallization technology by laser annealing is useful as a technology for dielectric separation and multilayering of circuit elements such as transistors built into semiconductor integrated circuits, and for this reason, some parts can be removed by annealing with laser light. What is desired is a simple method of crystallizing polycrystalline silicon in a region and selectively leaving only that region.

本発明は上述した問題を解決することのできる
製造方法を提供するものであり、多結晶半導体上
を金属等のマスクで覆つたのち、アニールすべき
部分の金属を選択的に除去することにより、この
部分にはレーザー光が当るようにし、一方、それ
以外の部分ではレーザー光を金属マスクで反射し
て多結晶シリコン内にレーザー光が入射すること
によりアニール効果が生じることのないようにし
たのち、レーザー光を照射して、多結晶シリコン
試料の一部の領域、すなわち金属の除去された部
分に位置する多結晶シリコン部分を選択的にアニ
ールし粒径の大型結晶化をはかり、次いで金属マ
スクの除去後、全面にエツチング処理を施し、粒
径の細かい多結晶シリコンが速くエツチング除去
されることを積極的に利用して、レーザー光のア
ニールにより粒径が大型結晶化した領域を自己整
合的に形成するところに本発明の特徴がある。
The present invention provides a manufacturing method that can solve the above-mentioned problems, and involves covering a polycrystalline semiconductor with a mask made of metal or the like, and then selectively removing the metal in the areas to be annealed. The laser beam was applied to this area, while the laser beam was reflected by a metal mask in other areas to prevent the annealing effect from occurring due to the laser beam entering the polycrystalline silicon. , laser light is irradiated to selectively anneal a part of the polycrystalline silicon sample, that is, the polycrystalline silicon part located in the area where metal has been removed, in order to crystallize the grain to a large size, and then a metal mask is applied. After the removal, the entire surface is etched, and by actively taking advantage of the fact that polycrystalline silicon with fine grain size is quickly etched away, the area where the grain size has become crystallized by annealing with laser light is self-aligned. The present invention is characterized in that it is formed as follows.

以下図面により本発明の一実施例にかかる方法
を詳細に説明する。第1図に多結晶シリコンの選
択アニール用試料のレーザー照射前の断面図を示
す。第1図において下地基板1の上にSiO2膜又
はSi3N4膜2を形成したのち、更に重ねて多結晶
シリコン膜3を化学気相成長法等で形成し、さら
にこの多結晶シリコン3上に直接金属マスク4を
配置する。金属マスクの材料としてレーザー光を
反射しかつ多結晶シリコンやSiO2膜と密着性の
良い金属、例えば金、アルミニウム、クロム等又
は金属酸化物や金属ケイ化物を用いる。なお、第
1図では金属マスクを1層だけ形成しているが、
密着性の良い金属とレーザー光の反射性が良い金
属を積層配置してもよい。
A method according to an embodiment of the present invention will be explained in detail below with reference to the drawings. FIG. 1 shows a cross-sectional view of a polycrystalline silicon sample for selective annealing before laser irradiation. In FIG. 1, after forming a SiO 2 film or a Si 3 N 4 film 2 on a base substrate 1, a polycrystalline silicon film 3 is further formed by chemical vapor deposition or the like, and then this polycrystalline silicon film 3 is A metal mask 4 is placed directly on top. As a material for the metal mask, a metal that reflects laser light and has good adhesion to polycrystalline silicon or SiO 2 film, such as gold, aluminum, chromium, etc., or a metal oxide or metal silicide is used. In addition, in FIG. 1, only one layer of metal mask is formed, but
A metal with good adhesion and a metal with good reflectivity for laser light may be laminated.

このようにして金属マスク4によつて選択的に
覆われた試料の上部からレーザー光5を連続的又
はパルス状に照射する。なお、試料全面を一度で
アニール出来ないのでレーザー光源のビーム径を
レンズで絞り、試料上をレーザー光5で連続的に
2次元走査し試料全面をレーザー光で照射する。
第1図の配置の下で試料全面をレーザー光5で1
回又は多数回走査すると金属マスクの金属が無い
窓の部分ではレーザー光が多結晶シリコンに吸収
され、多結晶シリコンの温度が上昇し第2図の6
で示す部分が結晶化する。即ち、レーザー光の出
力が適当な強度であると多結晶シリコンの温度が
融点付近となり、固相反応で粒径が大型化するか
又は液相化し照射が終ると共に再結晶の課程で単
結晶化等の結晶化が促進される。
The laser beam 5 is irradiated continuously or in a pulsed manner from above the sample selectively covered by the metal mask 4 in this manner. Note that since the entire surface of the sample cannot be annealed at once, the beam diameter of the laser light source is narrowed down with a lens, and the sample is continuously two-dimensionally scanned with laser light 5 to irradiate the entire surface of the sample with the laser light.
Under the arrangement shown in Figure 1, the entire surface of the sample is illuminated with 5 laser beams.
When the laser beam is scanned once or many times, the laser beam is absorbed by the polycrystalline silicon in the window portion of the metal mask where there is no metal, and the temperature of the polycrystalline silicon rises.
The part shown by is crystallized. In other words, when the output of the laser beam is at an appropriate intensity, the temperature of polycrystalline silicon becomes close to its melting point, and the grain size increases through a solid phase reaction, or it becomes a liquid phase, and when the irradiation ends, it becomes a single crystal during the recrystallization process. Crystallization of etc. is promoted.

一方、金属マスク4存在している部分ではレー
ザー光が殆んど反射されるので金属マスク4の下
の多結晶シリコン3は温度があまり上昇せず粒径
も変らない。なお多数回のレーザー光照射を繰返
し行うと部分の多結晶シリコンは粒径が大型化
し、その粒径は数μm乃至数十μm以上に達す
る。
On the other hand, since most of the laser light is reflected in the area where the metal mask 4 is present, the temperature of the polycrystalline silicon 3 under the metal mask 4 does not increase much and the grain size does not change. Note that when the laser beam irradiation is repeated many times, the grain size of the polycrystalline silicon in the portion increases, and the grain size reaches several μm to several tens of μm or more.

第3図に金属マスクを除去した後の断面図を示
す。多結晶シリコンのエツチング速度は結晶方位
と結晶粒径で決まる。エツチング速度の最も速い
結晶方位は(111)面であり以下(110)面、
(100)面の順である。レーザー光でアニールした
領域では(100)面が選択的に形成され、レーザ
ー光を照射しない領域は上記の3種の結晶方位の
混合物でエツチング速度としては(110)面のそ
れと同等の値を示す。また結晶粒径が小さい多結
晶シリコンほどエツチング速度は速くなる。結晶
方位と結晶粒径の両者の相乗効果で結晶粒径が小
さい所謂レーザー光が当たらない領域の多結晶シ
リコンのエツチング速度はレーザー光でアニール
され結晶化した部分6のエツチング速度に比べて
数倍以上速い。
FIG. 3 shows a cross-sectional view after removing the metal mask. The etching rate of polycrystalline silicon is determined by the crystal orientation and crystal grain size. The crystal orientation with the fastest etching rate is the (111) plane;
(100) plane order. In the region annealed with laser light, the (100) plane is selectively formed, and in the region not irradiated with laser light, the etching rate is a mixture of the three types of crystal orientations mentioned above and shows a value equivalent to that of the (110) plane. . Furthermore, the etching rate becomes faster as polycrystalline silicon has a smaller crystal grain size. Due to the synergistic effect of both crystal orientation and crystal grain size, the etching speed of polycrystalline silicon in the so-called laser beam-unexposed region where the crystal grain size is small is several times that of the portion 6 that has been annealed and crystallized by the laser beam. Faster than that.

以上の処理を経て第3図で示すように単結晶化
部分が選択的に形成された試料に対して、次いで
硝酸−弗酸系のエツチング液を用いてエツチング
処理を施す。すでに説明したように、試料中にア
ニールされることなく残存している結晶粒径の細
かい多結晶シリコン3の部分ではエツチング速度
が速く、一方、レーザー光でアニールされ結晶粒
径が大きくなり、結晶化した部分ではエツチング
速度が遅い。したがつて、エツチング処理を一定
時間にわたり施すと、結晶粒径の細かい多結晶シ
リコン3は全てエツチングされ、一方、レーザー
光でアニールされて結晶粒径が大きくなつた結晶
化部分が選択的に残されるところとなり、第4図
に示す構造となる。
The sample in which single crystallized portions have been selectively formed as shown in FIG. 3 through the above processing is then subjected to an etching process using a nitric acid-hydrofluoric acid based etching solution. As already explained, the etching rate is fast in the portion of the polycrystalline silicon 3 with fine crystal grain size that remains in the sample without being annealed, while on the other hand, the crystal grain size becomes larger after being annealed with laser light, and the crystal grain size increases. The etching speed is slow in the hardened areas. Therefore, when the etching process is performed for a certain period of time, all of the polycrystalline silicon 3 with fine crystal grain sizes is etched away, while the crystallized portions where the crystal grain size has become larger due to annealing with laser light are selectively left behind. The structure shown in FIG. 4 is obtained.

次に他の実施例について示す。第5図は多結晶
シリコン3上へ金属マスク4を直接設けることな
く両者間に熱酸化又は化学気相成長でSiO2膜7
を配置した選択アニール用試料の断面図であり、
他は第1図のものと同じである。第5図で示す試
料に対して上記と同様にレーザー光によるアニー
ル処理を施すと、金属マスクに穿設された窓の部
分ではレーザー光がSiO2層7に吸収されること
なく透過してその下部の多結晶シリコン3に吸収
される。
Next, other embodiments will be described. FIG. 5 shows that a SiO 2 film 7 is formed between the polycrystalline silicon 3 by thermal oxidation or chemical vapor deposition without directly providing a metal mask 4 on the polycrystalline silicon 3 .
FIG. 2 is a cross-sectional view of a sample for selective annealing in which
The other parts are the same as those in FIG. When the sample shown in FIG. 5 is annealed with laser light in the same manner as above, the laser light is transmitted through the window portion of the metal mask without being absorbed by the SiO 2 layer 7. It is absorbed by the polycrystalline silicon 3 below.

第6図は、かかるレーザー光照射後の状態を示
す図であり、第2図で示したのと同様にレーザー
光を吸収した部分の多結晶シリコンの粒径が大型
化するか又は再結晶の過程で単結晶化して結晶化
部分が生起する。こののち試料上から金属マスク
4とSiO2膜7を取り除くと第3図に示したのと
同一の構造となり、上述したのと同様の方法で結
晶粒径の大きくなつた結晶化部分6を残すための
エツチング処理を施すことができる。
FIG. 6 is a diagram showing the state after such laser light irradiation, and similarly to the state shown in FIG. In the process, it becomes a single crystal and a crystallized portion is generated. After that, the metal mask 4 and the SiO 2 film 7 are removed from the top of the sample, resulting in the same structure as shown in FIG. 3, and the crystallized portion 6 with increased crystal grain size is left in the same manner as described above. Etching treatment can be performed for this purpose.

上述のように本実施例によればレーザアニール
により試料上の一部の多結晶シリコンを結晶化
し、この結晶化した部分を選択的に残すことが極
めて容易であり、しかも、多結晶シリコンを選択
的にレーザアニールするあたり、多結晶シリコン
の上部に金属マスクを設けているのでアニールす
る領域の位置精度、寸法精度は金属マスクのパタ
ーン位置精度やパターン寸法精度でほとんど決ま
り、その精度はすこぶる高いものとなる。したが
つて、半導体集積回路内に作り込まれる回路要素
の誘電体分離や多層化がマスクを用いたレーザア
ニールを駆使して可能となる。また、アニール位
置を決めるレーザー光の機械走査部の精度は
100μm程度で十分であり、特に高度な精度を必
要とせずこの機械走査部が簡単になる。又レーザ
ー・ビーム径もアニールに十分なエネルギーを持
つていればよく、アニール領域の寸法に制約され
ることはない。このため、十分太いビームを使う
こともでき、従つてレーザー光の集光に関しても
光学系が簡単になる。また、アニールにより結晶
粒径が大きくなつた結晶化部分を選択的に残し、
それ以外の粒径が小さい多結晶シリコンを取り除
く処理が結晶粒径の大小に基づくエツチング速度
の差を利用してなされているためにエツチングの
際にレジスト・マスク等を使わずにレーザー光が
照射された領域を自己整合的に形成できる利点も
具備している。
As described above, according to this example, it is extremely easy to crystallize part of the polycrystalline silicon on the sample by laser annealing and selectively leave this crystallized part. During laser annealing, a metal mask is provided on top of the polycrystalline silicon, so the positional and dimensional accuracy of the annealed area is determined mostly by the pattern positional and dimensional accuracy of the metal mask, and the accuracy is extremely high. becomes. Therefore, dielectric separation and multilayering of circuit elements built into a semiconductor integrated circuit become possible by making full use of laser annealing using a mask. In addition, the accuracy of the mechanical scanning part of the laser beam that determines the annealing position is
Approximately 100 μm is sufficient, and this mechanical scanning section becomes simple without requiring particularly high precision. Furthermore, the diameter of the laser beam only needs to have sufficient energy for annealing, and is not limited by the dimensions of the annealing region. Therefore, a sufficiently thick beam can be used, and the optical system for focusing the laser beam can therefore be simplified. In addition, we selectively leave crystallized portions where the crystal grain size has increased due to annealing,
The process of removing polycrystalline silicon with other small grain sizes takes advantage of the difference in etching speed based on the size of the crystal grains, so laser light is irradiated without using a resist mask etc. during etching. It also has the advantage of being able to form areas in a self-aligned manner.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第5図は本発明の実施例の方法に
おけるレーザアニール前の試料の断面図、第2図
および第6図は同方法におけるレーザアニール後
の試料の断面図、第3図は同方法における多結晶
シリコンをエツチングする以前の試料の断面図、
第4図は同方法における多結晶シリコンをエツチ
ングした後の試料の断面図である。 1……下地基板、2……SiO2膜またはSi3N4
膜、3……多結晶シリコン膜、4……金属マス
ク、5……レーザー光、6……結晶粒径の大型化
もしくは単結晶化した部分、7……SiO2膜。
1 and 5 are cross-sectional views of the sample before laser annealing in the method of the embodiment of the present invention, FIGS. 2 and 6 are cross-sectional views of the sample after laser annealing in the same method, and FIG. 3 is the same. Cross-sectional view of the sample before etching polycrystalline silicon in the method,
FIG. 4 is a cross-sectional view of a sample after etching polycrystalline silicon in the same method. 1... Base substrate, 2... SiO 2 film or Si 3 N 4
Film, 3... Polycrystalline silicon film, 4... Metal mask, 5... Laser light, 6... Portion with increased crystal grain size or single crystal, 7... SiO 2 film.

Claims (1)

【特許請求の範囲】 1 下地基板上に形成した多結晶半導体層上をレ
ーザー光の透過を阻止する材料からなるマスクで
選択的に覆つたのち、前記レーザー光を照射し、
前記マスクで覆われることのない多結晶半導体層
部分をアニールして結晶粒径の大型化もしくは単
結晶化した結晶化部分に変換したのち、前記マス
クを除去して全面を露呈させ、次いで、前記全面
にエツチング処理を施し非結晶化部分を選択的に
除去することを特徴とする半導体装置の製造方
法。 2 マスクの材料が金、アルミニウム、クロム、
金属酸化物もしくは金属ケイ化物のいずれかであ
ることを特徴とする特許請求の範囲第1項に記載
の半導体装置の製造方法。 3 多結晶半導体層とマスクとの間にレーザー光
を透過する被膜が設けられていることを特徴とす
る特許請求の範囲第1項に記載の半導体装置の製
造方法。
[Claims] 1. After selectively covering a polycrystalline semiconductor layer formed on a base substrate with a mask made of a material that blocks transmission of laser light, irradiating the polycrystalline semiconductor layer with the laser light,
After annealing the portion of the polycrystalline semiconductor layer that is not covered by the mask to increase the crystal grain size or convert it into a single crystallized portion, the mask is removed to expose the entire surface, and then the mask is removed to expose the entire surface. 1. A method of manufacturing a semiconductor device, characterized by etching the entire surface and selectively removing amorphous portions. 2 The material of the mask is gold, aluminum, chrome,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is made of either a metal oxide or a metal silicide. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a coating that transmits laser light is provided between the polycrystalline semiconductor layer and the mask.
JP56005284A 1981-01-16 1981-01-16 Manufacture of semiconductor device Granted JPS57118648A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56005284A JPS57118648A (en) 1981-01-16 1981-01-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56005284A JPS57118648A (en) 1981-01-16 1981-01-16 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS57118648A JPS57118648A (en) 1982-07-23
JPH0154856B2 true JPH0154856B2 (en) 1989-11-21

Family

ID=11606937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56005284A Granted JPS57118648A (en) 1981-01-16 1981-01-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57118648A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07105338B2 (en) * 1985-08-07 1995-11-13 日本電気株式会社 Method for manufacturing semiconductor device
JP2653035B2 (en) * 1988-05-28 1997-09-10 高エネルギー物理学研究所長 Method of forming crystal growth nuclei or etching nuclei by photons

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53104156A (en) * 1977-02-23 1978-09-11 Hitachi Ltd Manufacture for semiconductor device

Also Published As

Publication number Publication date
JPS57118648A (en) 1982-07-23

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