JPH0159999U - - Google Patents
Info
- Publication number
- JPH0159999U JPH0159999U JP15424287U JP15424287U JPH0159999U JP H0159999 U JPH0159999 U JP H0159999U JP 15424287 U JP15424287 U JP 15424287U JP 15424287 U JP15424287 U JP 15424287U JP H0159999 U JPH0159999 U JP H0159999U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- signal
- output
- sample
- timing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Digital Computer Display Output (AREA)
Description
第１図は本考案の一実施例を示すブロツク図で
ある。
１……サンプルホールド回路、２……Ａ／Ｄコ
ンバータ、３……記憶部、４……Ｄ／Ａコンバー
タ、５……入力タイミング制御部、６……出力タ
イミング制御部、７……入出力制御部。
FIG. 1 is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Sample hold circuit, 2... A/D converter, 3... Storage section, 4... D/A converter, 5... Input timing control section, 6... Output timing control section, 7... Input/output control section.
Claims (1)
かを切換える入出力制御部と、入力信号格納時に
、入力信号をある時間間隔で標本化するサンプル
ホールド回路と、前記サンプルホールド回路の出
力サンプル電圧をある時間々隔でデジタル値に変
換するＡ／Ｄコンバータと、前記Ａ／Ｄコンバー
タの出力デジタル値をある時間々隔で格納する記
憶部と、前記サンプルホールド回路のサンプルタ
イミング信号および前記Ａ／Ｄコンバータの変換
タイミング信号および前記記憶部の格納タイミン
グ信号を順次出力する入力タイミング制御部と、
格納信号出力時に、前記記憶部からの出力デジタ
ル値をアナログ値に変換するＤ／Ａコンバータと
、前記記憶部の出力タイミング信号および前記Ｄ
／Ａコンバータの変換タイミング信号を順次出力
する出力タイミング制御部とを含むことを特徴と
する信号再生装置。 an input/output control unit that switches between storing the input signal and outputting the stored signal; a sample hold circuit that samples the input signal at certain time intervals when storing the input signal; and an output sample voltage of the sample hold circuit. an A/D converter that converts into digital values at certain time intervals; a storage unit that stores output digital values of the A/D converter at certain time intervals; and a sample timing signal of the sample and hold circuit and the A/D converter. an input timing control unit that sequentially outputs a conversion timing signal of the converter and a storage timing signal of the storage unit;
A D/A converter that converts an output digital value from the storage section into an analog value when outputting a stored signal, and an output timing signal of the storage section and the D/A converter.
1. A signal reproducing device comprising: an output timing control section that sequentially outputs conversion timing signals of the /A converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15424287U JPH0159999U (en) | 1987-10-07 | 1987-10-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15424287U JPH0159999U (en) | 1987-10-07 | 1987-10-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0159999U true JPH0159999U (en) | 1989-04-14 |
Family
ID=31430803
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15424287U Pending JPH0159999U (en) | 1987-10-07 | 1987-10-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0159999U (en) |
-
1987
- 1987-10-07 JP JP15424287U patent/JPH0159999U/ja active Pending
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