JPH0160288U - - Google Patents

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Publication number
JPH0160288U
JPH0160288U JP15703187U JP15703187U JPH0160288U JP H0160288 U JPH0160288 U JP H0160288U JP 15703187 U JP15703187 U JP 15703187U JP 15703187 U JP15703187 U JP 15703187U JP H0160288 U JPH0160288 U JP H0160288U
Authority
JP
Japan
Prior art keywords
time chart
sound sources
sound source
generation circuit
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15703187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15703187U priority Critical patent/JPH0160288U/ja
Publication of JPH0160288U publication Critical patent/JPH0160288U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例に係る電子楽器の全
体構成図、第2図は音源LSIのブロツク図、第
3図は音源LSIのインタフエース/制御部とエ
ンベロープ/キーコード生成回路による外部RA
M占有の割振を示すタイムチヤート、第4図はC
PUから音源LSIのインタフエース/制御部に
送られるデータと書込制御信号のタイムチヤート
、第5図は楽音制御信号生成のための低速演算周
期と波形生成のための高速演算周期とを示すタイ
ムチヤート、第6図はインタフエース/制御部の
詳細図、第7図はタイミング信号発生回路が発生
する信号の一部のタイムチヤート、第8図はタイ
ミング信号発生回路が発生するその他の信号のタ
イムチヤート、第9図はタイミング信号発生回路
の詳細図、第10図はインストラクシヨンデコー
ダの詳細図、第11図は1バイト長のデータの転
送インストラクシヨンに対するインタフエース/
制御部の動作を示すタイムチヤート、第12図は
2バイト長のデータの転送インストラクシヨンに
対するインタフエース/制御部の動作を示すタイ
ムチヤート、第13図はフラグセツトのインスト
ラクシヨンに対するインタフエース/制御部の動
作を示すタイムチヤート、第14図はキーオフの
インストラクシヨンに対するインタフエース/制
御部の動作を示すタイムチヤート、第15図は楽
音の生成を制御するためのオペレーシヨンコード
のインストラクシヨンまたは発音チヤンネルに対
する出力ラインを割り当てるインストラクシヨン
に対するインタフエース/制御部の動作を示すタ
イムチヤート、第16図はモードの設定インスト
ラクシヨンに対するインタフエース/制御部の動
作を示すタイムチヤート、第17図は波形生成回
路の詳細図、第18図は波形生成回路において、
オペレーシヨンコードにより歪みの生じる正弦波
のセツトを示す波形図、第19図は波形生成回路
のタイムチヤート、第20図はOL制御回路の詳
細図、第21図は出力レジスタの詳細図、第22
図はマスター音源における波形生成回路の出力部
のタイムチヤート、第23図はスレーブ音源にお
ける波形生成回路の出力部のタイムチヤート、第
24図は共通のDA変換部における各出力ライン
のタイムチヤート、第25図はサウンドシステム
の構成図である。 3……CPU、6,8……音源LSI、10…
…サウンドシステム、15……波形生成回路、1
6……OL制御回路、389……DAC、390
……アナログスイツチ。
Fig. 1 is an overall configuration diagram of an electronic musical instrument according to an embodiment of the present invention, Fig. 2 is a block diagram of the sound source LSI, and Fig. 3 is an external structure of the sound source LSI's interface/control section and envelope/key code generation circuit. R.A.
Time chart showing allocation of M occupancy, Figure 4 is C
A time chart of data and write control signals sent from the PU to the interface/control unit of the sound source LSI. Figure 5 is a time chart showing the low-speed calculation cycle for generating musical tone control signals and the high-speed calculation cycle for waveform generation. Figure 6 is a detailed diagram of the interface/control unit, Figure 7 is a time chart of some of the signals generated by the timing signal generation circuit, and Figure 8 is the time chart of other signals generated by the timing signal generation circuit. Figure 9 is a detailed diagram of the timing signal generation circuit, Figure 10 is a detailed diagram of the instruction decoder, and Figure 11 is an interface diagram for a 1-byte length data transfer instruction.
A time chart showing the operation of the control unit. Figure 12 is a time chart showing the operation of the interface/control unit in response to a 2-byte data transfer instruction. Figure 13 is a time chart showing the operation of the interface/control unit in response to a flag set instruction. FIG. 14 is a time chart showing the operation of the interface/control section in response to a key-off instruction. FIG. 15 is an operation code instruction for controlling the generation of musical tones. FIG. 16 is a time chart showing the operation of the interface/control unit in response to an instruction to allocate an output line to a sound channel. FIG. 16 is a time chart showing the operation of the interface/control unit in response to a mode setting instruction. FIG. A detailed diagram of the waveform generation circuit, FIG. 18, shows the waveform generation circuit,
A waveform diagram showing a set of sine waves that are distorted by operation codes, Figure 19 is a time chart of the waveform generation circuit, Figure 20 is a detailed diagram of the OL control circuit, Figure 21 is a detailed diagram of the output register, and Figure 22 is a detailed diagram of the OL control circuit.
The figure is a time chart of the output section of the waveform generation circuit in the master sound source, FIG. 23 is a time chart of the output section of the waveform generation circuit in the slave sound source, and FIG. FIG. 25 is a configuration diagram of the sound system. 3... CPU, 6, 8... Sound source LSI, 10...
...Sound system, 15...Waveform generation circuit, 1
6...OL control circuit, 389...DAC, 390
...Analog switch.

Claims (1)

【実用新案登録請求の範囲】 互いに非同期で動作する複数の音源6,8が生
成した各楽音を音響装置10に出力する電子楽器
の出力装置において、 上記複数の音源と上記音響装置との間に設けら
れた共通のD/A変換回路手段389,390と
、 上記複数の音源の1つをマスター音源とし、こ
のマスター音源が発生するタイミング信号に従つ
て、上記複数の音源が生成した各楽音を時分割で
取り出し、上記D/A変換回路手段においてアナ
ログ信号に変換させる時分割変換制御手段16と
、 を有することを特徴とする電子楽器の出力装置
[Claims for Utility Model Registration] In an output device for an electronic musical instrument that outputs musical tones generated by a plurality of sound sources 6 and 8 that operate asynchronously to each other to an audio device 10, there is provided a device between the plurality of sound sources and the audio device. Common D/A conversion circuit means 389, 390 provided, and one of the plurality of sound sources as a master sound source, and each musical tone generated by the plurality of sound sources in accordance with a timing signal generated by the master sound source. An output device for an electronic musical instrument, comprising: time division conversion control means 16 for extracting data in a time division manner and converting it into an analog signal in the D/A conversion circuit means.
JP15703187U 1987-10-14 1987-10-14 Pending JPH0160288U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15703187U JPH0160288U (en) 1987-10-14 1987-10-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15703187U JPH0160288U (en) 1987-10-14 1987-10-14

Publications (1)

Publication Number Publication Date
JPH0160288U true JPH0160288U (en) 1989-04-17

Family

ID=31436110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15703187U Pending JPH0160288U (en) 1987-10-14 1987-10-14

Country Status (1)

Country Link
JP (1) JPH0160288U (en)

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