JPH0164226U - - Google Patents

Info

Publication number
JPH0164226U
JPH0164226U JP1987159566U JP15956687U JPH0164226U JP H0164226 U JPH0164226 U JP H0164226U JP 1987159566 U JP1987159566 U JP 1987159566U JP 15956687 U JP15956687 U JP 15956687U JP H0164226 U JPH0164226 U JP H0164226U
Authority
JP
Japan
Prior art keywords
pulse width
signal
modulated signal
demodulation circuit
isolator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987159566U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987159566U priority Critical patent/JPH0164226U/ja
Publication of JPH0164226U publication Critical patent/JPH0164226U/ja
Pending legal-status Critical Current

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  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る復調回路の一実施例の接
続図、第2図は第1図の動作を説明する為の波形
図、第3図は本考案に係る復調回路の他の実施例
の接続図、第4図は従来のこの種の復調回路の一
例の接続図である。 10……パルス幅変調回路、20……アイソレ
ータ、30……復調回路、40……出力端子、5
0……パルス検出回路、51……リトリガラブル
・モノステーブル・マルチバイブレータ、53,
54……スイツチ。
Fig. 1 is a connection diagram of one embodiment of the demodulation circuit according to the present invention, Fig. 2 is a waveform diagram for explaining the operation of Fig. 1, and Fig. 3 is another embodiment of the demodulation circuit according to the present invention. FIG. 4 is a connection diagram of an example of a conventional demodulation circuit of this type. 10... Pulse width modulation circuit, 20... Isolator, 30... Demodulation circuit, 40... Output terminal, 5
0... Pulse detection circuit, 51... Retriggerable monostable multivibrator, 53,
54...Switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号をパルス幅信号に変調しそのパルス幅
変調信号をアイソレータを介してフイルタに加え
て復調するようにした復調回路において、前記ア
イソレータの出力をトリガ入力としその出力パル
ス幅が前記パルス幅変調信号の1周期より長く選
ばれたリトリガラブル・モノステーブル・マルチ
バイブレータと、このリトリガラブル・モノステ
ーブル・マルチバイブレータの出力により駆動さ
れ前記フイルタの出力端に接続されたスイツチを
設け、このスイツチを介して復調信号を取出すよ
うに構成したパルス幅変調信号の復調回路。
In a demodulation circuit that modulates an input signal into a pulse width signal and demodulates the pulse width modulated signal by applying it to a filter via an isolator, the output of the isolator is used as a trigger input, and the output pulse width is used as the pulse width modulated signal. A retriggerable monostable multivibrator selected for a period longer than one period of A demodulation circuit for a pulse width modulated signal configured to extract the pulse width modulation signal.
JP1987159566U 1987-10-19 1987-10-19 Pending JPH0164226U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987159566U JPH0164226U (en) 1987-10-19 1987-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987159566U JPH0164226U (en) 1987-10-19 1987-10-19

Publications (1)

Publication Number Publication Date
JPH0164226U true JPH0164226U (en) 1989-04-25

Family

ID=31440892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987159566U Pending JPH0164226U (en) 1987-10-19 1987-10-19

Country Status (1)

Country Link
JP (1) JPH0164226U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733656U (en) * 1980-08-05 1982-02-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733656U (en) * 1980-08-05 1982-02-22

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