JPH0165512U - - Google Patents
Info
- Publication number
- JPH0165512U JPH0165512U JP1987160122U JP16012287U JPH0165512U JP H0165512 U JPH0165512 U JP H0165512U JP 1987160122 U JP1987160122 U JP 1987160122U JP 16012287 U JP16012287 U JP 16012287U JP H0165512 U JPH0165512 U JP H0165512U
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- fet
- recess
- electrode
- conductor pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 12
- 230000005669 field effect Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000003466 welding Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Microwave Amplifiers (AREA)
Description
第１図は本考案に係る増幅器の一実施例のＦＥ
Ｔを装備している部分の平面図、第２図は第１図
中の−部分の断面図、第３図は第１図中の
−部分の断面図、第４図、第５図、第６図はそ
れぞれ従来の異なる増幅器の構成図である。
１……配線基板、２……ＦＥＴ、３……シール
、７……凹部、４，５……第１、第２のマイクロ
ストリツプライン、６……アース導体。
FIG. 1 shows an FE of an embodiment of the amplifier according to the present invention.
A plan view of the part equipped with the T, Fig. 2 is a sectional view of the - part in Fig. 1, Fig. 3 is a sectional view of the - part in Fig. 1, Figs. FIG. 6 is a block diagram of different conventional amplifiers. DESCRIPTION OF SYMBOLS 1... Wiring board, 2... FET, 3... Seal, 7... Recessed part, 4, 5... First and second microstrip lines, 6... Earth conductor.
Claims (1)
を有し背面側にアース導体を配設してなる配線基
板に、上記アース導体側に開口を有する凹部を形
成し、該凹部の表面に第１、第２、第３の導体パ
ターンを形成し、該凹部内に電界効果トランジス
タ（ＦＥＴ）を、該ＦＥＴの第１電極を前記第１
導体パターンに、該ＦＥＴの第２電極を前記第２
導体パターンに、更にＦＥＴの第３電極を前記第
３導体パターンにそれぞれ接続して設置し、前記
第１のマイクロストリツプラインと第１導体パタ
ーンとを、又、前記第２のマイクロストリツプラ
インと第２導体パターンとをそれぞれ前記配線基
板の第１、第２スルーホールを介して接続し、前
記アース導体と前記第３導体とを接続し、前記配
線基板上の前記アース導体に、前記凹部の開口を
封止するシールを溶接してなるマイクロ波半導体
増幅器。 A recess having an opening on the ground conductor side is formed in a wiring board having first and second microstrip lines on the surface and a ground conductor on the back side, and a first microstrip line is formed on the surface of the recess. , second and third conductor patterns are formed, a field effect transistor (FET) is placed in the recess, and a first electrode of the FET is connected to the first electrode.
The second electrode of the FET is attached to the conductor pattern.
Further, a third electrode of an FET is connected to the third conductor pattern and installed in the conductor pattern, and the first microstrip line and the first conductor pattern are connected to the second microstrip line. and a second conductor pattern through first and second through holes of the wiring board, respectively, connecting the ground conductor and the third conductor, and connecting the ground conductor on the wiring board to the recess. A microwave semiconductor amplifier made by welding a seal to seal the opening of the
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987160122U JPH0165512U (en) | 1987-10-20 | 1987-10-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987160122U JPH0165512U (en) | 1987-10-20 | 1987-10-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0165512U true JPH0165512U (en) | 1989-04-26 |
Family
ID=31441911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987160122U Pending JPH0165512U (en) | 1987-10-20 | 1987-10-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0165512U (en) |
-
1987
- 1987-10-20 JP JP1987160122U patent/JPH0165512U/ja active Pending