JPH0165521U - - Google Patents
Info
- Publication number
- JPH0165521U JPH0165521U JP1987160448U JP16044887U JPH0165521U JP H0165521 U JPH0165521 U JP H0165521U JP 1987160448 U JP1987160448 U JP 1987160448U JP 16044887 U JP16044887 U JP 16044887U JP H0165521 U JPH0165521 U JP H0165521U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- reset
- voltage
- threshold
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Electronic Switches (AREA)
Description
第1図から第4図までが本考案に関し、内第1
図は本考案によるリセツト回路の原理回路図、第
2図はその主な信号の動作波形図、第3図および
第4図は本考案のそれぞれ異なる実施例の回路図
である。第5図以降は従来技術に関し、第5図お
よび第6図は従来のリセツト回路の回路図、第7
図はその主な信号の動作波形図である。図におい
て、
1:リセツト回路、2:リセツト対象回路、1
0:リセツトトランジスタ、11:抵抗、20:
しきい値回路ないしはしきい値回路としての電流
ミラー回路、21:トランジスタ、22:抵抗、
23:ダイオード、24,25:抵抗、26:電
流ミラー回路の基準トランジスタ、27:電流ミ
ラー回路の従動トランジスタ、30:リセツトト
ランジスタ、31:抵抗、40:しきい値回路な
いしはしきい値回路としての電流ミラー回路、4
1:トランジスタ、42:抵抗、43:ツエナダ
イオード、44,45:抵抗、46:電流ミラー
回路の基準トランジスタ、47:電流ミラー回路
の従動トランジスタ、F:浮動状態、R1,R2
:抵抗値、RS:リセツト信号、t0〜t7:時
刻、V1:第1の電圧、V2:第2の電圧、v:
リセツトトランジスタのベース・エミツタ間電圧
、vb:しきい値回路の出力トランジスタのベー
ス・エミツタ間電圧ないしは電流ミラー回路の基
準トランジスタのベース・エミツタ間電圧、vd
:ダイオードの順方向電圧、Vt:しきい値回路
の動作しきい値、vz:ツエナダイオードのツエ
ナ電圧、である。
Figures 1 to 4 relate to the present invention, of which Figure 1
2 is a diagram showing the principle of the reset circuit according to the present invention, FIG. 2 is an operational waveform diagram of its main signals, and FIGS. 3 and 4 are circuit diagrams of different embodiments of the present invention. Figure 5 and subsequent figures relate to the prior art, Figures 5 and 6 are circuit diagrams of conventional reset circuits, and Figure 7
The figure is an operation waveform diagram of the main signals. In the figure, 1: reset circuit, 2: reset target circuit, 1
0: Reset transistor, 11: Resistor, 20:
Threshold circuit or current mirror circuit as threshold circuit, 21: transistor, 22: resistor,
23: Diode, 24, 25: Resistor, 26: Reference transistor of current mirror circuit, 27: Driven transistor of current mirror circuit, 30: Reset transistor, 31: Resistor, 40: Threshold circuit or threshold circuit Current mirror circuit, 4
1: Transistor, 42: Resistor, 43: Zener diode, 44, 45: Resistor, 46: Reference transistor of current mirror circuit, 47: Driven transistor of current mirror circuit, F: Floating state, R1, R2
: resistance value, RS: reset signal, t0 to t7: time, V1: first voltage, V2: second voltage, v:
Base-emitter voltage of the reset transistor, vb: Base-emitter voltage of the output transistor of the threshold circuit or base-emitter voltage of the reference transistor of the current mirror circuit, vd
: forward voltage of the diode, Vt: operating threshold of the threshold circuit, vz: Zener voltage of the Zener diode.
Claims (1)
たときに第2の電圧下で動作する回路をリセツト
するリセツト回路であつて、第2の電圧を抵抗を
介してベース・エミツタ間に受けコレクタの電位
がリセツト信号として導出されるリセツトトラン
ジスタと、第1の電圧を受けその値がしきい値以
上のときに動作してリセツトトランジスタのベー
ス電流を側路してそのコレクタ電位としてのリセ
ツト信号を浮動させるしきい値回路とを備えてな
るリセツト回路。 2 実用新案登録請求の範囲第1項に記載の回路
において、しきい値回路が第1の電圧を抵抗およ
びしきい値調整素子を介してベース・エミツタ間
に受け、コレクタがリセツトトランジスタのベー
スに接続されたトランジスタを含むことを特徴と
するリセツト回路。 3 実用新案登録請求の範囲第1項に記載の回路
において、しきい値回路が第1の電圧を抵抗を介
して基準電流側トランジスタに受け従動電流側ト
ランジスタのコレクタがリセツトトランジスタの
ベースに接続された電流ミラー回路であることを
特徴とするリセツト回路。[Claims for Utility Model Registration] 1. A reset circuit that resets a circuit operating under a second voltage when the value of the first voltage falls below a predetermined threshold, the reset circuit comprising: A reset transistor receives a first voltage between its base and emitter through a resistor and the collector potential is derived as a reset signal, and a reset transistor receives a first voltage and operates when the value is above a threshold value to control the base current of the reset transistor. 1. A reset circuit comprising a threshold circuit which bypasses the reset signal and floats the reset signal as its collector potential. 2. In the circuit according to claim 1 of the utility model registration, the threshold circuit receives the first voltage between the base and emitter via the resistor and the threshold adjustment element, and the collector is connected to the base of the reset transistor. A reset circuit comprising connected transistors. 3 Utility Model Registration In the circuit described in claim 1, the threshold circuit receives the first voltage through a resistor to the reference current side transistor, and the collector of the driven current side transistor is connected to the base of the reset transistor. A reset circuit characterized in that it is a current mirror circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987160448U JPH0165521U (en) | 1987-10-20 | 1987-10-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987160448U JPH0165521U (en) | 1987-10-20 | 1987-10-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0165521U true JPH0165521U (en) | 1989-04-26 |
Family
ID=31442524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987160448U Pending JPH0165521U (en) | 1987-10-20 | 1987-10-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0165521U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04192917A (en) * | 1990-11-27 | 1992-07-13 | Sharp Corp | Reset signal generating circuit |
-
1987
- 1987-10-20 JP JP1987160448U patent/JPH0165521U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04192917A (en) * | 1990-11-27 | 1992-07-13 | Sharp Corp | Reset signal generating circuit |
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