JPH0165535U - - Google Patents

Info

Publication number
JPH0165535U
JPH0165535U JP1987161785U JP16178587U JPH0165535U JP H0165535 U JPH0165535 U JP H0165535U JP 1987161785 U JP1987161785 U JP 1987161785U JP 16178587 U JP16178587 U JP 16178587U JP H0165535 U JPH0165535 U JP H0165535U
Authority
JP
Japan
Prior art keywords
analog signal
transmission
station
circuit
input end
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987161785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987161785U priority Critical patent/JPH0165535U/ja
Publication of JPH0165535U publication Critical patent/JPH0165535U/ja
Pending legal-status Critical Current

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Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるデータ伝送用モデムの交
流折返し回路の一実施例を示すブロツク回路図、
第2図は従来のデータ伝送用モデムの交流折返し
回路を示すブロツク回路図、第3図は第1図実施
例における各部信号を模式的に示すタイミング図
である。 1……入力端子、2……送信機、3,9……切
替器、4……送信回路網、5……送信端子、6…
…出力端子、7……受信機、8……自動利得制御
回路、10……受信回路網、11……受信端子、
12……受信信号検出回路、13……アナログス
イツチ。
FIG. 1 is a block circuit diagram showing an embodiment of an AC loop circuit of a data transmission modem according to the present invention;
FIG. 2 is a block circuit diagram showing an AC return circuit of a conventional data transmission modem, and FIG. 3 is a timing diagram schematically showing signals of various parts in the embodiment shown in FIG. 1...Input terminal, 2...Transmitter, 3, 9...Switcher, 4...Transmission circuit network, 5...Transmission terminal, 6...
...output terminal, 7...receiver, 8...automatic gain control circuit, 10...receiving circuit network, 11...receiving terminal,
12... Received signal detection circuit, 13... Analog switch.

Claims (1)

【実用新案登録請求の範囲】 直流のデジタル信号を交流のアナログ信号に変
換し、これを増幅して送出する送信機と;前記ア
ナログ信号には不要な帯域外の雑音を取り除く送
信フイルタ、及び前記アナログ信号が伝送される
伝送路の振幅歪と遅延歪を等化する送信イコライ
ザ、並びに前記送出されるアナログ信号のレベル
を調整するレベル調整器から成り、前記送信機が
送出するアナログ信号を受けてこれを通信回線に
送信する送信回路網と;相手局から送信される交
流のアナログ信号には不要な帯域外の雑音を取り
除く受信フイルタ、及びこの交流のアナログ信号
が伝送される伝送路の振幅歪と遅延歪を等化する
受信イコライザから成り、相手局から送信される
交流のアナログ信号を受けてこれを出力する受信
回路網と;前記受信回路網から出力される交流の
アナログ信号を受けてレベルを制御して出力する
自動利得制御回路と;相手局との通信時において
は、前記送信機の出力端を前記送信回路網の入力
端に接続し、障害探索のための交流折返し試験の
場合には、前記送信機の出力端を前記受信機の入
力端に接続するように切り替える第1の切替器と
;相手局との通信時においては、前記自動利得制
御回路の出力端を前記受信機の入力端に接続し、
障害探索のための交流折返し試験の場合は、前記
自動利得制御回路の出力端を前記送信回路網の入
力端に接続する第2の切替器とから成り、相手局
との通信時には4線式伝送路でデータ伝送を行い
、障害探索のための交流折返し試験の場合は、相
手局から送信された交流のアナログ信号を折り返
し相手局に返送すると共に、前記送信機が送出す
る交流のアナログ信号を前記受信機に入力するデ
ータ伝送用モデムの交流折返し回路において; 前記送信回路網の入力端と前記第2の切替器と
の間に挿入され、前記第2の切替器と前記送信回
路網の入力端との接続の開閉を行うアナログスイ
ツチと;前記受信回路網の出力レベルが所定値を
超えてから所定時間経過して前記アナログスイツ
チを閉にする受信信号検出回路とを備え、前記所
定時間は前記自動利得制御回路が前記アナログ信
号を受け始めてから出力レベルを安定化させるま
での時間またはこの時間よりやや長い時間に設定
してあることを特徴とするデータ伝送用モデムの
交流折返し回路。
[Claims for Utility Model Registration] A transmitter that converts a DC digital signal into an AC analog signal, amplifies it, and transmits it; a transmission filter that removes unnecessary out-of-band noise from the analog signal; It consists of a transmission equalizer that equalizes the amplitude distortion and delay distortion of the transmission path on which the analog signal is transmitted, and a level adjuster that adjusts the level of the analog signal sent out, and receives the analog signal sent out by the transmitter. A transmitting circuit network that transmits this to a communication line; a receiving filter that removes unnecessary out-of-band noise from the AC analog signal transmitted from the other station; and amplitude distortion of the transmission line through which this AC analog signal is transmitted. and a reception equalizer that equalizes delay distortion, and receives an AC analog signal transmitted from the other station and outputs it; and a reception circuit network that receives the AC analog signal output from the reception circuit network and outputs it; an automatic gain control circuit that controls and outputs; when communicating with a partner station, the output end of the transmitter is connected to the input end of the transmitting circuit network; a first switch that connects the output end of the transmitter to the input end of the receiver; when communicating with a partner station, connects the output end of the automatic gain control circuit to the input end of the receiver; Connect to the input end,
In the case of an AC loopback test for troubleshooting, it consists of a second switch that connects the output end of the automatic gain control circuit to the input end of the transmission circuit network, and a four-wire transmission when communicating with a partner station. In the case of an AC loopback test for troubleshooting data transmission over a network, the AC analog signal sent from the other station is looped back to the other station, and the AC analog signal sent out by the transmitter is sent back to the other station. In an AC return circuit of a data transmission modem input to a receiver; inserted between an input end of the transmission circuit network and the second switch, and connected between the second switch and the input end of the transmission circuit network; an analog switch that opens and closes the connection to the receiving circuit; and a received signal detection circuit that closes the analog switch after a predetermined period of time has elapsed since the output level of the receiving circuit network exceeds a predetermined value; An alternating current return circuit for a data transmission modem, characterized in that the automatic gain control circuit is set to the time from when it starts receiving the analog signal until the output level is stabilized, or to a time slightly longer than this time.
JP1987161785U 1987-10-21 1987-10-21 Pending JPH0165535U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987161785U JPH0165535U (en) 1987-10-21 1987-10-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987161785U JPH0165535U (en) 1987-10-21 1987-10-21

Publications (1)

Publication Number Publication Date
JPH0165535U true JPH0165535U (en) 1989-04-26

Family

ID=31445028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987161785U Pending JPH0165535U (en) 1987-10-21 1987-10-21

Country Status (1)

Country Link
JP (1) JPH0165535U (en)

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