JPH0174552U - - Google Patents

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Publication number
JPH0174552U
JPH0174552U JP1987169198U JP16919887U JPH0174552U JP H0174552 U JPH0174552 U JP H0174552U JP 1987169198 U JP1987169198 U JP 1987169198U JP 16919887 U JP16919887 U JP 16919887U JP H0174552 U JPH0174552 U JP H0174552U
Authority
JP
Japan
Prior art keywords
circuit
echo
ultrasonic
synchronization
scan gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987169198U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987169198U priority Critical patent/JPH0174552U/ja
Publication of JPH0174552U publication Critical patent/JPH0174552U/ja
Pending legal-status Critical Current

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Landscapes

  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す図、第2図
はこの考案による超音波探傷装置の送信信号、ス
キヤンゲート、受信エコー及び液晶表示を示す図
、第3図は従来の超音波探傷装置を示す図、第4
図、第5図は従来装置の送信信号、スキヤンゲー
ト、受信エコー及び液晶表示を示す図であり、図
において1は試験体、2は溶接部、3は探触子、
4は欠陥、5は接触媒質、6は超音波、7はケー
ブル、8は送受信回路、9は基準クロツク発生回
路、10はエコー高さ測定回路、11はスキヤン
ゲート発生回路、12は記憶回路、13は比較回
路、14はスキヤンゲートアドレス信号、15は
シリアルデータ変換回路、16は液晶表示器、1
7は今回エコー高さデータ、18はビジー信号、
19は前回エコー高さデータ、20は書き込みパ
ルス、21はラツチパルス、22はエコー高さ表
示データ、23は受信エコー、40は送信パルス
、41は送信信号、42はビーム路程を示す目盛
、43a,43b,43c、43s,43t,4
3u及び43zはスキヤンゲート、44a,44
b,44cは液晶表示された送信エコー、44s
は液晶表示された欠陥エコー、45は欠陥エコー
である。なお、各図中同一符号は同一又は相当部
分を示す。
Fig. 1 is a diagram showing an embodiment of this invention, Fig. 2 is a diagram showing a transmission signal, scan gate, received echo, and liquid crystal display of the ultrasonic flaw detection device according to this invention, and Fig. 3 is a diagram showing a conventional ultrasonic flaw detection device. Diagram showing the device, No. 4
Figure 5 shows the transmission signal, scan gate, received echo, and liquid crystal display of the conventional device. In the figure, 1 is the test object, 2 is the welded part, 3 is the probe,
4 is a defect, 5 is a couplant, 6 is an ultrasonic wave, 7 is a cable, 8 is a transmission/reception circuit, 9 is a reference clock generation circuit, 10 is an echo height measurement circuit, 11 is a scan gate generation circuit, 12 is a memory circuit, 13 is a comparison circuit, 14 is a scan gate address signal, 15 is a serial data conversion circuit, 16 is a liquid crystal display, 1
7 is the current echo height data, 18 is the busy signal,
19 is previous echo height data, 20 is a write pulse, 21 is a latch pulse, 22 is echo height display data, 23 is a received echo, 40 is a transmitted pulse, 41 is a transmitted signal, 42 is a scale indicating the beam path, 43a, 43b, 43c, 43s, 43t, 4
3u and 43z are scan gates, 44a, 44
b, 44c are transmission echoes displayed on LCD, 44s
45 is a defect echo displayed on the liquid crystal display. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 試験体である鋼管の溶接部に繰り返し超音波パ
ルスを送信し、その超音波パルス又は反射された
超音波パルスを受信する装置において、同期信号
を発生する基準クロツク発生回路と、上記回路か
ら生じる同期信号に同期して送信する送信回路と
、この送信信号を超音波パルスに変換し、それを
接触媒質を介して試験体の表面より入射させる斜
角探触子と、試験体内部より反射された超音波パ
ルスが電気信号に変換され、これを受信する受信
回路と、前記基準クロツク発生回路からの同期信
号に同期して超音波のビーム路程上を順次移動す
るスキヤンゲートを発生するスキヤンゲート発生
回路と、上記スキヤンゲート用の受信エコーの高
さを測定するエコー高さ測定回路と、上記エコー
高さと上記スキヤンゲートの位置を記憶する記憶
回路と、上記エコー高さと同一なスキヤンゲート
位置での記憶されたエコー高さを比較する比較回
路と上記エコー高さをAスコープ表示する液晶表
示器を備え、上記比較回路の比較結果によりエコ
ー高さの液晶表示器への表示を制御することを特
徴とした超音波探傷装置。
In a device that repeatedly transmits ultrasonic pulses to a welded part of a steel pipe as a test object and receives the ultrasonic pulses or reflected ultrasonic pulses, there is a reference clock generation circuit that generates a synchronization signal, and a synchronization generated from the above circuit. A transmitting circuit that transmits signals in synchronization with the signal, an angle probe that converts this transmitted signal into ultrasonic pulses and transmits them from the surface of the test specimen via the couplant, and ultrasonic pulses that are reflected from inside the test specimen. A receiving circuit that converts the ultrasonic pulse into an electrical signal and receives it; and a scan gate generating circuit that generates a scan gate that sequentially moves on the ultrasonic beam path in synchronization with the synchronization signal from the reference clock generating circuit. an echo height measuring circuit for measuring the height of the received echo for the scan gate; a memory circuit for storing the echo height and the scan gate position; and a memory circuit for storing the echo height and the scan gate position. The apparatus is characterized by comprising a comparison circuit for comparing the echo heights obtained and a liquid crystal display for displaying the echo height on the A-scope, and controlling the display of the echo height on the liquid crystal display according to the comparison result of the comparison circuit. Ultrasonic flaw detection equipment.
JP1987169198U 1987-11-05 1987-11-05 Pending JPH0174552U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987169198U JPH0174552U (en) 1987-11-05 1987-11-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987169198U JPH0174552U (en) 1987-11-05 1987-11-05

Publications (1)

Publication Number Publication Date
JPH0174552U true JPH0174552U (en) 1989-05-19

Family

ID=31459039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987169198U Pending JPH0174552U (en) 1987-11-05 1987-11-05

Country Status (1)

Country Link
JP (1) JPH0174552U (en)

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