JPH0181021U - - Google Patents

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Publication number
JPH0181021U
JPH0181021U JP1987176179U JP17617987U JPH0181021U JP H0181021 U JPH0181021 U JP H0181021U JP 1987176179 U JP1987176179 U JP 1987176179U JP 17617987 U JP17617987 U JP 17617987U JP H0181021 U JPH0181021 U JP H0181021U
Authority
JP
Japan
Prior art keywords
signal
nonlinear distortion
circuit
divides
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987176179U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987176179U priority Critical patent/JPH0181021U/ja
Publication of JPH0181021U publication Critical patent/JPH0181021U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例による非線形歪補償
回路の構成を示すブロツク図、第2図a,b,c
,dは低レベル信号抽出の際のリミツテイングレ
ベル及び各部の信号波形を示す図、第3図a,b
は高レベル信号抽出の際のリミツテイングレベル
及び抽出された信号波形を示す図である。 1,2:リミツタ回路、3,4,6:レベル制
御器、5:位相器、20,21:分配器、22:
合成器。
Fig. 1 is a block diagram showing the configuration of a nonlinear distortion compensation circuit according to an embodiment of the present invention, and Fig. 2 a, b, c
, d are diagrams showing the limiting level and signal waveforms of various parts when extracting low-level signals, Figure 3 a, b
2 is a diagram showing a limiting level and an extracted signal waveform when extracting a high-level signal. FIG. 1, 2: limiter circuit, 3, 4, 6: level controller, 5: phase shifter, 20, 21: distributor, 22:
Synthesizer.

Claims (1)

【実用新案登録請求の範囲】 入力信号を2分配し、一方の信号を非線形歪発
生回路に通し、非線形歪発生回路からの歪信号を
他方の信号にベクトル合成するプリデイストーシ
ヨン方式の高周波増幅器の非線形歪補償回路にお
いて、 前記非線形歪発生回路が、一方の信号を2分配
し、分配された信号を各々異なる制限レベルでリ
ミツタ操作する2つのリミツタ回路と、各リミツ
タ回路からの信号の差をとり該信号差を非線形の
歪信号として出力する出力部を有することを特徴
とする非線形歪補償回路。
[Claims for Utility Model Registration] A predistortion-type high-frequency amplifier that divides an input signal into two, passes one signal through a nonlinear distortion generation circuit, and vector-combines the distortion signal from the nonlinear distortion generation circuit with the other signal. In the nonlinear distortion compensation circuit, the nonlinear distortion generating circuit divides one signal into two and operates the divided signals as limiters at different limit levels, and the difference between the signals from each limiter circuit is calculated. 1. A nonlinear distortion compensation circuit comprising an output section that outputs the signal difference as a nonlinear distortion signal.
JP1987176179U 1987-11-18 1987-11-18 Pending JPH0181021U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987176179U JPH0181021U (en) 1987-11-18 1987-11-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987176179U JPH0181021U (en) 1987-11-18 1987-11-18

Publications (1)

Publication Number Publication Date
JPH0181021U true JPH0181021U (en) 1989-05-31

Family

ID=31467932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987176179U Pending JPH0181021U (en) 1987-11-18 1987-11-18

Country Status (1)

Country Link
JP (1) JPH0181021U (en)

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