JPH0181795U - - Google Patents

Info

Publication number
JPH0181795U
JPH0181795U JP1987178127U JP17812787U JPH0181795U JP H0181795 U JPH0181795 U JP H0181795U JP 1987178127 U JP1987178127 U JP 1987178127U JP 17812787 U JP17812787 U JP 17812787U JP H0181795 U JPH0181795 U JP H0181795U
Authority
JP
Japan
Prior art keywords
data
serial
register
input
holds
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987178127U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987178127U priority Critical patent/JPH0181795U/ja
Publication of JPH0181795U publication Critical patent/JPH0181795U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案実施例の構成を示すブロツク図であ
る。 1……メモリコントロール回路、2……メモリ
アレイ、3……シリアルデータ転送用レジスタ、
4……シリアル入力データレジスタ、5……演算
回路、6……シリアル出力データセレクタ。
The figure is a block diagram showing the configuration of an embodiment of the present invention. 1...Memory control circuit, 2...Memory array, 3...Serial data transfer register,
4... Serial input data register, 5... Arithmetic circuit, 6... Serial output data selector.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シリアル入出力ポートを有するデユアルポート
メモリ装置において、メモリとの間で送受するデ
ータを保持するシリアルデータ転送用レジスタと
、入力されたシリアルデータを保持するシリアル
入力用レジスタと、シリアルデータ転送用レジス
タが保持するデータとシリアル入力用レジスタが
保持するデータとの間でデータ変換を行なうデー
タ変換手段とを備え、データ変換手段による変換
後のデータをメモリに格納することを特徴とする
デユアルポートメモリ装置。
In a dual port memory device that has a serial input/output port, there are a serial data transfer register that holds data sent to and from the memory, a serial input register that holds input serial data, and a serial data transfer register. What is claimed is: 1. A dual port memory device comprising: data converting means for converting data between held data and data held by a serial input register; and storing data converted by the data converting means in a memory.
JP1987178127U 1987-11-20 1987-11-20 Pending JPH0181795U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987178127U JPH0181795U (en) 1987-11-20 1987-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987178127U JPH0181795U (en) 1987-11-20 1987-11-20

Publications (1)

Publication Number Publication Date
JPH0181795U true JPH0181795U (en) 1989-05-31

Family

ID=31469759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987178127U Pending JPH0181795U (en) 1987-11-20 1987-11-20

Country Status (1)

Country Link
JP (1) JPH0181795U (en)

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