JPH0184468U - - Google Patents
Info
- Publication number
- JPH0184468U JPH0184468U JP1987180180U JP18018087U JPH0184468U JP H0184468 U JPH0184468 U JP H0184468U JP 1987180180 U JP1987180180 U JP 1987180180U JP 18018087 U JP18018087 U JP 18018087U JP H0184468 U JPH0184468 U JP H0184468U
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- conductive pattern
- lands
- substrate
- electronic component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 2
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図はこの考案を具体化したプリント配線基
板の部分平面図、第２図はその部分拡大断面図で
ある。
１……基板、２……導電パターン、３……ラン
ド、４……スルーホール、５……ソルダーレジス
ト膜、６……電子部品、７……リード足。
FIG. 1 is a partial plan view of a printed wiring board embodying this idea, and FIG. 2 is a partially enlarged sectional view thereof. 1... Board, 2... Conductive pattern, 3... Land, 4... Through hole, 5... Solder resist film, 6... Electronic component, 7... Lead foot.
Claims (1)
パターン２上に接続された複数のランド３上に電
子部品６のリード足７をはんだ付けするようにし
たプリント配線基板において、 前記ランド３上に存在するスルーホール４を覆
うように、基板１表面にソルダーレジスト膜５を
コーテイングしたことを特徴とするプリント配線
基板。[Claims for Utility Model Registration] Printed wiring having a conductive pattern 2 on the surface of a substrate 1 and having lead legs 7 of an electronic component 6 soldered onto a plurality of lands 3 connected to the conductive pattern 2. A printed wiring board characterized in that the surface of the substrate 1 is coated with a solder resist film 5 so as to cover the through holes 4 existing on the lands 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987180180U JPH0184468U (en) | 1987-11-26 | 1987-11-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987180180U JPH0184468U (en) | 1987-11-26 | 1987-11-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0184468U true JPH0184468U (en) | 1989-06-05 |
Family
ID=31471704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987180180U Pending JPH0184468U (en) | 1987-11-26 | 1987-11-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0184468U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021174975A (en) * | 2020-04-30 | 2021-11-01 | Ｎｅｃプラットフォームズ株式会社 | Printed circuit board and printed circuit board manufacturing method |
-
1987
- 1987-11-26 JP JP1987180180U patent/JPH0184468U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021174975A (en) * | 2020-04-30 | 2021-11-01 | Ｎｅｃプラットフォームズ株式会社 | Printed circuit board and printed circuit board manufacturing method |