JPH01864A - Image processing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an image processing device that converts a digital image signal expressed in multiple gradations into a digital pixel signal with several gradations.

(Prior art) Copying machines, facsimile machines, etc. that use digital image data,
In printers, etc., the dither method is often used as a method of processing an image signal with multi-gradation expression into several gradations, but the dither method uses a dither matrix pattern. As a result, moiré occurs when inputting a halftone image, and as the matrix size increases, the resolution decreases. Furthermore, it has drawbacks such as the need for several lines of backup memory to implement it in hardware.

Furthermore, there is a method of feeding back the conversion error caused by the conventional dither method to the image signal of the next block before dither processing. There is also an image binarization processing method that performs error correction using a weight matrix.

However, as mentioned above, when using the dither method, the resolution deteriorates due to the size of the dither matrix.
In the binarization process, gradation reproducibility deteriorates.

(Purpose) The purpose of the present invention is to solve the above-mentioned drawbacks of the prior art, and to suppress the occurrence of moiré from original images including halftone originals, and to perform gradation processing without lowering the resolution. An object of the present invention is to provide an image processing device.

(Structure) In order to achieve the above object, the present invention provides an image processing device that obtains a reproduced image from an image signal expressed in multiple gradations, in which the image signal is separated into even-numbered pixels and odd-numbered pixels. A means for adding and a means for holding one block of the result of gradation processing of the signal after the addition and a conversion error caused by the gradation processing, and feeding back the conversion error to the pixel signal of the next block, It does not use a matrix in the dither method, and does not cause moiré or decrease in resolution (it is characterized by correcting conversion errors).

Embodiments of an image processing apparatus according to the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention,
1 is an image distribution section, 2 and 3.5 are adders, 4.6 is a gradation processing section, and 7 is an image combination section.

In the figure, an input multi-gradation image signal is distributed by a pixel distribution section 1 into even-numbered pixel signals and odd-numbered pixel signals. The even-numbered pixel signals are added to the odd-numbered pixel signals by an adder 3 via an adder 2, which will be described later. The gradation processing units 4 and 6 convert the respective input gradation image signals into nIV tones suitable for the image reproduction device to reproduce the image. Note that n is an integer greater than or equal to 2 and less than or equal to the number of input gradations.

At this time, the n-gradation image signal causes a conversion error with respect to the input gradation pixel signal, but this error is added to the gradation image signal again by the adder 5.2 and used for gradation processing. The n-gradation image signal subjected to the gradation processing in this manner is outputted by combining even-numbered pixel signals and odd-numbered pixel signals in a pixel combining section.

The feature of this embodiment is that the pixel distribution unit 1 divides the gradation image signal into even-numbered pixels and odd-numbered pixels, and adders 2 and 5 are used to perform error correction for each pixel in turn at a rate of about 2 pixels. The point is to perform gradation processing after that.

FIG. 2 is a circuit configuration diagram of another embodiment of the present invention,
．． 1? , 18.19 is a latch, 9, 10.14 is an adder, 11 is a subtracter, 12 is an overflow corrector, 13 is an underflow corrector, 15.16 is a divider, 20 is a data selector, 21 is a frequency divider It is a counter.

In the figure, a multi-gradation image signal, which is an input signal, is input to a latch 8. Latch 8 is the other latch 17°18.19
It has an asynchronous clear function in the same way as , and is cleared by the horizontal synchronization signal. In other words, all the latches in FIG. 2 are initialized by the horizontal synchronizing signal and then latch the first gradation image of one line. The latch timing is determined by the pixel clock obtained by dividing the pixel clock by % by the frequency division counter 21 for the latches 8, 17, 18, and 19.
This is one pixel interval.

The output of latch 8 enters adder 9 where it is added to the output of latch 19. The output of the ratte 19 is a quantization error of tone processing corresponding to the output of the tone processing section 6 in FIG. Adder 10 adds the output of adder 9 and the output of latch 8, which corresponds to adder 3 in FIG.
It has the meaning of adding even-numbered pixel signals and odd-numbered pixel signals. The output of the adder 10 is divided into two parts, which enter an overflow corrector 12 and a subtracter 11, which are processed in subsequent circuits as an even-numbered pixel signal and an odd-numbered pixel signal, respectively. The even-numbered pixel signals that have entered the overflow corrector 12 are corrected by outputting them as the maximum value -1 only for pixel signals that are greater than or equal to the maximum value that the input gradation pixel signal can take.

The subtracter 11 subtracts the maximum value that the input gradation pixel signal can take from the output signal of the adder 10, and the underflow corrector 1
3 corrects the negative signal at the output of the subtracter 11 to O. As a result, the underflow corrector 13 outputs a signal corresponding to the value corrected by the overflow corrector 12 described above.

The divider 15 divides the output signal of the overflow corrector 12 described above by a predetermined quantization tone of 5 tep. This corresponds to the gradation processing section 4 in FIG.
7 and the remainder is input to adder 14 for quantization error correction.
is input.

The quantization gradation level 5tep is set to the value obtained by dividing the number of input gradation levels by the number of output gradation levels n.

Note that the divider 15 is designed to assume a case where the gradation is a linear step, and if the gradation is non-linear, it is sufficient to perform processing such as matching to a log curve in accordance with the characteristics of the printer or the like.

The signal obtained by adding the t childization error and the output of the underflow corrector 13 in the adder 14 becomes an odd-numbered pixel signal, and similarly to the even e-th signal. 6), gradation processing is performed to form an n gradation pixel signal, which is input to the latch 18. In addition, the quantization error (remainder of the divider 16) generated here is latched by the latch 19, and then input to the adder 9 on the jiff, and is added to the gradation signal of the even-numbered pixel to be inputted next. Been n l'l'? : Correct the quantization error during y'1 quantization.

The image signals after n gradation processing latched by the latches 17 and 18 are output alternately by the data selector 20 as even-numbered and odd-numbered pixel signals, respectively. The output of the frequency division counter 21 is used as the selection timing signal of the data selector 20.

This corresponds to the pixel combining section 7 in FIG. 1, and returns the pixels separated by the one-plane pixel distributing section 1 to restore their shape. In this way, a pixel signal quantized to n gradations is output to the data selector 20.

FIG. 3 is an operation waveform diagram explaining the operation of FIG. @2, and FIG. 4 is an explanatory diagram showing the values of each signal in FIG.

In Figure 2, the highest gradation value, that is, the highest concentration value, is 10
0, quantization gradation step 20, output gradation number n=5,
The data held in the latch 19 is 10, the even numbered pixel signal input is 55, and the odd numbered pixel signal is 62.
If this is the case, the respective mounting positions in FIG. 2 for pixel locking will be as shown in FIG. 4.

Figure 4 shows the number of inputs. For G2,
This shows that an output 5-gradation signal of 4.2 was obtained.

If the input multi-gradation image signal in this implementation row has consecutive pixels in the main scanning direction, the even numbered pixels and the odd numbered pixels that are next to each other are added together using the main scanning method. .

FIG. 5 is a block diagram showing another embodiment of the image processing apparatus according to the present invention corresponding to the sub-scanning direction, in which 22 is a buffer and memory for one line in the main-scanning direction, 23 is a data selector, and 24 is a third embodiment of the image processing apparatus according to the present invention. 2 Circuit with the same configuration and function as in Figure 2, 2
5 is a conversion error buffer memory.

The configuration shown in the figure is mainly;? 'For continuous input in the tft direction, in order to perform addition processing on pixels that are 1 scanning direction and 2 pixels, the buffer memory 22 for multi-gradation image signals for 1 line in the main scanning direction and the conversion error are added. This is handled by adding a backup memory 25 for holding.

(Effects) As explained above, according to the invention, the matrix used in the dither method is not used, so the resolution of the reproduced image is good and moiré does not occur.Conversion errors are feedback corrected. Therefore, gradation reproducibility is good throughout the image.

By adding the even-numbered pixels and the odd-numbered pixels, uniformity in the peta image area and effectiveness of edge enhancement in the halftone area can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a circuit configuration diagram of another embodiment of the present invention, Fig. 3 is an operation waveform diagram of Fig. 2, and Fig. 4 is an 'i42 diagram. FIG. 5 is a block diagram showing another embodiment of the present invention corresponding to the sub-scanning direction. 1... Pixel distribution unit, 2, 3.5... Adder, 4, 6... Gradation processing unit, 7...
Pixel joining part. Figure 1

Claims (2)

[Claims] (1) In an image processing device that obtains a reproduced image by processing successive two pixels of the image signal from both image signals expressed in multiple gradations as one block, the image signal is divided into even-numbered pixels and odd-numbered pixels. separation means for separating the separated even-numbered pixels and odd-numbered pixels;
holding means for holding the result of gradation processing of the signal after addition and the conversion error caused by the gradation processing for the one block;
An image processing device comprising: means for feeding back the conversion error to a pixel signal of the next block. (2) The image according to claim 1, wherein the feedback means is an addition of the conversion error held in the holding means and the image signal of the next block before gradation processing. Processing equipment.