JPH0187574U - - Google Patents
Info
- Publication number
- JPH0187574U JPH0187574U JP18483387U JP18483387U JPH0187574U JP H0187574 U JPH0187574 U JP H0187574U JP 18483387 U JP18483387 U JP 18483387U JP 18483387 U JP18483387 U JP 18483387U JP H0187574 U JPH0187574 U JP H0187574U
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- electronic circuit
- wiring board
- terminal rows
- combination electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Structure Of Printed Boards (AREA)
- Combinations Of Printed Boards (AREA)
- Multi-Conductor Connections (AREA)
Description
第１図は本考案の原理構成を示す図、第２図・
第３図・第４図は本考案の実施例を示す図、第５
図・第６図・第７図は従来の組合せ回路を示す図
である。
１，２……プリント基板、３……接続線組、４
―１，４―２……切換スイツチ、５……並列接続
線組、６―１，６―２……スルーホール、１１，
１２，２１，２２……端子列。
Figure 1 is a diagram showing the principle configuration of the present invention, Figure 2.
Figures 3 and 4 are diagrams showing an embodiment of the present invention, and Figure 5 is a diagram showing an embodiment of the invention.
6 and 7 are diagrams showing conventional combinational circuits. 1, 2...Printed circuit board, 3...Connection wire set, 4
-1, 4-2...Selector switch, 5...Parallel connection wire set, 6-1, 6-2...Through hole, 11,
12, 21, 22...terminal row.
Claims (1)
配線基板１，２を接続線組３により対向接続して
構成したプリント配線基板を使用する組合せ電子
回路において、 該プリント配線基板１，２の各出力端子を所要
の交差を行つて複数の端子列１１，１２，２１に
構成し、 各対向する端子列１１，１２，２１間を接続す
る並列接続線組５を具備すること を特徴とするプリント配線基板を使用する組合
せ電子回路。[Claims for Utility Model Registration] In a combination electronic circuit using a printed wiring board configured by connecting printed wiring boards 1 and 2 with a plurality of terminals output in parallel in one direction and facing each other through a connecting wire set 3, Each of the output terminals of the wiring boards 1 and 2 is configured into a plurality of terminal rows 11, 12, 21 by making required intersections, and a parallel connection line set 5 is provided to connect each of the opposing terminal rows 11, 12, 21. A combination electronic circuit using a printed wiring board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18483387U JPH0187574U (en) | 1987-12-03 | 1987-12-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18483387U JPH0187574U (en) | 1987-12-03 | 1987-12-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0187574U true JPH0187574U (en) | 1989-06-09 |
Family
ID=31476169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18483387U Pending JPH0187574U (en) | 1987-12-03 | 1987-12-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0187574U (en) |
-
1987
- 1987-12-03 JP JP18483387U patent/JPH0187574U/ja active Pending
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