JPH0193742U - - Google Patents

Info

Publication number
JPH0193742U
JPH0193742U JP18942487U JP18942487U JPH0193742U JP H0193742 U JPH0193742 U JP H0193742U JP 18942487 U JP18942487 U JP 18942487U JP 18942487 U JP18942487 U JP 18942487U JP H0193742 U JPH0193742 U JP H0193742U
Authority
JP
Japan
Prior art keywords
line
leads
integrated circuit
substrate
longitudinal direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18942487U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18942487U priority Critical patent/JPH0193742U/ja
Publication of JPH0193742U publication Critical patent/JPH0193742U/ja
Pending legal-status Critical Current

Links

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図ないし第6図はこの考案の一実施例を示
すもので、第1図はその要部を示す斜視図、第2
図、第3図、第4図、第5図、第6図はそれぞれ
第1図の―線、―線、―線、―
線、―線に沿う断面図、第7図ないし第10
図はこの考案の他の実施例を示すもので、第7図
はその要部を示す斜視図、第8図、第9図、第1
0図はそれぞれ第7図の―線、―線、
―線に沿う断面図、第11図および第12図は
従来の混成集積回路の一例を示すもので、第11
図はその一部省略斜視図、第12図はリードを示
す斜視図である。 1…基板、2…ランド、4,5…リード。
Figures 1 to 6 show one embodiment of this invention, with Figure 1 being a perspective view showing the main parts, and Figure 2 being a perspective view showing the main parts.
Figure 3, Figure 4, Figure 5 and Figure 6 are respectively - line, - line, - line, - of figure 1.
Line, - Sectional view along the line, Figures 7 to 10
The figures show other embodiments of this invention; FIG. 7 is a perspective view showing the main parts, FIGS. 8, 9, and 1.
Figure 0 corresponds to the - line, - line, and - line of Figure 7, respectively.
11 and 12 show an example of a conventional hybrid integrated circuit.
The figure is a partially omitted perspective view, and FIG. 12 is a perspective view showing the lead. 1... Board, 2... Land, 4, 5... Lead.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板に板状をなす複数のリードを一列状に配置
して固定してなる集積回路において、前記リード
の幅方向の中間部を長手方向に沿つて曲げたこと
を特徴とする集積回路。
What is claimed is: 1. An integrated circuit comprising a plurality of plate-shaped leads arranged and fixed in a line on a substrate, characterized in that a widthwise intermediate portion of the leads is bent along a longitudinal direction.
JP18942487U 1987-12-15 1987-12-15 Pending JPH0193742U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18942487U JPH0193742U (en) 1987-12-15 1987-12-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18942487U JPH0193742U (en) 1987-12-15 1987-12-15

Publications (1)

Publication Number Publication Date
JPH0193742U true JPH0193742U (en) 1989-06-20

Family

ID=31480454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18942487U Pending JPH0193742U (en) 1987-12-15 1987-12-15

Country Status (1)

Country Link
JP (1) JPH0193742U (en)

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