JPH0194652A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To allow a highly reliable and efficient semiconductor device to be manufactured with only a few processing steps and high yield by constructing the semiconductor device, in which an element layer having electrode wires on both surfaces is electrostatically bonded to a glass board, an insulating film and a metallic film being interposed therebetween, or like means. CONSTITUTION:A semiconductor device comprises an insulating region 1a formed between an element forming region 1b and an element forming region 1b, each consisting of a semiconductor; an element layer 2 having a semiconductor element formed on the element forming region 1b; a top side electrode wire 7 and a bottom side electrode wire 6, each formed on the top and bottom sides of the element layer 2, respectively; an insulating film 3 covering the bottom side electrode wire 6; a metallic film 4 coated on the insulating film 3; and a glass board 5 electrostatically bonded to the metallic film 4. For example, the insulating film 3 is formed by covering the bottom side electrode wire 6, the metallic film 4 being coated thereupon. Then the metallic film 4 is made to come in contact with the glass board 5, both being electrostatically bonded while being thermally treated while applying a negative voltage relative to the metallic film 4 is applied to the glass board 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same.

[Conventional technology]

When a functional element such as a switching element is formed on a semiconductor substrate, only one layer from the surface of the substrate functions as an element.
The depth is up to about 0 μm, and it is often more convenient in terms of characteristics to replace the remaining semiconductor substrate region with an insulating substrate. S is a typical technology for forming semiconductor elements on an insulating substrate.
There is an O8 semiconductor device. This is effective for increasing the speed and breakdown voltage of elements. However, SO8 has many lick defects due to crystallization caused by heteroepitaxial growth, and there is a problem that the expected characteristics cannot be exhibited. Therefore, a method has been reported in which an element layer already formed on a semiconductor single crystal substrate is removed by polishing or the like and transferred to an insulating support substrate. (For example, Japanese Journal of Applied Physics
Journal of Applied Physics, Vol. 26, No. 10, No. L815, 1984).

In this method, a semiconductor substrate on which elements have already been formed is adhered to a first supporting substrate using the element forming surface as an adhesive surface, the back side of the semiconductor substrate is removed by polishing, and then the polished surface is attached to a second support substrate. After adhering and fixing to the insulating substrate, the first support substrate is removed and the element layer is transferred to the insulating substrate.

[Problem that the invention seeks to solve]

The method of transferring the element layer to the insulating substrate as described above requires at least two adhesion steps with the supporting substrate in order to expose the element surface on the insulating substrate, which has the disadvantage of complicating the manufacturing process. was there.

When low melting point glass is used as the adhesive used at this time, there is a drawback that a uniform adhesive layer cannot be obtained over the entire surface of the wafer due to its high viscosity. Organic adhesives such as epoxy or polyimide have weak adhesive strength and low heat resistance, making it impossible to create new wiring and electrodes on the element layer transferred to the insulating substrate. Therefore, in the conventional structure, when 0MO3 is formed, for example, there is a problem that the margin for lick operation, in which the substrate region of the transistor is not connected to a constant potential and is electrically floating, becomes narrow.

An object of the present invention is to provide a semiconductor device and a manufacturing method thereof that solve these problems.

[Means for solving problems]

A semiconductor device of the present invention includes a plurality of element formation regions made of a semiconductor and an insulating region provided between the element formation regions, an element layer having a semiconductor element provided in the element formation region, and an element layer having a semiconductor element provided in the element formation region. A front electrode wiring and a back electrode wiring provided independently on the front and back surfaces of the , an insulating film covering the back electrode wiring, a metal film deposited on the insulating film, and an electrostatic bonding with the metal film. It has a glass substrate that has been polished.

The method for manufacturing a semiconductor device of the present invention includes selectively forming a field insulating film to a predetermined depth from one principal surface of a semiconductor substrate to define an element formation region, and then forming a semiconductor element in the element formation region. a step of forming an insulating film covering the back electrode wiring; a step of depositing a metal film on the insulating film; and a step of bringing the metal film and the glass substrate into close contact with each other. A step of performing heat treatment while applying a negative voltage to the film to the glass substrate to form an electrostatic bond, and polishing the semiconductor substrate from the other main surface side to expose the field insulating film to form an element layer. The process of leaving
The method includes a step of providing a front electrode wiring independent of the back electrode wiring on the exposed surface of the element layer to complete the electrode wiring.

[Effect]

The semiconductor device of the present invention has a structure in which an element layer having electrode wiring on both sides is electrostatically bonded to a glass substrate via an insulating film and a metal film.

Electrostatic bonding has been published, for example, by Kinko et al. in "Proceedings of the 33rd Applied Physics Association Conference" 2a-ZG-5. In this process, a semiconductor silicon substrate and a glass substrate (for example, borosilicate glass) are brought into contact with each other, and heat treatment is performed in an inert gas at 400°C with a positive potential applied to the semiconductor silicon substrate and a negative potential applied to the glass substrate. When this is done, the sodium ions Na+ in the glass substrate are attracted to a negative potential, creating a vacancy at the interface between the semiconductor silicon and the glass, silicon atoms move into this vacancy, producing silicon oxide, and the semiconductor silicon substrate and a glass substrate are bonded to each other.

As a result of experiments conducted by the present inventors, it was discovered that metal films such as aluminum, indium, and tin films provided on semiconductor silicon substrates can also be bonded to glass substrates (for example, borosilicate glass).

When electrostatic bonding is used in this way, an oxide is formed at the interface between the metal film and the glass substrate, making it possible to achieve a strong bond, improving reliability and being able to withstand temperatures of over 400°C. Therefore, it becomes possible to newly form electrode wiring on the element after bonding the element layer to the glass substrate. Therefore, wiring can be provided on both sides of the element layer, and characteristics can be significantly improved compared to conventional semiconductor devices.

Furthermore, in the method for manufacturing a semiconductor device of the present invention, an insulating film and a metal film are provided in order to prevent the device from being destroyed if the device layer is brought into close contact with the glass substrate and a voltage is applied from the back side of the semiconductor substrate. Then, a voltage is directly applied to this metal film to form an electrostatic junction, and by this method, a highly reliable and high performance semiconductor device can be manufactured as described above.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a chip showing the main parts of an embodiment of the semiconductor device of the present invention.

This embodiment consists of a plurality of element formation regions 1b made of semiconductor silicon and an insulating region 1a made of silicon oxide provided between the element formation regions 1b, and a semiconductor element (not shown) provided in the element formation region 1b. )", a front electrode wiring 7 and a back electrode wiring 6 provided independently on the front and back surfaces of the element layer 2, an insulating film 3 covering the back electrode wiring 6, and an insulating film 3 on the insulating film 3. It has a metal film 4 made of deposited aluminum and a glass substrate 5 made of borosilicate glass electrostatically bonded to the metal film 4. The metal film 4 may be made of indium or tin other than aluminum.

The surface electrode wiring 7 may be an aluminum film simply for establishing electrical conduction between the element formation regions 1b, or may be a multilayer wiring used in ordinary semiconductor integrated circuits. For example, since the source/drain regions of a MOS transistor can be formed over the entire thickness of the element layer, it is also possible to use the source electrode wiring and the drain electrode wiring as surface electrode wiring.

Although not shown in the drawing, the back electrode wiring 6 and the external terminal (
In order to expose a bonding pad (not shown) for connecting a chip (not shown), the element layer and surface electrode wiring are not provided at the chip periphery.

Since electrode wiring is provided on both sides of the element layer and is electrostatically bonded to the glass substrate, the adhesive strength is uniform and strong, and the heat resistance is also high, improving the reliability of the semiconductor device. Further, since there are electrode wirings on both sides, multilayer wiring is promoted, and a high-density integrated circuit can be realized.

FIGS. 2(a) to 2(d) are cross-sectional views of chips arranged in the order of steps for explaining one embodiment of the method for manufacturing a semiconductor device of the present invention.

First, as shown in FIG. 2(a), a field oxide film 1a' is selectively formed on a semiconductor substrate made of p-type silicon by a selective oxidation method or a trench isolation method to define an element formation region 1b. A semiconductor element such as a MOS transistor is formed in this element forming region in the same way as in a normal IC. In this case, for example, the depth of the source/drain regions (not shown) of the MOS transistor may be set to reach deeper than the bottom of the field oxide film 1a'. Next, a gate electrode, a train electrode, a bonding pad, etc. are provided. In this case, a multilayer wiring structure may be used, but a normal I
Since it is the same as C, it will not be described in detail. These electrode wirings are collectively referred to as back electrode wiring 6 in the figure.

Next, as shown in FIG. 2(b), an insulating film 3 and a metal film 4 are formed on the element layer 2. The insulating film 3 is made of, for example, a silicon dioxide film or a silicon nitride film with a thickness of 0.3 μm, and is formed by chemical vapor deposition. Metal film 4
An aluminum film, an indium film, or the like having a thickness of 0.2 μm is used for the film, and is formed by a vapor deposition method or a sputtering method.

Next, as shown in FIG. 2(C), the metal film 4 is brought into close contact with the glass substrate 5, the grounded positive electrode 12 is brought into contact with the metal film 4, and the negative electrode 13 is brought into contact with the glass substrate 5 to apply a voltage. Apply,
After bonding the semiconductor substrate 8 and the glass substrate 5 by heating in vacuum or in an inert gas at a temperature of 300° C. to 400° C.,
The outer periphery of the semiconductor substrate 8 is removed and the whole is shaped into the size of the glass substrate 5. Grinding and chemical etching are used as processing methods. The applied voltage ranges from 200V to 300V. The glass substrate 5 may be a glass substrate containing alkali metal ions on the surface or the entire surface, such as borosilicate glass.

Next, as shown in FIG. 2(d), the semiconductor substrate 8 is removed using mechanical/chemical boring until the field oxide film 1a' formed in the element layer 2 is exposed. When an organic amine is used in the chemical solution, the polishing speed of the silicon and oxide films constituting the semiconductor substrate is significantly different, so the field oxide film 1a' acts as a polishing stopper, making it possible to leave the element layer 2 uniformly with good controllability. can. The periphery is then selectively etched to expose the bonding pad.

Next, as shown in FIG. 1, surface electrode wiring 7 is formed on the polished surface of the element layer 2. The back electrode wiring 6 or the front electrode wiring 7 includes not only one-layer wiring but also two-layer and three-layer multilayer wiring. In joining the semiconductor substrate 8 and the glass substrate 5,
As a method of bringing the positive electrode 12 into contact with the metal film 4, an example has been described in which the glass substrate 5 is smaller than the semiconductor substrate 8. However, as shown in FIG. The positive electrode 12 is brought into contact with the metal film 4 through the
After bringing the negative electrode 13 into contact with the glass substrate 5, a voltage may be applied.

Note that instead of the metal film 4, a polycrystalline semiconductor film such as Si, Ge, or GaAS, or an oxide semiconductor film such as In3o, Sn02, etc. may be used, but the voltage applied during electrostatic junction formation may be The voltage is as high as 300V to 400V, and it is inevitable that the yield will drop somewhat.

〔Effect of the invention〕

As explained above, in the semiconductor device of the present invention, since the element layer and the support substrate are directly bonded without using an adhesive, uniform adhesion can be achieved over the entire wafer surface, the adhesive strength is large, and the heat resistance is high. , the reliability of semiconductor devices is improved.

In addition, in conventional integrated circuits, multilayer wiring of 2 to 4 layers has been normally used on one surface, but since the structure of the present invention can be used on both sides of the semiconductor, multilayer wiring of 4 to 8 layers is now possible. It also has the great advantage of being made possible by technology alone, making it very effective for integrated circuits that require higher density.

In addition, the method for manufacturing a semiconductor device of the present invention includes providing surface and back electrode wiring on the element layer, then providing a metal film via an insulating film, and electrostatically bonding the metal film and the glass substrate. Since only one bonding step is required, it is possible to manufacture highly reliable, high-performance semiconductor devices with a high yield through fewer steps.

It is clear that the present invention can also be applied to MO9 integrated circuits, bipolar integrated circuits, GaAs integrated circuits, etc.
It is not particularly limited by device or material.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a chip showing the main parts of an embodiment of the semiconductor device of the present invention, and FIGS. 2(a) to 2(d) illustrate an embodiment of the method for manufacturing the semiconductor device of the present invention. FIG. 3 is a cross-sectional view of the chip for explaining another example of the bonding method. 1a...Insulating region, la'...Field oxide film,
1b...Element formation region, 2...Element layer, 3...Insulating film, 4...Metal film, 5...Glass substrate, 6...
Back electrode wiring, 7... Surface electrode wiring, 8... Semiconductor substrate, 9... Through hole, 12... Positive electrode, 13...
negative electrode.

Claims (2)

[Claims] (1) an element layer comprising a plurality of element formation regions made of a semiconductor and an insulating region provided between the element formation regions, and having a semiconductor element provided in the element formation region;
A front electrode wiring and a back electrode wiring provided independently on the front and back surfaces of the element layer, an insulating film covering the back electrode wiring, a metal film deposited on the insulating film, and the metal film. 1. A semiconductor device comprising a glass substrate electrostatically bonded. (2) A step of selectively forming a field insulating film over a predetermined depth from one principal surface of the semiconductor substrate to demarcate an element formation region, and then forming a semiconductor element in the element formation region and providing backside electrode wiring. a step of forming an insulating film covering the back electrode wiring; a step of depositing a metal film on the insulating film; and a step of bringing the metal film and the glass substrate into close contact and applying a negative voltage to the metal film. a step of performing a heat treatment on the glass substrate in a state where an applied voltage is applied to electrostatically bond the glass substrate; a step of polishing the semiconductor substrate from the other main surface side to expose the field insulating film and leave an element layer; and a step of exposing the field insulating film and leaving an element layer. A method of manufacturing a semiconductor device, comprising the step of providing a front surface electrode wiring independent of the back surface electrode wiring on the exposed surface of the semiconductor device to complete the electrode wiring.