JPH02100155A - Data processing system - Google Patents

Abstract

PURPOSE:To attain acceleration in a nullification processing and the reduction of a load on a main control means in nullification control by transferring nullification information representing the range of main storage duplication to be nullified directly between processors, and performing the nullification of all the elements of the data to be nullified independently in the inside of each processor. CONSTITUTION:Address calculating means 140 and 240 calculate corresponding addresses in main storage duplication areas 150 and 250 from the nullification information transferred from selection means 120 and 220 at every data, and transfer them to nullification means 130 and 230. After the address transfer of previous data is completed, a priority change instruction is outputted to the selection means 120 and 220, and also, the nullification information in nullification information register groups 110 and 210 in which address calculation are completed are cleared. Thus, since the mullification information is directly outputted to another processor with a nullification request at the time of issuing the nullification request of the main storage duplication by the processors 100 and 200, it is possible to dispense with the control of the main storage control means in the main storage duplication.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data processing system, and in particular, a data processing system in which a plurality of processing units share a main memory, and each processing unit is provided with an area for storing a copy of data in the main memory. , when a store command is issued to allocate data to main memory at regular intervals within a processing device, the processing device issues a request to invalidate the main memory copy corresponding to the range in main memory where the data is to be allocated. It relates to a data processing system that outputs data.

[Prior Art] Conventionally, in this type of data processing system, the main memory copy is invalidated by the main memory control means 4, as shown in FIG.
This was done via 00.

For example, when a request to invalidate a main memory copy is issued in the processing device lQO, the address calculation means 140 calculates the main memory copy based on the starting address representing the range of the main memory copy to be invalidated, the number of data, and the distance between data. The address in the area 150.250 is calculated in units of data, and the address and invalidation request are supplied to the invalidation means 130 and the main memory control means 400. The main memory control means 400 sends the received address and invalidation request to the invalidation means 230 of the processing device 200 each time.
, 230 is sent to invalidate the data in the main memory copy area 150°250 indicated by the address.

[Problems to be Solved by the Invention] In the conventional data processing system described above, invalidation of main memory copies is performed for each element outside the processing device under the control of the main memory control means. When the number of processing devices controlled by the main memory control means is increased, the disadvantages are that the main memory control means becomes more complicated and the invalidation processing time increases.

[Means for Solving the Problems] The data processing system of the present invention allows each processing device to store main memory copies to be invalidated when a store command is issued to allocate data in main memory at regular intervals within the processing device. Invalidation information output means for outputting invalidation information including the start address of an area, the number of data, and the distance between data to another processing device; a selection means for selecting the corresponding invalidation information in accordance with a predetermined priority, and a selection means for selecting the corresponding invalidation information in accordance with a predetermined priority if it is from a plurality of processing devices; and address calculation means for calculating the address of the main memory copy storage area from the invalidation information.

[Function] When a processing device requests invalidation of a main memory copy, it directly outputs invalidation information together with the invalidation request to another processing device, so there is no need to control the main memory control means for the main memory copy. Become.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the data processing system of the present invention, and FIG. 2 is a block diagram showing the configuration of the selection means 120, 220 and the invalidation information register group 110, 210.

This data processing system includes processing devices 100 and 200 and a main storage device 300.
00 are invalidation information register groups 110 and 210, respectively.
and selection means 120.220 and invalidation means 130.230
, address calculation means 140 and 240, main memory copy area 150 and 250, and invalidation information output means 160 and 260. As shown in FIG. 2, the invalidation information register groups 110 and 210 each include a processing device 100 register and a processing device 200 register, and the invalidation information output means 160 and 260 output when a main memory copy invalidation request is made. Main memory copy area 150 of data to be sent and invalidated
．． Invalidation information including the start address, the number of data, and the distance between data in 250 is stored. The selection means 120.220 is
As shown in FIG. 2, determining means 121 and 221 respectively.
and priority register 122.222 and priority change means 12
3.223. Priority register 122
．． In 222, priorities among processing devices are set,
In this embodiment, in the initial state, "processing device 100 is
It takes precedence over 00. Determination means 121.2
21 reads the invalidation information stored in the invalidation information register group 110, 210, and changes the number of the processing device that sent the invalidation information to the priority changing means 123.223.
Furthermore, if the invalidation information is only the invalidation information sent from one of the processing devices, the invalidation information is transferred to the address calculation means +40.240, and simultaneously from the processing devices 100 and 200. It has been sent and 2
If one invalidation information is imported, the priority register 12
According to the priority set in 2.222, invalidation information sent from a processing device with a high priority is first transferred to the address calculation means 140.240. The priority change means 123 , 223 receive the number of the processing device from the determination means 121 , 221 and further receive the priority register 122 .
The priority set in 222 is monitored, and the address calculation means 140.240 is one tab means 121.221.
Main memory copy area 15 corresponding to the invalidation information sent from
The priority level set in the priority register 122.222 is changed in response to a priority change command output after calculating all data whose addresses within 0.250 should be invalidated. This change is based on the number of the processing unit from the determining means +21.221 and the priority register 122 at that time.
, 222, and the processing device related to the invalidation information for which the address calculation has been completed is ranked lower each time. However, if the invalidation information is sent from only one processing device, the processing device is If the device's priority is currently lower, no change is made. Address calculation means 140
．． 240 is a main memory copy area 150.250 for each data from the invalidation information transferred from the selection means 120.220.
Invalidation means 130.2 by calculating the corresponding address in
30, and after completing the address transfer for the previous data,
A priority change command is output to the selection means 120.220, and the invalidation information in the invalidation information register group 110.210 for which address calculation has been completed is cleared.

Next, the operation of this embodiment will be described using as examples a case in which revocation information is sent from only one processing device and a case in which both processing devices send out revocation information.

Note that the priorities of the priority registers 122 and 222 are in the initial state.

First, within the processing device 100, a store command is issued to arrange data at regular intervals on the main storage device 300, and the processing device 100 corresponds to the range of the main storage device 300 in which the data group is to be stored. When a request to invalidate the main memory copy data is issued, the invalidation information is stored in the processing device 100 register of the invalidation information register group 110 of the processing device 100. At the same time, the invalidation information output means 160
transfers the revocation information to the processing device 100 register of the revocation information register group 210 of the processing device 200. Next, in the processing device 100, the selection means 120 takes in the revocation information from the revocation information register group 110 and transfers the revocation information to the address calculation means 140. The address calculation means 140 calculates an address for each data to be invalidated and transfers it to the invalidation means 130.
However, each time, an instruction to invalidate the main memory copy data is issued. Furthermore, when the address calculation means 140 finishes calculating the addresses for all data, it outputs an instruction to clear the invalidation information of the processing device 100 register to the invalidation information register group 110, and also outputs a priority change instruction to the selection means 120. Output. As a result of this change, the priority within the selection means 120 is changed to "The processing device 200 is the processing device 10
It takes priority over 0. This completes the process of invalidating the main memory copy of the processing device 100, but at the same time, exactly the same process is being performed within the processing device 200.
All invalidation processing will be completed.

Next, similarly, if the processing device 200 issues an invalidation request in the initial state, the invalidation information is stored in the processing device 200 register of the processing devices 100 and 200, and the subsequent invalidation means 130 and 230 Up to the output of the invalidation command, processing is performed by the processing devices 100 and 200 in the same way as when the processing device 100 issues the invalidation request, but the priority change is performed by the processing device 200 in the initial state.
is not performed here because it has a lower priority.

Next, let us consider a case in which invalidation requests are issued simultaneously from processing devices 100 and 200 in the initial state.

In this case, two pieces of invalidation information are invalidated information register group 1.
10, 210 and taken into the selection means 120.220, and first the revocation information address calculation means 140.2 from the processing device 100 is stored in the selection means 120.220 according to the priority in the initial state.
40 and ask for the address. After those addresses are transferred to the invalidating means 130 and 230, the priority is similarly changed so that "the processing device 200 has priority over the processing device 100." Thereby, the invalidation information from the processing device 200 is transferred to the address calculation means 140.
240 and similarly obtain the address. Then, after the address transfer, the priority is similarly changed so that "processing device 100 has priority over processing device 200" and the series of invalidation processing ends.

[Effects of the Invention] As explained above, the present invention allows invalidation information indicating the range of data in a main memory copy to be invalidated to be directly exchanged between processing devices without going through a main memory control means. By independently performing invalidation of all elements of data to be processed within each processing device, it is possible to speed up the invalidation process and reduce the burden of invalidation control on the main memory control means.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the data processing system of the present invention, and FIG. 2 is a block diagram showing an embodiment of the data processing system of the present invention. FIG.
10, 210 and the selection means 120 and 220. FIG. 3 is a block diagram showing a conventional example. 00, 200... Processing device, 10.210... Invalidation information register group, 20.22
0... Selection means, 21, 221... Determination means, 22.222... Priority register, 23.223... Priority changing means, 30, 230... Invalidation means, 40.240 ...address calculation means, 150.250
. . . Main memory copy area, 160. 260 . . . Invalidation information output means, 300 . . . Main storage device.

Claims (1)

[Claims] 1. The main memory of a plurality of processing devices is shared, each processing device is provided with an area for storing the transfer of data in the main memory, and within the processing devices, data is arranged in the main memory at regular intervals. When a store command is issued, a request to invalidate the main memory copy data is issued within the processing unit, and invalidation information including the start address of the main memory copy area to be invalidated, the number of data, and the distance between data is output. In a data processing system, each processing device outputs invalidation information to another processing device when the store instruction is issued;
When receiving invalidation information from another processing device, if the information is from only one processing device, that invalidation information is received, and if it is from multiple processing devices, it is given a predetermined priority. 1. A data processing system comprising: a selection means for selecting corresponding invalidation information according to the selection means; and an address calculation means for calculating an address of a main memory copy storage area from the invalidation information selected by the selection means.