JPH0210404Y2 - - Google Patents

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Publication number
JPH0210404Y2
JPH0210404Y2 JP5385683U JP5385683U JPH0210404Y2 JP H0210404 Y2 JPH0210404 Y2 JP H0210404Y2 JP 5385683 U JP5385683 U JP 5385683U JP 5385683 U JP5385683 U JP 5385683U JP H0210404 Y2 JPH0210404 Y2 JP H0210404Y2
Authority
JP
Japan
Prior art keywords
alarm
signal
circuit
time division
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5385683U
Other languages
Japanese (ja)
Other versions
JPS59161016U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5385683U priority Critical patent/JPS59161016U/en
Publication of JPS59161016U publication Critical patent/JPS59161016U/en
Application granted granted Critical
Publication of JPH0210404Y2 publication Critical patent/JPH0210404Y2/ja
Granted legal-status Critical Current

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  • Measurement Of Predetermined Time Intervals (AREA)
  • Electric Clocks (AREA)
  • Measurement Of Radiation (AREA)

Description

【考案の詳細な説明】 本考案は、デイジタル計測装置に適した表示警
報回路に関する。
[Detailed Description of the Invention] The present invention relates to a display alarm circuit suitable for a digital measuring device.

放射線計測装置等の表示警報設定回路は、第1
図に示したように、検出器からの信号を積算して
その積算値を出力する検出回路Dからの信号が入
力し、これに基づいて2進化10進信号と桁選択信
号を出力するを時分割駆動回路2と、2進化10進
信号により表示セグメントを駆動するBCD7セグ
メント駆動回路3と、桁選択信号により表示桁を
選択する桁駆動回路5と、両方の駆動回路3,5
に接続して積算値をデイジタル表示するLED表
示器4とからなる表示部1、及び検出回路Dから
の信号を分周して各分周段毎に信号を出力する設
定分周回路Aと、この回路Aの2進化10進信号端
子に選択的に接続して警報値を設定する警報設定
器Bと、警報設定器Bからの出力信号を分周して
倍率を設定する1/10分周器C,Cとよりなる警報
設定部Eからの信号により響報回路Fを駆動する
ように構成されていた。この表示警報設定回路に
おいては、警報値の設定に設定分周回路を、倍率
の設定に分周回路を必要とするため、回路構成が
複雑化し、コストの上昇を招くという問題があつ
た。
The display alarm setting circuit of radiation measuring equipment, etc.
As shown in the figure, the signal from the detection circuit D that integrates the signals from the detector and outputs the integrated value is input, and based on this, the signal is outputted as a binary coded decimal signal and a digit selection signal. A split drive circuit 2, a BCD7 segment drive circuit 3 that drives display segments with a binary coded decimal signal, a digit drive circuit 5 that selects a display digit with a digit selection signal, and both drive circuits 3, 5.
a display section 1 consisting of an LED display 4 connected to the LED display 4 to digitally display the integrated value; and a setting frequency divider circuit A that divides the signal from the detection circuit D and outputs a signal for each frequency division stage; Alarm setting device B is selectively connected to the binary coded decimal signal terminal of circuit A to set the alarm value, and 1/10 frequency division is used to divide the output signal from alarm setting device B and set the magnification. The alarm circuit F was configured to be driven by a signal from an alarm setting section E consisting of devices C and C. This display alarm setting circuit requires a setting frequency divider circuit for setting the alarm value and a frequency divider circuit for setting the magnification, resulting in a complicated circuit configuration and an increase in cost.

本考案はこのような問題に鑑み、デイジタル表
示器を駆動する時分割駆動回路からの2進化10進
信号及び桁選択信号を設定値に応じて選択し、こ
の信号によりアンド回路を形成するダイオードを
介して警報器に入力することにより、響報設定分
周回路や倍設率定用の分周手段を不要とした表示
警報設定回路を提供することを目的とする。
In view of these problems, the present invention selects the binary coded decimal signal and digit selection signal from the time division drive circuit that drives the digital display according to the set values, and uses these signals to select the diodes forming the AND circuit. It is an object of the present invention to provide a display alarm setting circuit which eliminates the need for a sound alarm setting frequency dividing circuit or a frequency dividing means for setting a multiplier setting rate by inputting the signal to an alarm device via the alarm.

そこで、以下に本考案の詳細を図示した実施例
に基づいて説明する。
Therefore, the details of the present invention will be explained below based on illustrated embodiments.

第2図は、本考案の一実施例を示す装置のブロ
ツク図であつて、図中符号1は、デイジタル表示
部で、放射線検出回路Dからの信号が入力する時
分割駆動回路2からの2進化10進信号はBCD7セ
グメント駆動回路3を介し、桁選択信号は桁駆動
回路5を介してLED表示器4に出力し、検出回
路Dからの信号をデジタル表示するように構成さ
れている。6は、本考案の特徴部分をなす警報設
定回路で、表示部における時分割駆動回路2の2
進化10進信号の出力端子の各々に第1のダイオー
ド7a,7b,7c,7dのカソードが接続し、
アノードは選択スイツチS1,S2,S3,S4
からなる警報設定器8を介して第2のダイオード
9のアノードに接続している。第2のダイオード
9は、カソードを切り換えスイツチからなる倍率
設定器10を介して時分割駆動回路2の桁選択信
号出力端子に接続し、アノードを正極性の電源V
に接続した負荷抵抗11に接続して第1のダイオ
ード7a,7b,7c,7dとアンド回路を形成
している。この負荷抵抗11とダイオード9の接
続点には負荷抵抗11の端子電圧を検出し、零電
位になつたときに作動する警報回路12を接続し
て構成されている。
FIG. 2 is a block diagram of an apparatus showing an embodiment of the present invention, in which reference numeral 1 is a digital display unit, and 2 from the time division drive circuit 2 to which the signal from the radiation detection circuit D is input. The evolved decimal signal is outputted via the BCD 7 segment drive circuit 3, the digit selection signal is outputted to the LED display 4 via the digit drive circuit 5, and the signal from the detection circuit D is configured to be digitally displayed. Reference numeral 6 denotes an alarm setting circuit which is a characteristic part of the present invention, and is connected to the time division drive circuit 2 in the display section.
The cathodes of first diodes 7a, 7b, 7c, and 7d are connected to each of the output terminals of the evolved decimal signal,
The anode is a selection switch S1, S2, S3, S4
The anode of the second diode 9 is connected to the anode of the second diode 9 via an alarm setting device 8 consisting of the following. The second diode 9 has its cathode connected to the digit selection signal output terminal of the time division drive circuit 2 via a magnification setting device 10 consisting of a switch, and its anode connected to the positive polarity power supply V.
The first diodes 7a, 7b, 7c, and 7d form an AND circuit. An alarm circuit 12 is connected to the connection point between the load resistor 11 and the diode 9, which detects the terminal voltage of the load resistor 11 and is activated when the voltage reaches zero potential.

この実施例において、警報設定器8及び倍率設
定器10により所定の値、例えば警報値を「8」
に、倍率を「10」に設定する。このような状態に
おいて、検出回路Dからの計測値が入力すると、
計測値は表示器4によりデイジタル表示される。
この段階では、計測値は、設定値と一致しないの
で、選択されたダイオード7d,9を通じて負荷
抵抗11から時分割駆動回路2にいたる導電路が
形成されて負荷抵抗11が零電位となり、警報回
路12は作動されない。このようにして計測を継
続していくうち、計測値が警報値及び倍率に一致
すると、時分割駆動回路2からの2進化10進信号
及び桁選択信号によりダイオード7d及び9がカ
ツトオフとなり、負荷抵抗11から時分割駆動回
路2にいたる導電路が遮断されて負荷抵抗11の
端子電圧が上昇し、これを警報回路12が検出し
て警報を発する。
In this embodiment, a predetermined value, for example, an alarm value, is set to "8" by the alarm setting device 8 and the magnification setting device 10.
, set the magnification to "10". In such a state, when the measurement value from the detection circuit D is input,
The measured value is digitally displayed on the display 4.
At this stage, the measured value does not match the set value, so a conductive path is formed from the load resistor 11 to the time division drive circuit 2 through the selected diodes 7d and 9, and the load resistor 11 becomes zero potential, and the alarm circuit 12 is not activated. As the measurement continues in this way, when the measured value matches the alarm value and the magnification, the diodes 7d and 9 are cut off by the binary coded decimal signal and digit selection signal from the time division drive circuit 2, and the load resistance 11 to the time division drive circuit 2 is cut off, the terminal voltage of the load resistor 11 increases, and the alarm circuit 12 detects this and issues an alarm.

以上、説明したように本考案によれば、デイジ
タル表示用の時分割駆動回路の2進化10進信号を
桁選択信号をそれぞれ切り換え選択手段を介して
ダイオード接続し、その接続点の電位を検出する
ようにしたので、警報設定回路に分周回路を必要
とすることなく、簡単な構成により警報設定回路
を実現することができる。
As explained above, according to the present invention, the binary coded decimal signal of the time division drive circuit for digital display is connected to a diode through a selection means for switching each digit selection signal, and the potential at the connection point is detected. As a result, the alarm setting circuit can be realized with a simple configuration without requiring a frequency dividing circuit in the alarm setting circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の表示警報設定回路の一例を示
すブロツク図、第2図は、本考案の一実施例を示
す回路のブロツク図である。 8……警報設定器、10……倍率設定器。
FIG. 1 is a block diagram showing an example of a conventional display alarm setting circuit, and FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention. 8...Alarm setting device, 10...Magnification setting device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 検出信号を2進化10進信号と桁選択信号に変換
する時分割駆動手段と、該手段からの信号により
計測値を表示するデジタル表示手段と、前記時分
割駆動手段の各2進化10進信号にダイオードを介
して接続する警報値設定手段と、前記時分割駆動
手段の桁選択信号を選択する倍率設定手段と、前
記警報値設定手段の出力と倍率設定手段の出力を
接続するダイオードと、該ダイオードの警報値設
定手段側の電位変化により作動する警報手段とか
らなる表示警報設定回路。
a time division drive means for converting the detection signal into a binary coded decimal signal and a digit selection signal; a digital display means for displaying the measured value by the signal from the means; and a time division drive means for each binary coded decimal signal of the time division drive means. an alarm value setting means connected via a diode, a magnification setting means for selecting a digit selection signal of the time division driving means, a diode connecting the output of the alarm value setting means and the output of the magnification setting means, and the diode. A display alarm setting circuit consisting of an alarm means activated by a potential change on the alarm value setting means side.
JP5385683U 1983-04-11 1983-04-11 Display alarm setting circuit Granted JPS59161016U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5385683U JPS59161016U (en) 1983-04-11 1983-04-11 Display alarm setting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5385683U JPS59161016U (en) 1983-04-11 1983-04-11 Display alarm setting circuit

Publications (2)

Publication Number Publication Date
JPS59161016U JPS59161016U (en) 1984-10-29
JPH0210404Y2 true JPH0210404Y2 (en) 1990-03-15

Family

ID=30184202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5385683U Granted JPS59161016U (en) 1983-04-11 1983-04-11 Display alarm setting circuit

Country Status (1)

Country Link
JP (1) JPS59161016U (en)

Also Published As

Publication number Publication date
JPS59161016U (en) 1984-10-29

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