JPH02106341U - - Google Patents
Info
- Publication number
- JPH02106341U JPH02106341U JP1591789U JP1591789U JPH02106341U JP H02106341 U JPH02106341 U JP H02106341U JP 1591789 U JP1591789 U JP 1591789U JP 1591789 U JP1591789 U JP 1591789U JP H02106341 U JPH02106341 U JP H02106341U
- Authority
- JP
- Japan
- Prior art keywords
- tint
- pattern
- memory
- patterns
- shift
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 230000002950 deficient Effects 0.000 description 1
Landscapes
- Dot-Matrix Printers And Others (AREA)
Description
第1図は本考案の印字装置の一実施例のブロツ
ク図、第2図は第1図のアミ点パターン発生回路
11によるアミ点パターンの展開図、第3図は印
字装置の従来例のブロツク図、第4図はアミ点パ
ターンの例を示すパターン図、第5図は第3図の
印字装置によるアミ点パターン展開の不具合な例
を示す展開図である。
1……文字パターン記憶領域、2,3……シフ
トレジスタ、4……切換回路、5……メモリ、6
……制御回路、7……出力処理回路、8……出力
コントローラ、9……出力バツフアメモリ、10
……プリンタピンヘツド、11……アミ点パター
ン発生回路、12,13……信号、21,22,
23,24……アミ点パターン、31,32,3
3……列。
FIG. 1 is a block diagram of an embodiment of the printing device of the present invention, FIG. 2 is a developed diagram of a tint pattern generated by the tint pattern generation circuit 11 of FIG. 1, and FIG. 3 is a block diagram of a conventional printing device. 4 is a pattern diagram showing an example of a tint pattern, and FIG. 5 is a developed diagram showing an example of a defective tint pattern development by the printing apparatus of FIG. 1... Character pattern storage area, 2, 3... Shift register, 4... Switching circuit, 5... Memory, 6
... Control circuit, 7 ... Output processing circuit, 8 ... Output controller, 9 ... Output buffer memory, 10
... Printer pin head, 11 ... Tint pattern generation circuit, 12, 13 ... Signal, 21, 22,
23, 24... Tint pattern, 31, 32, 3
3...row.
Claims (1)
いて、 シフトクロツクによりリングカウンタとしてパ
ルスを繰返し発生する第1、第2のシフトレジス
タと、 第1、第2のシフトレジスタのそれぞれの内容
を切換えて出力する切換回路と、 前記切換回路より入力した第1、第2のシフト
レジスタの内容を一時蓄えるメモリと、 外部よりアミ点パターンの濃度設定値が指示さ
れると、第1のシフトレジスタにシフトパルスの
前記濃度設定値によつて定まる一定パルス数ごと
のビツトを“1”としたアミ点パターンの1列分
を発生させて前記切換回路を介して前記メモリに
格納させ、つづいて全てゼロよりなるアミ点パタ
ーン列を前記濃度設定値によつて定まる前記一定
パルス数の数より小なる一定回数送出させて前記
メモリに格納させたのち、第2のシフトレジスタ
に第1のシフトレジスタが発生したアミ点パター
ン列より前記濃度設定値によつて定まる前記一定
パルス数より小なる一定パルス数だけシフトされ
たアミ点パターンの1列分を発生させて前記切換
回路を切換えて該1列分を前記メモリに格納させ
、つづいて全てゼロよりなるアミ点パターン列を
同様に前記一定回数前記メモリに格納させる動作
を繰返して一文字分のアミ点パターンを形成させ
、かつ、前記1文字分のアミ点パターンの複数個
のマトリツクス状展開面のサイズを指定する外部
より与えられたパターン展開信号にもとづいて前
記アミ点パターンを繰返し発生することにより指
定されたサイズのパターン展開面を形成させる制
御回路とより構成されたアミ点パターン発生回路
を有することを特徴とする印字装置。[Claims for Utility Model Registration] In a printing device that prints characters and other patterns, first and second shift registers that repeatedly generate pulses as a ring counter using a shift clock; a switching circuit that switches and outputs the contents; a memory that temporarily stores the contents of the first and second shift registers input from the switching circuit; and a memory that temporarily stores the contents of the first and second shift registers input from the switching circuit; Generating one column of a tint pattern in which bits are set to "1" at every fixed number of pulses determined by the density setting value of the shift pulse is generated in the shift register and stored in the memory via the switching circuit; After transmitting a tint pattern string consisting of all zeros a certain number of times smaller than the certain number of pulses determined by the density setting value and storing it in the memory, a first shift is sent to a second shift register. The resistor generates one row of tint patterns shifted by a fixed number of pulses smaller than the fixed number of pulses determined by the density setting value from the row of tint patterns generated by the register, and switches the switching circuit to generate the one row of tint patterns. A series of dot patterns are stored in the memory, and then a series of tint dot patterns consisting of all zeros is similarly stored in the memory a certain number of times to form a dot pattern for one character, and a dot pattern for one character is formed. control for forming a pattern development surface of a specified size by repeatedly generating the tint pattern based on an externally applied pattern development signal that specifies the size of a plurality of matrix-like development surfaces of the tint pattern; 1. A printing device characterized by having a tint pattern generation circuit composed of a circuit and a dot pattern generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1591789U JPH02106341U (en) | 1989-02-13 | 1989-02-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1591789U JPH02106341U (en) | 1989-02-13 | 1989-02-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02106341U true JPH02106341U (en) | 1990-08-23 |
Family
ID=31228392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1591789U Pending JPH02106341U (en) | 1989-02-13 | 1989-02-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02106341U (en) |
-
1989
- 1989-02-13 JP JP1591789U patent/JPH02106341U/ja active Pending
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