JPH0210762A - Capacitor - Google Patents

Abstract

PURPOSE:To make it in structure suitable for integration by equipping an insulating film on the first electrode having a step at the side face. CONSTITUTION:A first electrode 6 is composed of polysilicon layers 6a-6c of three layers. The end part of the layer 6b is retreated from the end parts of the layers 6a and 6c. That is, step parts (recesses) are formed between the layers 6a and 6c on both sides of the electrode 6. An SiO2 film 7 is formed covering one side mainface and side faces of the electrode 6 as shown in the figure. A second electrode 8 consisting of polysilicon is formed oppositely to the electrode 6 on this film 7. Since a larger opposed area, that is, larger capacitance can be secured even if the integration degree is the same, because the formation area of the film 7 is added to the opposed area of the conventional capacitor as the opposed area between the electrodes 8 and 6 this way, it can be made in structure suitable for integration.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an electrode structure of a capacitor.

[Conventional technology]

FIG. 3 is a sectional view showing a conventional capacitor used in a memory capacitor such as a DRAM. In the same figure, 1
is a P-type silicon substrate, 2 is a field oxide film for isolation between elements, 3a and 3b are field effect transistors (
FET) source/drain region. This source drain region 3a.

A gate oxide g14 is formed on the p-type silicon substrate 1 between 3b, and a gate electrode 5 of the FET made of polycrystalline silicon (polysilicon) is formed on this gate oxide film 4.

Further, a first electrode 6 of a memory capacitor made of polysilicon is formed on one source/drain region 3a. A silicon oxide (S i O 2 ) film 7 is formed on the side surface of the first electrode 6 and the - sumo wrestler surface. Further, a second electrode v7A8 made of polysilicon is formed on this SiO□ film 7, facing the first electrode 6, and the first electrode 6 is made of polysilicon. The second electrodes 6, 8 and 5021197 constitute a memory capacitor. Note that the gate electrode 5 of the FET and the first . In order to prevent electrical contact with the second electrode 6.8, an insulating film 9 is formed between the two.

Furthermore, a metal wiring 10 made of aluminum or the like is formed on the other source/drain region 3b. By forming in this way, a memory cell of 1 transistor + 1 gear and 11 vacitas is constructed.

[Problem to be solved by the invention]

Conventional capacitors used in DRAM memory cells and the like have been constructed as described above.

Therefore, with the increase in integration, the first.
There was a problem in that the opposing area between the second electrodes 6 and 8 became small, making it difficult to obtain a sufficient capacity as a memory capacitor.

This invention was made to solve the above-mentioned problems, and it is an object of the present invention to obtain a capacitor with a structure suitable for integration, which can secure a capacity that can function as a memory capacitor, for example, even in the case of high integration. With the goal.

[Means to solve the problem]

A capacitor according to the present invention includes: a first electrode having a step portion on a side surface; an insulating film formed on at least one principal surface of the first electrode and the side surface having the step portion; and the insulating film. and a second electrode formed opposite to the first electrode.

[Effect]

Since the first electrode in this invention has a step portion on the side surface, the area of the insulating film formed on the step portion is as follows:
The size increases depending on the size of the step.

〔Example〕

FIG. 1 is a sectional view showing a capacitor functioning as a memory capacitor (I capacitor) of a DRAM which is an embodiment of the present invention. do.

Unlike the conventional method, the first electrode 6 is made of three polysilicon layers 6.
Consists of a to 6C. The ends of polysilicon layer 6b are set back from the ends of polysilicon layers 16a and 6c. In other words, the polysilicon layer 6 on both sides of the first electrode 6
A step portion (recess) is formed between 8 and 6C.

A 3i02 film 7 is formed to cover one main surface and side surfaces of the first electrode 6, as shown in the figure. A second electrode 8 made of polysilicon is formed on this SiO2 film 7, facing the first electrode 6.

FIGS. 2(a) to 2(f) are sectional views each showing a method of manufacturing the memory capacitor shown in FIG. 1. The IJ manufacturing method will be explained below with reference to the same figure.

3a, 3b, 4. on a p-type silicon substrate 1 by a known method.
5, an insulating film 9a is formed on the gate electrode 5 and part of the source/drain regions 3a and 3b. Then, as shown in FIG. 5A, a polysilicon layer 6a is formed on the region of the source/drain region 1113a where the insulation 19a is not formed.

Next, a polysilicon layer 6b is formed on the polysilicon 116a, and as shown in FIG.
s) Doping with an impurity l of 'S.

Then, a polysilicon layer 6C is formed on this polysilicon layer 1li6b as shown in FIG. A resist 11 is applied on this polysilicon JieC, as shown in the figure (d).
Patterning is performed into the desired shape using photolithography as shown in FIG.

Then, using the patterned resist 11 as a mask, isotropic dry etching is performed on the polysilicon Jii6a to 6C.

At this time, since the etching speed of the polysilicon layer 6b doped with impurities such as phosphorus and arsenic is faster than that of the other polysilicon layers 5a and 5c, the polysilicon layer 6b is etched as shown in FIG. The end is made of polysilicon m6a,
The shape is set back from the end of 6c. Therefore, the first electrode 6 made of these polysilicon layers 16a to 6C has stepped portions on both sides thereof.

Then, by oxidizing the exposed portion of the first electrode 6 using a thermal oxidation method, the first 1 is removed from the electrode 6 as shown in FIG.
A Sin film 7 is formed on one main surface and both side surfaces.

Then, a second electrode 7 made of polysilicon is formed on this 5102 film 7, facing the first electrode 6, and a memory capacitor is formed by this, the first electrode 6, and the SiO2 film 7. Configure. Then, by covering the whole with an insulating film 9b, the insulation r49a is formed.

An insulating film 9 in which 9b is integrated is formed. Then, a contact hole 12 is formed in a part of the insulator g19 that exists on the source/drain region 3b, and a metal wiring 10 is formed through this contact hole 12, thereby forming a memory area as shown in FIG. is produced.

By configuring the memory capacitor in this way, the formation area of the SiO2 film 7 that covers the stepped portion between the five layers of the polysilicon 1li5a of the first electrode 6 is reduced to the area of the first electrode 6 via the 5i02 film 7. Since the opposing area between the second electrodes 8 is added to the opposing area of the conventional capacitor, even if the degree of integration is the same, a larger opposing area, that is, a larger capacity can be ensured compared to the conventional capacitor.

As a result, it is possible to realize a Vacitor structure that can function satisfactorily as a memory capacitor even when integrated.

d3. In this example, the first electrode 6 is formed of 3M polysilicon layers 6a to 6C, but even if it has a two-layer structure, four-layer structure, or more, it is better to use polysilicon layers with different etching speeds α. Any formed electrode can be used instead. In this case, as in the embodiment, a step portion can be formed on the side surface of the electrode by recessing at least one end of the polysilicon layer from the end of the other polysilicon layer.

Further, although polysilicon is used as the electrode of the memory capacitor in this embodiment, other conductive materials can be used as a substitute if a multilayer structure in which the ends do not coincide can be realized.

Furthermore, even if the first electrode is a single layer, if a stepped portion can be formed on the side surface by combining anisotropic etching and isotropic etching in the etching process for forming the first electrode, This invention can be applied.

Further, although the SiO2 film is used as the insulating film of the memory capacitor, the insulating film may be formed of other materials such as a two-layer structure of an SiO2 film and a nitride film.

Further, although this embodiment shows a capacitor that functions as a memory capacitor, the present invention can be applied to other fields as long as a capacitor suitable for integration is required.

〔Effect of the invention〕

As described above, according to the present invention, a first electrode having a step portion on a side surface, an insulating film formed on at least one main surface of the first electrode and a side surface having a step portion, and Since a recapacitor is formed on the film with a second electrode facing the first electrode, the opposing area between the first and second electrodes is adjusted depending on the size of the stepped portion on the side surface of the first electrode. This has the effect of making it possible to increase the size and realizing a structure suitable for integration.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a capacitor according to an embodiment of the present invention, FIG. FIG. In the figure, 6 is a first electrode, 6a to 6C are polysilicon layers, 7 is an S:O2 film, and 8 is a second electrode. In addition, the same reference numerals in each figure refer to the same or equivalent parts. Figure 1 Agent: Masu Oiwa, 8 years old, 2 years old, Figure 1, Showa era

Claims (1)

[Claims] (1) a first electrode having a stepped portion on a side surface; an insulating film formed on at least one main surface of the first electrode and the side surface having the stepped portion;
a second electrode formed opposite to the electrode of the capacitor.