JPH02109251U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an embodiment of this invention, Fig. 2 is a diagram illustrating tracking of gates, received echoes, and echo heights when flaw detection is performed using an ultrasonic flaw detection device according to this invention. Figures 3 and 4 are diagrams when the probe scans a defect, Figure 5 is a diagram showing a conventional ultrasonic flaw detection device, and Figures 6, 7, and 8 are diagrams showing a case in which the probe scans a defect. FIG. 4 is a diagram for explaining tracking of gates, received echoes, and echo heights when flaw detection is performed using a method. In the figure, 1 is a steel plate that is a test specimen, 2 is a roller that conveys the test specimen, 3 is a conveyance direction,
4 is a defect inside the test object, 5 is a probe, 6 is a couplant, 7 is an ultrasonic wave emitted from the probe, 8 is a cable, 10 is a transmitting/receiving circuit, 11 is a reference clock generation circuit, and 12 is a gate. circuit, 13 is a comparison circuit, 14
15 is an echo height tracking circuit, 15 is a tracking amount setting circuit,
16 is an echo height holding circuit, 17 is a judgment circuit, 1
8 is a display circuit, 20 is a continuity determination circuit, 21 is an echo difference calculation circuit, 22 is an arithmetic circuit, 23 is a continuity number setting switch, 30 is a transmission pulse, 31 is a received echo, 32 is a defective echo, and 33a and 33b are comparisons. Output, 34 is follow-up echo output, 40a and 40b
is a continuity output, and 50 is a gate signal. In addition,
In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] In a device that repeatedly transmits ultrasonic pulses from the outer surface into the inside of a steel plate or steel pipe that is a test object and receives the ultrasonic pulses or reflected ultrasonic pulses, a reference clock generation circuit that generates a synchronization signal, and the above-mentioned A transmitting/receiving circuit that transmits in synchronization with a synchronization signal generated from the circuit and receives an electrical signal (received echo) converted from ultrasound by a probe, and a gate that applies a gate on the time axis of the received echo. A gate circuit extracts the echo within the gate, a comparison circuit compares the height of the echo extracted from the gate circuit with the height of the previous follow-up echo, and determines the continuity of the echo height from the comparison result of the comparison circuit. an echo difference calculation circuit that calculates the difference between the height of the echo taken out from the gate circuit and the height of the previous follow-up echo; and a follow-up amount setting circuit that sets the follow-up amount of the follow-up echo. , an operation for calculating a follow-up echo height by following the follow-up amount set by the follow-up amount setting circuit or the echo height difference calculated by the echo difference calculation circuit based on the output from the continuity determination circuit; An ultrasonic flaw detection device comprising: a circuit; and a determination circuit that determines the presence or absence of a defect based on the output of the arithmetic circuit.