JPH0212326A - Disk controller - Google Patents

Abstract

PURPOSE:To shorten a processing time with a disk controller by performing simultaneously the transfer of data to a disk device and the transfer of data to a main memory. CONSTITUTION:The parity check circuits 12-15 perform the parity check of the data stored in the sector buffers 1 and 2 which store the data equivalent to one sector respectively as well as the data stored in the additional sector buffers 3 and 4 which are set opposite to the buffers 1 and 2 and store the same data as those of buffers 1 and 2. Then the comparators 16 and 17 perform the comparison between the data stored in the buffers 1 and 2 and the data stored in the buffers 3 and 4. Based on the result of said comparison, the selectors 18 and 19 select the data of the buffers 1 and 2 or the data of the buffers 3 and 4 and transfer the selected data to a main memory. As a result, the transfer of data to a disk device is carried out simultaneously with the transfer of data to the main memory. Thus the processing time is shortened with the small circuit value.

Description

[Detailed description of the invention] Once again! The present invention relates to a disk control device, and more particularly to data transfer processing between a disk device and a main storage device performed via the disk control device.

Conventionally, disk control devices have been designed to control the maximum amount of data that can be retrieved with a single command in order to compensate for the difference in transfer speed and asynchronous operation in the data transfer process between the main storage device and the disk device. It is common that a full sector buffer capable of storing an amount of data is configured as a data buffer.

Therefore, if the disk controller is configured with all sector buffers as data buffers, data transfer to and from the disk device must be started after all data transfer to and from the main storage device is completed. Because data transfer to and from the main storage device must be started after all data transfers to and from the disk device have been completed, the time required for one command is shorter than the data transfer to and from the main storage device. This is the sum of the transfer time and the data transfer time between the disk device and requires a lot of processing time, and the capacity of the disk control device is determined by the capacity of all sector buffers. , and has the disadvantage that the amount of circuitry increases.

Furthermore, if all sector buffers fail, not only will data transfer not be performed normally from now on, but reliability will also be affected, as even if data is transferred incorrectly and abnormal data is transferred, it will not be possible to detect it. Low (low), it has the disadvantage that it is difficult to determine the location of the failure due to the large amount of circuitry.

The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and it can shorten the processing time, improve the reliability of hardware, and easily locate faulty parts of the circuit. The object of the present invention is to provide a disk control device that can make a determination.

A disk control device according to the present invention alternately stores data read from a disk device in first and second sector buffers, and stores the data stored in the first and second sector buffers. A disk control device that alternately transfers data to a main storage device, the first and second sector buffers being provided corresponding to each of the first and second sector buffers and storing the same data as the corresponding sector buffers, respectively. an additional sector buffer; first and second sector buffer fault detection means for detecting the presence or absence of a fault in data stored in each of the first and second sector buffers; first and second additional sector buffer failure detection means for detecting the presence or absence of a failure in data stored in each buffer; detection results of the first or second sector buffer failure detection means and the first or second additional sector buffer failure detection means; one of the data stored in the first or second sector buffer and the data stored in the first or second additional sector buffer according to the detection result of the additional sector buffer failure detection means of It is characterized in that it has a selection means for making a selection, and data selected by the selection means is transferred to the main storage device.

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG. 7.8, sector buffer switching circuits 9 and 2 parity generators 10.11, parity check circuits 12 to 15, comparators 16.17, and selector 18
．． 19 and a controller 20.

The sector buffer 1.2 stores data for one sector, which is a unit of reading and writing in a disk device (not shown).

Additional sector buffers 3.4 correspond to sector buffers 1 and 2, respectively, and store the same data as that stored in each of sector buffers 1 and 2.

The counter 7.8 has a built-in flag 5.6 indicating that data is stored in the sector buffer 1.2 and the additional sector buffer 3.4, respectively. A read address or a write address is supplied to each of the sector buffers 1 and 4, and the amount of data transferred from each of the sector buffers 1 and 2 and additional sector buffers 3 and 4 to the main memory (not shown) is counted.

The sector buffer switching circuit 9 determines a read state or a write state for each of the sector buffers 1.2 and additional sector buffers 3.4, and each of the sector buffers 1, 2 and additional sector buffers 3.4 serves as a main storage device. The data transfer state in the sector buffer r1.2 and the additional sector buffer 3.4 is controlled by distinguishing whether the sector buffer r1.2 and the additional sector buffer 3.4 are used for data transfer between the disk drive and the disk drive.

Parity generator 10.11 generates a parity bit and adds it to the data when writing data to each of sector buffer 1.2 and additional sector buffer 3.4.

Parity check circuits 12-15 perform a parity check on the data written in sector buffer 1.2 and additional sector buffer 3.4, respectively, using parity bits added to the data by parity generators 10-11.

Comparators 16, 17 compare the data read from sector buffer 1.2 and the data read from additional sector buffer 3.4, respectively, and detect whether these data match.

The selectors 18 and 19 select read data from the sector buffer 1.2 and read data from the additional sector buffers 3 and 4 according to the check results of the harness check circuits 12 to 15 and the comparison results of the comparators 16 and 17. Select one of the data. The controller 20 also controls data transfer with the disk device.

Next, the case of reading data from the disk device will be explained.

When a read command is given to the disk controller, flags 5 and 6, counters 7 and 8, and sector buffer switching circuit 9
are initialized, and the bus 1 is initialized under the control of the controller 20.
The read data from the disk device transferred via the internal bus 103 is sequentially stored in the sector buffer T1 and the additional sector buffer 3 designated by the sector buffer switching circuit 9 via the internal bus 103.

Data sequentially stored in sector buffer 1 and additional sector buffer 3 is counted by counter 7.

Further, a parity bit generated by the parity generator 10 is added to the data, and the data is stored in the sector buffer 1 and the additional sector buffer 3.

When the data transfer for one sector from the disk device is completed, the flag 5 becomes logic "1" and the data transfer process is temporarily stopped. At this time, the sector buffer switching circuit 9 switches the sector buffer that stores the data read from the disk device. In other words, the sector buffer that stores read data from the disk device is
Sector buffer r1 and additional sector buffer 3 are switched to sector buffer T2 and additional sector buffer 4.

When this switching to the sector buffer 2 and the additional sector buffer 4 is performed, the transfer of read data from the disk device is restarted under the control of the controller 20, and in the same manner as described above, the read data from the disk device is transferred to the sector. The data is stored in buffer 2 and additional sector buffer 4.

At this time, since flag 5 indicating the amount of data in sector buffer 1 and additional sector buffer 3 is logic "1", sector buffer 1 or additional sector buffer 3
The data stored in is transferred to the main storage device via the selector 18, internal bus IQ4, and bus 102.

In other words, at this point, there is a process in which read data from the disk device is stored in sector buffer 2 and additional sector buffer 4, and a process in which read data from sector buffer 1 or additional sector buffer 3 is transferred to the main storage device. It will be done at the same time.

Moreover, sector buffer 1 or additional sector buffer 3
The data transfer speed between the main storage device and the main storage device does not depend on the transfer speed between the disk device and the sector buffer, as long as it is within the processing time of one sector of the disk device, and the data transfer speed between the main storage device and the disk control device is Determined solely by bus 102 usage.

Data transfer from sector buffer 1 or additional sector buffer 3 to the main memory is performed sequentially, and when data transfer for one sector is completed, flag 5 becomes logic "0" and data is transferred from sector buffer 1 or additional sector buffer 3 to main memory. Data transfer to main storage is interrupted.

Further, when the data transfer process for one sector from the disk device to the sector buffer 2 and the additional sector buffer 4 is completed, the flag 6 becomes logic "1" and the data transfer process is temporarily stopped.

At this time, the sector buffer switching circuit 9 switches the sector buffer that stores read data from the disk device and the sector buffer that transfers data to the main storage device.

That is, the sector buffer that stores read data from the disk device is switched from sector buffer 2 and additional sector buffer 4 to sector buffer 1 and additional sector buffer 3, and the sector buffer that transfers data to the main storage device is switched from sector buffer 2 and additional sector buffer 4 to sector buffer 1 and additional sector buffer 3. 1 and additional sector buffer 3 are switched to sector buffer 2 and additional sector buffer 4.

As in the above operation, data transfer to and from the disk device and data transfer to and from the main storage device are performed at the same time.
By repeating the above operation for the number of sectors given by the command, data transfer from the disk device to the main storage device is completed.

Next, when data is transferred from sector buffer 1 or additional sector buffer 3 to the main memory device, failure detection processing for read data read from sector buffer 1 or additional sector buffer 3 will be described.

When data is transferred from sector buffer 1 or additional sector buffer 3 to the main memory device, data is read from both sector buffer 1 and additional sector buffer r3.

At this time, the data read from the sector buffer 1 and the additional sector buffer 3 are verified by the comparator 16 to see if the data read from the sector buffer 1 and the data read from the additional sector buffer 3 match. Check circuits 12 and 14 perform a parity check on data read from sector buffer 1 and data read from additional sector buffer 3.

Comparison result of comparator 16 and parity check circuit 12
．． As a result of the parity check in step 14, the data read from sector buffer 1 and the data read from additional sector buffer 3 match, and the data read from sector buffer 1
When it is determined that there is no error in the read data from the sector buffer T3 and the data read from the additional sector buffer T3, the selector 18 selects the read data from sector buffer 1 and transfers it to the main memory. In this case, there is no problem even if the selector 18 selects the read data from the additional sector buffer 3.

When the comparator 16 detects a mismatch between the read data from the sector buffer 1 and the subsequent data from the additional sector buffer 3, the parity check circuit 12 detects an error in the read data from the sector buffer 1. When the selector 18 selects the read data from the additional sector buffer 3 and the parity check circuit 14 detects an error in the read data from the additional sector buffer 3, the selector 18 selects the read data from the sector buffer 1. Read data is selected and transferred to main memory.

As mentioned above, when an error is detected in the read data from sector buffer 1 or additional sector buffer 3,
If you set a transfer time that is long enough to last even when switching to normal technique data, or if you control the transfer time to extend when a switch to read data occurs, data transfer can be performed without stopping. can.

Furthermore, the comparison a16 detects a match between the data read from the sector buffer 1 and the data read from the additional sector buffer 3, and the parity check circuit 12.14 checks the data read from both the sector buffer 1 and the additional sector buffer 3. If an error is detected, or if the comparator 16 detects a mismatch between the data read from sector buffer 1 and the data read from additional sector buffer 3, parity check circuits 12 and 14 check both sector buffer 1 and additional sector buffer 3. If no error is detected in the read data, data transfer is stopped as a circuit failure and reported to the system.

The operations of the parity check circuits 13, 15, the comparator 17, and the selector 1 when transferring data from the sector buffer 2 or the additional sector buffer 4 to the main memory are also performed by the parity check circuits 12, 111, comparator 16, The operation is similar to that of the selector 18.

By controlling as described above, the additional sector buffers 3.4 operate even if an error is detected in the data in the sector buffers 1.2, so that data transfer can be performed without stopping the apparatus.

In addition, since it is equipped with parity check circuits 12 to 15 and comparators 16 and 17 as data error detection circuits, the reliability of the hardware is improved, and if an error is detected in the data, the system is By reporting that an error has been detected, it is possible to easily determine the location of a fault in the circuit.

The operation when writing data to a disk device is basically the same as when reading data, except the direction of data transfer is different from when reading data. Therefore, a description of the operation when writing data to the disk device will be omitted.

In this way, the parity check of the data stored in the sector buffer 1.2 that stores one sector worth of data and the additional sector buffer 3.4 that stores the same data as the corresponding sector buffer 1.2 is performed. -15 to the check circuit 12, and comparators 16 and 17 compare the data in the sector buffer 1.2 and the data in the additional sector buffer 3.4.
Depending on the result of step 15 and the result of comparator 16.17, selector ts and 19 select one of the data in sector buffers 1 and 2 and the data in additional sector buffer 3.4 and transfer it to the main memory. By doing so, data transfer processing between the disk device and the main storage device is performed at the same time, so processing time can be shortened with a small amount of circuitry compared to an all-sector buffer. I can do it.

Also, parity check circuits 12 to 15 and comparators 16.
17 detects errors in the data from sector buffer 1.2 and additional sector buffer 3.4.
Improved hardware reliability, sector buffers 1 and 2
Since the additional sector buffers 3 and 4 continue to operate even if an error is detected in the data, data transfer can be performed without stopping the device, and the location of a failure in the circuit can be easily determined.

As described above, according to the present invention, data alternately stored in the first and second sector buffers and read from the disk device and data stored in the first and second sector buffers respectively. The data stored in the correspondingly provided first and second additional sector buffers detects the presence or absence of a failure in the same data as those in the corresponding sector buffers, and depending on the detection result, the data is stored in the first and second additional sector buffers. The processing is performed by selecting one of the data stored in the first or second additional sector buffer and the data stored in the first or second additional sector buffer, and alternately transferring the selected data to the main storage device. This has the effect of reducing time, improving hardware reliability, and easily determining the location of a circuit failure.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Explanation of symbols of main parts 1.2...Sector buffer 3.4...Additional sector buffer 9...
Sector buffer switching circuits 12 to 15...Parity check circuit 16.17...Comparator 18.19...Selector

Claims (1)

[Claims] (1) A disk that alternately stores data read from a disk device in first and second sector buffers, and alternately transfers the data stored in the first and second sector buffers to the main storage device. The control device includes first and second additional sector buffers that are provided corresponding to each of the first and second sector buffers and store the same data as the corresponding sector buffers, and first and second sector buffer failure detection means for detecting the presence or absence of a failure in the data stored in each of the second sector buffers; and first and second additional sector buffer fault detection means for detecting the presence or absence of the buffer;
stored in the first or second sector buffer according to the detection result of the first or second sector buffer fault detection means and the detection result of the first or second additional sector buffer fault detection means. and a selection means for selecting one of the data stored in the first or second additional sector buffer, and the data selected by the selection means is transferred to the main storage device. A disk control device characterized by: