JPH02123443A - Data protecting device for electric apparatus - Google Patents

Abstract

PURPOSE:To protect data even when power disconnection is generated in writing operation by writing data stored in a buffer storage area in a memory at the time of restoring power supply when data are not normally written in a prescribed address of the memory due to the generation of power disconnection. CONSTITUTION:A data writing means 151 stores data generated from an electric apparatus to stored in a storage means 20 in a buffer storage area 20b, stores an address and a flag in a buffer storage area 20c and then writes these data in a main storage area 20a. Then power disconnection is generated during the writing, the means 151 writes the data stored in the area 20b in the area 20a by using the address of the area 20c in accordance with the detection of power restoration by a power restoration detecting means 24. Thus, data are protected even when power disconnection is generated in writing operation.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention relates to electrical equipment having a memory such as an EEPROM that stores various data generated within the equipment such as usage status of the equipment. The present invention relates to a data protection device for electrical equipment that protects stored data.

[Prior art and problems to be solved by the invention] For example, in CA T V Oi terminal equipment, IPPV (1 mpu
There is a viewing method in which paid programs are purchased on the spot using the pay per view function. In the case of this viewing method, when trying to watch a paid TV set, the CΔTV terminal jumps to the -H paid announcement channel, and the viewer presses the authorization key (AtJ゛I''HK).
By pressing EY), the desired paid program can be viewed. When the target pay program is tuned in this way, the pay program data included in the pay program's inhunt y' = evening is extracted and the usage status is
It is written to a memory such as E F ROM. The data written in this memory is collected periodically, for example once a month, by a center that transmits pay programs. Based on this collected information, Senku: t-'
-3' determines how much paid programs are viewed17 and is used when issuing a bill.

As mentioned above, the data stored in the memory of the CATV terminal is related to money and therefore cannot be rewritten.

By the way, data is written to the IEF ROM used as a memory in a CATV terminal at the timing shown in FIG. l101~1
At 1/s AO~A5 and data Do~・D15 inputted to 104 are taken into the internal buffer during the period ■ by t1 and C1, and K, and about 20 minutes of the following ■ and ■
During the 0 m5ec period, the previous data is erased (ERASE) by manually applying a sawtooth wave signal to the oscillation input O8C.
and new data is written (WRITE).

However, the power to the EEPROM may be momentarily cut off due to lightning, etc., and if this occurs during a period of about 200 m5ec during the above erasing and writing period, F of ■
The data that is not erased during the RΔSE period is
During the RITE period, there is a possibility that some data that will not be written will remain. In other words, if a power failure occurs during the erasing or writing period, incorrect data may be lost in the EEPR.
There is a possibility that the iJ may be written to the OM.

Therefore, the present invention prevents the data written to the memory from becoming half-baked or incorrect even if the power is cut off while data generated in the device is being written to the memory. The object of the present invention is to provide a data protection device for electrical equipment that can protect data.

[Failure to solve the problem]

In order to solve the problem described above, the data protection device for electrical equipment according to the present invention has a main memory for storing a plurality of data that occurs in the electrical equipment, as shown in the basic configuration diagram of Fig. 1. area 20a and the main storage area 20
A first buffer storage area 20b that temporarily stores write data to be written to a, and a second buffer storage area that stores an address and a flag on the main storage area 2Oa to which the write data is written. 20c, data writing means 151 for writing data into the storage means 20, and power return detection means 24 for detecting recovery from power cut.

The data writing means 151 writes the data to the storage means 2.
When data that should be stored in 0 occurs in the electrical equipment, the first and second buffer storage areas 20b and 20c
a first writing means 151d for writing data to be stored in the main storage area 20a, an address of the main storage area 20a for storing the data, and a first flag, respectively; a second writing means 151b for writing data to be stored in the main storage area 20a after writing by the second writing means 151a is completed; and a second buffer storage area after writing by the second writing means 151b is completed. A third writing means 20c writes a second flag different from the flag written by the first writing means 15a.
When the flag stored in the second buffer storage area 20c is the first flag, the first buffer is The data stored in the storage area 20b is transferred to the second buffer storage area 20c.
The fourth writing means 151d writes to the address of the main storage area 20a stored in the main storage area 20a.

[For production]

In the above configuration, in addition to the main storage area 20a in which the storage means 20 stores a plurality of data generated within the electrical equipment, the storage means 20 has a first storage area 20a in which write data to be written to the main storage area 20a is temporarily stored. Buffer storage area 2
0b, and a second buffer storage area 20c that stores an address and a flag on the main storage area 2Oa in which the write data is written,
The data writing means 151 uses the data, addresses, and flags stored in the first and second buffer storage areas 20b and 20c, and data is normally written to a predetermined address in the main storage area 20a when the power is turned off. When the data is not being performed, the fourth writing means 151d of the data writing means 151 writes to an area of a predetermined address in the main storage area 20a when the power is restored.

Therefore, incorrect data may be stored in the storage means 20 due to power interruption.
As a result, the data is protected.

〔Example〕

Embodiments of the present invention will be described below based on the drawings.

FIG. 2 is a block diagram showing the general configuration of a CATV terminal to which the data protection device for electrical equipment according to the present invention is applied. In the figure, the CATV terminal is connected to a center (not shown) via a transmission path such as a coaxial cable. The signals are connected to each other, and the RF signal consisting of video signals and the like is transmitted from the RF multiplication signal center through the transmission path. The transmission line is between the center and CAT
It is also used for mutual communication by exchanging various data with the V terminal.

The RF multiplied signal transmitted from the center is demultiplexed by a demultiplexer 11 and input to a converter 12 and a data receiving section 13 . The converter 12 selects a specific channel based on a channel selection signal from a controller 15 including a CPU, and converts the frequency of the signal of the selected channel. The frequency-converted signal of a specific channel is input to a descrambler 16, where if the signal is scrambled, it is descrambled under the control of the controller 15, otherwise it is passed through.

The signal passed through the descrambler 16 is input to the TV receiver 17 from the output terminal. The data receiving section 13 is connected to the R
Various data transmitted through a specific channel in the F signal are extracted and input to the controller 15.

A keyboard 18 for performing operations such as channel selection is connected to the controller 15, and generates the channel selection signal in response to the operation of a channel selection key on the keyboard 18.

In addition to the channel selection key, the keyboard 18 has many keys such as a power on/off key, a confirmation key to confirm that it is a paid program before viewing, a volume adjustment key, and a programmable timer setting key. , signals generated by operating these keys are input to the controller 15.

A display section 19 is also connected to the controller 15, and various status displays, messages, etc. are displayed on the display section 19 under the control of the controller 15.

The controller 15 further includes an EEPR for storing data indicating the viewing status of pay programs by the CATV terminal.
A memory 20 consisting of OM is connected, and the memory 2
The data stored in 0 is supplied from the controller 15 that controls whether or not paid programs can be viewed. When new data is written to the memory 20 under the control of the controller 15, the previous data is erased.

Note that 21 is a relay that is turned on and off under the control of the controller 15, and when the relay 21 is turned on, A
C100V power is supplied to the TV receiver 17. Also, 2
2 is a combiner 23 which transmits data indicating the past viewing status of pay programs stored in the memory 20 in response to a request from the center.
This is a data transmitter that sends data to the center via. Further, reference numeral 24 denotes a power return detection unit that detects that the power of the electrical equipment is restored after being turned off, and inputs the detection signal to the controller 15.

The memory card 20 has a map configuration as shown in FIG. 3, and each has addresses OO to 7F consisting of 16 bits. The area at addresses OO to 7I is the main storage area 20a for storing saved data, the area at address 7E is the first buffer storage area 20b used as data writing buffer 1, and the area at address 7F is for red writing. They constitute a second buffer storage area 20c for flags (1 bit) and addresses (15 bits).

In the following configuration, the CPU constituting the I-roller 15 performs the work according to the predetermined steps. The operation of the device will be explained below.

,:l controller 15 is the 4th and 1st Thoreau thousand year 1.
In the figure, in the first broadcast s1, it is determined whether the channel currently being tuned is a pay program or not based on the data transmitted by AM modulating the audio signal. If the determination in step s1 is YES, and the pay program data is being transmitted superimposed on the audio signal, the process proceeds to step S2, where the same data as the pay program data determined in step S1 is stored in the memory 2o.
It is determined whether or not the file is stored in the main storage area 20a.

If the determination in step S2 is NO, that is, the pay program data has not yet been stored in the main storage area 20a of the memory 20, the process proceeds to step S3, where a tuning signal for tuning the pay announcement channel is generated. After outputting this to the converter 12, the process proceeds to step S4.

When the paid announcement channel is tuned in the converter 12 by the tuning signal outputted in step S3, a paid announcement image is displayed on the TV receiver 17. 1, step S4 waits for the user who has viewed the paid notification image to operate any key on the keyboard 18. When the user operates any key on the keyboard '18, the process proceeds to step S5, where it is determined whether the operated key is a confirmation key for confirming that a pay program will be viewed. If the determination in step S5 is NO, that is, the operated key is the confirmation key, the process advances to step S6, where a write process is performed to write the pay program data into the memory 20, and after the process in step S6 is completed. Return to Step S].

In the above step S6, when the pay program data is written to the memory 20, the judgment in the above step S2 becomes YES and the process proceeds to step S7, where the tuning of the target channel, that is, the channel on which the pay program is carried is performed. In order to do this, a channel selection signal is output to the converter 12.

Incidentally, if the determination in step S1 of "1" is NO, that is, the data on the audio signal is not pay program data, steps 32 to S6 are skipped and the process proceeds to step S7.
Here, a tuning signal for tuning the target channel is output to the converter 12. If the determination in step S5 is NO, that is, if a key other than the confirmation key is operated, the process proceeds to another step (not shown) for performing processing corresponding to that key.

Next, the process of writing pay program data to the memory 20 in step S6 of flowchart 1-return in FIG.
This will be explained below with reference to flowchart 1 in FIG.

The data that needs to be written to the memory 20 in step S6 is written in the R
AMI (16 bits), and this data is sent in step 11 to the first buffer storage area 20b at address 7E of the memory 20 described above with reference to FIG. 3 (period 2 in FIG. 7). In the following step S12, the first buffer storage area 20b at address 7E of the memory 2o
(period marked ■ in Figure 7). Thereafter, the process proceeds to step S13, where necessary data is written into the first buffer storage area 20b at address 7E (period 2 in FIG. 7). Through steps s11 to 313 described above, necessary data is written to the first buffer storage area 20b at address 7E assigned as buffer 1 in memory 2o.

Thereafter, the process further advances to step S14, where address data with an unwritten flag added is sent to the second buffer storage area 20c at address 7F of the memory 20 (■). Then, in the subsequent step S15, the contents of the second buffer storage area 20c at the address 7F of the memory 20 are erased.
The address data is written into the second buffer storage area 20c (■). Through steps 314 to s16 above, address data is written to the second buffer storage area 20c at address 7F, which is allocated as buffer 2 in memory 20.

Proceeding to the next step 7'' S17, here, the same necessary data as the data written to the first buffer storage area 20b, which is the buffer 1, is stored in the area of the address Oo in the main storage area 2Oa of the memory 2°, that is, the contents of the RAM 1. In the following step 31B, the contents of the area at address 00 in the main storage area 2Oa of the memory 20 are erased (■), and in the following step S19, the necessary data is stored in the area at address OO in the main storage area 2Oa. Write (■). Above steps 817 to S19
As a result, the necessary data in the CPU's RAM 1 is written to the area at address 00 in the target main storage area 2Oa.

Furthermore, in the next step S20, necessary data is sent to the area at address 01 of the main storage area 20a of the memory 20 (■), and in the next step S21, the necessary data is sent to the area at address 01 of the main storage area 20a of the memory 20.
Delete the contents of the area at address 01 in 0a■),
Furthermore, in the subsequent step S22, the main storage area 20a
The data sent in step S20 is written into the area of address O1 inside (■). Above steps 320~
By executing step 322, the contents of the RAM 2 written to the second buffer storage area 20c as the buffer 2 are written to the area of address 01 in the main storage area 2Oa.

After that, the process proceeds to step S23, where the necessary data is sent to the address 7F in the memory 20, that is, the second buffer storage area 20c as the buffer 2 (■), and in the next step S24, it is sent as the buffer 2 at the address 7F in the memory 20. The contents of the second buffer storage area 20c are erased (■), and necessary data is written to the second buffer storage area 20c at address 7F in step S25 (■).

By executing steps 323 to S25 above, the unwritten flag of the second buffer storage area 20c as the buffer 2 is reset, and all write processing operations are completed.

The CPU of the controller 15 executes the work shown in the flowchart of FIG. 6 when the power is turned on again after a momentary power interruption occurs. In its first step S31, the CPU selects the second buffer 2 of the memory 20.
The contents of the buffer storage area 20c, that is, the address data and unwritten flag are read out. After that, the process advances to step S32, where the unwritten flag is set to "1".
Determine whether or not. If the determination in step S32 is NO, that is, the unwritten flag is reset, steps 323 to 25 in the flowchart described above with reference to FIG. It determines that the address has been written correctly and moves on to other work. on the other hand,
When the determination in step S332 is YES, it is determined that the unwritten flag has not been sorted and the necessary data has not been normally written to a predetermined area in the main storage area 2Oa of the memory 20, and the process proceeds to step S33. move on.

In step S'33, data in the first sofa storage area 20b as the buffer 1 of the memory 2o is read. By executing steps S and 33, the unwritten necessary data is once imported into the cPU, and the step S
In step S34, the data read in step 33 is sent to the area at I7 in the main storage area 2Oa (■). After that, in step S34, the main storage area 2
Delete the data in the area of the target address in Oa■
), and in the following step S35, the necessary data is written in the area of the target address (■). Step 83 below
By executing the work in steps 3 to S35, the second buffer storage area 20c as the buffer 2 is stored, and according to the address data in 7-C1, the first buffer storage area 20c as the high sofa 1 is stored in the area in the main storage area 20a of the address. The data stored in the sofa storage area 20b will be written.

Next, the process proceeds to step S36, where the necessary data is sent to the second Banonoa storage area 20c as the buffer 2 (■), and in the subsequent step S37, the contents of this first buffer storage area 20b are erased (■). ), continued < step S 38 f=: and the buffer storage area 20
Write the necessary data to 0 (■). Above steps, BU S36
- The unwritten flag of the second buffer storage area 20c is reset 71 by the execution of the work of the stencil S3B.

As mentioned above, even if the power is cut off during the execution of steps SL1 to 31.6 in flowchart 1 of FIG. 5, the unwritten flag in the second buffer storage area 2Oc remains unchanged. Therefore, the determination in step S32 in the sixth flowchart is NO, and the data rewriting operation is not performed. In addition, if the power is cut off during the execution of steps 817 to S25 in flowchart 1 of FIG. 5, the unwritten flag is set to 7-1, so when the power is restored, The determination in step S32 in the flowchart is YES, and the main storage area 2Oa
The necessary data is written to the area of the target address inside.

Steps sti~S], 6, Steps SL7~
In any of S25, from the user's perspective, the power is turned off the moment the confirmation key is operated, so steps 311 to
Even if the power is cut off during the execution of S16 and the user is tuned to a paid notification channel, it is sufficient to consider that the power cut occurs before the confirmation key is accepted. This is because when the power is restored, a new confirmation key is accepted and the operations from step S1 are performed again.

In addition, in the two consecutive embodiments, a device for protecting data in a memory that stores viewing data of paid programs in a CA TV terminal is explained, but the present invention is applicable to the memory of general electric equipment. It is equally applicable to third-party data protection.

(Effects) As explained above, according to the present invention, when data is not normally written to a predetermined address in the memory due to a power outage, the data is stored in the buffer storage area when the power is restored. Use the data, addresses and flags to move the correct pig to the main storage area at a given address 1/
Since the data generated in the electrical equipment is written to the storage area, even if the power is cut off while the data is being written to the storage unit, the data written to the storage unit will be incomplete and incorrect. This prevents the pigs from becoming infected and protects the pigs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of a data protection device in electrical equipment according to the present invention, FIG. 2 is a block diagram showing the configuration of a CATV terminal to which the data protection device in electrical equipment according to the invention is applied, and FIG. is an explanatory diagram showing the map structure of the memory in Figure 2, Figures 4 to 6 are flowchart diagrams showing the work that the CPU in Figure 2 performs according to the program, and Figure 7 is a diagram showing the memory map structure in Figure 2. FIG. 2 is an explanatory diagram for explaining a write operation of the EEPROM used. 15... Controller, 151... Data writing means, 151a... First writing means, 151b... Second
writing means, 151C... third writing means, 151d
...Fourth writing means, 20...Storage means, 20a.
...Main storage area, 20b...First buffer storage area, 20c...Second buffer storage area, 2
4...Power return detection means. Patent applicant Pioneer Corporation

Claims (1)

[Scope of Claims] A main storage area for storing a plurality of data generated within the electrical equipment; a first buffer storage area for temporarily storing write data to be written to the main storage area; storage means having a second buffer storage area for storing an address on the main storage area and a flag for writing write data; a data writing means for writing data into the storage means; power return detection means for detecting, and the data writing means stores data in the first and second buffer storage areas in the main storage area when data to be stored in the storage means is generated in the electrical equipment. a first writing means for writing the address of the main storage area storing the data to be stored and the data to be stored, and a first flag, respectively; and after the writing by the first writing means is completed, the main storage a second writing means for writing data to be stored in the area; and a flag written by the first writing means in the second buffer storage area after the writing by the second writing means is completed. a third writing means for writing a second flag different from the second flag; and in response to detection of power restoration by the power restoration detection means,
When the flag stored in the second buffer storage area is the first flag, the data stored in the first buffer storage area is transferred to the main data stored in the second buffer storage area. A data protection device for an electrical device, comprising: fourth writing means for writing to an address in a storage area.