JPH02133018U - - Google Patents

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Publication number
JPH02133018U
JPH02133018U JP4136289U JP4136289U JPH02133018U JP H02133018 U JPH02133018 U JP H02133018U JP 4136289 U JP4136289 U JP 4136289U JP 4136289 U JP4136289 U JP 4136289U JP H02133018 U JPH02133018 U JP H02133018U
Authority
JP
Japan
Prior art keywords
capacitance
switching
switched capacitor
time division
capacitor circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4136289U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4136289U priority Critical patent/JPH02133018U/ja
Publication of JPH02133018U publication Critical patent/JPH02133018U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案のスイツチドキヤパシタ回路
の一実施例を示す回路図、第2図は、第1図にお
ける各スイツチを制御する信号のタイムチヤート
、第3図〜第5図は、従来の時分割多重構成のス
イツチドキヤパシタ回路の回路図である。 C1,△C2〜△Cn……容量、S2n〜Sn
……スイツチ。
Fig. 1 is a circuit diagram showing an embodiment of the switched capacitor circuit of this invention, Fig. 2 is a time chart of signals controlling each switch in Fig. 1, and Figs. 3 to 5 are conventional circuit diagrams. FIG. 2 is a circuit diagram of a switched capacitor circuit having a time division multiplex configuration. C 1 , △C 2 ~ △Cn... Capacity, S 2 n ~ Sn
...Switch.

Claims (1)

【実用新案登録請求の範囲】 時分割多重方式によるスイツチングにより、C
1,C2,C3…,Cnの容量を得る時分割多重
方式のスイツチドキヤパシタ回路であつて、 最小の容量C1と、 C2=C1+△C2 C3=C1+△C2+△C3 : Cn=C1+△C2+△C3+…,△Cn となる各容量△C2,△C3…△Cnと、 前記C1,C2…,Cnの各値が得られるよう
、容量C1と並列に容量△C2,△C3…,△C
nを選択するスイツチング手段と、 を備えたことを特徴とするスイツチドキヤパシ
タ回路。
[Scope of claim for utility model registration] By switching using time division multiplexing system, C.
1 , C 2 , C 3 ..., Cn, the minimum capacitance C 1 and C 2 = C 1 + △C 2 C 3 = C 1 + △C 2 +△C 3 : Cn=C 1 +△C 2 +△C 3 +..., △Cn, and each capacitance △C 2 , △C 3 ...△Cn, and the above-mentioned C 1 , C 2 ..., Cn Capacitances △C 2 , △C 3 ..., △ C
A switched capacitor circuit comprising: switching means for selecting n;
JP4136289U 1989-04-07 1989-04-07 Pending JPH02133018U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4136289U JPH02133018U (en) 1989-04-07 1989-04-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4136289U JPH02133018U (en) 1989-04-07 1989-04-07

Publications (1)

Publication Number Publication Date
JPH02133018U true JPH02133018U (en) 1990-11-05

Family

ID=31551963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4136289U Pending JPH02133018U (en) 1989-04-07 1989-04-07

Country Status (1)

Country Link
JP (1) JPH02133018U (en)

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