JPH02140846U - - Google Patents

Info

Publication number
JPH02140846U
JPH02140846U JP4983289U JP4983289U JPH02140846U JP H02140846 U JPH02140846 U JP H02140846U JP 4983289 U JP4983289 U JP 4983289U JP 4983289 U JP4983289 U JP 4983289U JP H02140846 U JPH02140846 U JP H02140846U
Authority
JP
Japan
Prior art keywords
pins
board
chip
fenestration
pin holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4983289U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4983289U priority Critical patent/JPH02140846U/ja
Publication of JPH02140846U publication Critical patent/JPH02140846U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案のＩＣ実装構造の実施例を示す
断面図、第２図ａ，ｂは各々本実施例構造を組み
立てる支持基板及び配線基板を示す斜視図、第３
図は支持基板の変形例を示す概略図、第４図は従
来構造を示す断面図である。 １……配線基板、３……ＩＣチツプ、４……接
着剤、７……支持基板、８……ピン、９……開窓
部、１０……ピン穴、１１……スリツト。 FIG. 1 is a sectional view showing an embodiment of the IC mounting structure of the present invention, FIGS.
The figure is a schematic view showing a modified example of the support substrate, and FIG. 4 is a sectional view showing a conventional structure. DESCRIPTION OF SYMBOLS 1... Wiring board, 3... IC chip, 4... Adhesive, 7... Support board, 8... Pin, 9... Opening part, 10... Pin hole, 11... Slit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のピンが突出されると共にＩＣチツプが固
定される支持基板と、ＩＣチツプを挿通する開窓
部が設けられると共に開窓部の周囲に上記ピンに
対応して設けられた複数のピン穴を有する配線基
板とを含み、上記ピンをピン穴に位置決めして支
持基板を着脱自在に配線基板に取付けることを特
徴とするＩＣ実装構造。 A support substrate from which a plurality of pins are projected and to which the IC chip is fixed, a fenestration through which the IC chip is inserted, and a plurality of pin holes provided around the fenestration in correspondence with the pins. 1. An IC mounting structure comprising: a wiring board having a support board; the supporting board is removably attached to the wiring board by positioning the pins in the pin holes;
JP4983289U 1989-04-27 1989-04-27 Pending JPH02140846U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4983289U JPH02140846U (en) 1989-04-27 1989-04-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4983289U JPH02140846U (en) 1989-04-27 1989-04-27

Publications (1)

Publication Number Publication Date
JPH02140846U true JPH02140846U (en) 1990-11-26

Family

ID=31567860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4983289U Pending JPH02140846U (en) 1989-04-27 1989-04-27

Country Status (1)

Country Link
JP (1) JPH02140846U (en)

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